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ASoC: rsnd: tidyup data align position
Sound L/R order of SSI is different from Linux sound data order. So current rsnd driver is using DALIGN (= data align) to exchange data align on SSIU. OTOH, CMD/SRC/SSIU have DALIGN register. Now inverted sound volume will be exchanged if user used volume control on DVC. Because SSIU which exchanges data align is located after DVC. MEM -> SRC -> DVC -> SSI This patch exchanges data align SRC if possible Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -249,6 +249,42 @@ u32 rsnd_get_adinr_chan(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
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return chan;
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}
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/*
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* DALIGN function
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*/
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u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
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{
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struct rsnd_mod *src = rsnd_io_to_mod_src(io);
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struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io);
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struct rsnd_mod *target = src ? src : ssi;
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struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
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u32 val = 0x76543210;
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u32 mask = ~0;
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mask <<= runtime->channels * 4;
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val = val & mask;
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switch (runtime->sample_bits) {
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case 16:
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val |= 0x67452301 & ~mask;
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break;
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case 32:
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val |= 0x76543210 & ~mask;
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break;
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}
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/*
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* exchange channeles on SRC if possible,
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* otherwise, R/L volume settings on DVC
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* changes inverted channels
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*/
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if (mod == target)
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return val;
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else
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return 0x76543210;
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}
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/*
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* rsnd_dai functions
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*/
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@ -222,6 +222,7 @@ static int rsnd_gen2_probe(struct platform_device *pdev,
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};
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struct rsnd_regmap_field_conf conf_scu[] = {
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RSND_GEN_M_REG(SRC_BUSIF_MODE, 0x0, 0x20),
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RSND_GEN_M_REG(SRC_BUSIF_DALIGN,0x8, 0x20),
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RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20),
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RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20),
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RSND_GEN_M_REG(SRC_INT_ENABLE0, 0x18, 0x20),
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@ -99,6 +99,7 @@ enum rsnd_reg {
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RSND_REG_SHARE26,
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RSND_REG_SHARE27,
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RSND_REG_SHARE28,
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RSND_REG_SHARE29,
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RSND_REG_MAX,
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};
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@ -143,6 +144,7 @@ enum rsnd_reg {
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#define RSND_REG_SCU_SYS_STATUS1 RSND_REG_SHARE26
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#define RSND_REG_SCU_SYS_INT_EN1 RSND_REG_SHARE27
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#define RSND_REG_SRC_INT_ENABLE0 RSND_REG_SHARE28
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#define RSND_REG_SRC_BUSIF_DALIGN RSND_REG_SHARE29
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struct rsnd_of_data;
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struct rsnd_priv;
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@ -171,6 +173,7 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
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u32 mask, u32 data);
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u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
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u32 rsnd_get_adinr_chan(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
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u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io);
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void rsnd_path_parse(struct rsnd_priv *priv,
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struct rsnd_dai_stream *io);
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@ -148,7 +148,6 @@ int rsnd_src_ssiu_start(struct rsnd_mod *ssi_mod,
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int use_busif)
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{
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struct rsnd_dai *rdai = rsnd_io_to_rdai(io);
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struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
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int ssi_id = rsnd_mod_id(ssi_mod);
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/*
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@ -185,27 +184,14 @@ int rsnd_src_ssiu_start(struct rsnd_mod *ssi_mod,
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* DMA settings for SSIU
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*/
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if (use_busif) {
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u32 val = 0x76543210;
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u32 mask = ~0;
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u32 val = rsnd_get_dalign(ssi_mod, io);
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rsnd_mod_write(ssi_mod, SSI_BUSIF_ADINR,
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rsnd_get_adinr_bit(ssi_mod, io));
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rsnd_mod_write(ssi_mod, SSI_BUSIF_MODE, 1);
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rsnd_mod_write(ssi_mod, SSI_CTRL, 0x1);
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mask <<= runtime->channels * 4;
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val = val & mask;
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switch (runtime->sample_bits) {
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case 16:
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val |= 0x67452301 & ~mask;
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break;
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case 32:
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val |= 0x76543210 & ~mask;
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break;
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}
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rsnd_mod_write(ssi_mod, SSI_BUSIF_DALIGN, val);
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}
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return 0;
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@ -678,6 +664,10 @@ static int _rsnd_src_start_gen2(struct rsnd_mod *mod,
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struct rsnd_src *src = rsnd_mod_to_src(mod);
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u32 val;
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val = rsnd_get_dalign(mod, io);
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rsnd_mod_write(mod, SRC_BUSIF_DALIGN, val);
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/*
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* WORKAROUND
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*
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