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SoC; Fixes for 5.16, part 4

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A few more fixes have come in, nothing overly severe but would be good
 to get in by final release:
 
  - More specific compatible fields on the qspi controller for socfpga,
  to enable quirks in the driver.
  - A runtime PM fix for Renesas to fix mismatched reference counts on
  errors.
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Merge tag 'soc-fixes-5.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "A few more fixes have come in, nothing overly severe but would be good
  to get in by final release:

   - More specific compatible fields on the qspi controller for socfpga,
     to enable quirks in the driver

   - A runtime PM fix for Renesas to fix mismatched reference counts on
     errors"

* tag 'soc-fixes-5.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: socfpga: change qspi to "intel,socfpga-qspi"
  dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"
  reset: renesas: Fix Runtime PM usage
This commit is contained in:
Linus Torvalds 2022-01-08 12:56:16 -08:00
commit 4634129ad9
6 changed files with 11 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
View File

@ -29,6 +29,7 @@ properties:
- ti,am654-ospi
- intel,lgm-qspi
- xlnx,versal-ospi-1.0
- intel,socfpga-qspi
- const: cdns,qspi-nor
- const: cdns,qspi-nor

2
arch/arm/boot/dts/socfpga.dtsi
View File

@ -782,7 +782,7 @@
};
qspi: spi@ff705000 {
compatible = "cdns,qspi-nor";
compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff705000 0x1000>,

2
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -756,7 +756,7 @@
};
qspi: spi@ff809000 {
compatible = "cdns,qspi-nor";
compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff809000 0x100>,

2
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
View File

@ -594,7 +594,7 @@
};
qspi: spi@ff8d2000 {
compatible = "cdns,qspi-nor";
compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff8d2000 0x100>,

2
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
View File

@ -628,7 +628,7 @@
};
qspi: spi@ff8d2000 {
compatible = "cdns,qspi-nor";
compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xff8d2000 0x100>,

7
drivers/reset/reset-rzg2l-usbphy-ctrl.c
View File

@ -137,7 +137,12 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev)
dev_set_drvdata(dev, priv);
pm_runtime_enable(&pdev->dev);
pm_runtime_resume_and_get(&pdev->dev);
error = pm_runtime_resume_and_get(&pdev->dev);
if (error < 0) {
pm_runtime_disable(&pdev->dev);
reset_control_assert(priv->rstc);
return dev_err_probe(&pdev->dev, error, "pm_runtime_resume_and_get failed");
}
/* put pll and phy into reset state */
spin_lock_irqsave(&priv->lock, flags);