SoC changes for omaps for v4.5 merge window. The main change here is to

change the omap initcall levels a bit to initialize things later to allow
 early device drivers at core_initcall level. This makes things easier
 for us as most clocks can be made into regular device drivers except for
 a few early clocks needed to initialize system timers. I wanted to have
 these changes sit in Linux next for a few weeks before sending out a pull
 request, and so far now issues have showed up.
 
 The other changes in this series are timer changes for making use of the
 new PWM driver, and timer changes to support more high security SoCs.
 Also few minor improvments for module autoidle settings for ti81xx spinbox
 and dra7 debug on uart4 in hwmod code. The rest is pretty much just removal
 of platform data for SoCs that are all device tree only nowadays.
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Merge tag 'omap-for-v4.5/soc-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.5 merge window. The main change here is to
change the omap initcall levels a bit to initialize things later to allow
early device drivers at core_initcall level. This makes things easier
for us as most clocks can be made into regular device drivers except for
a few early clocks needed to initialize system timers. I wanted to have
these changes sit in Linux next for a few weeks before sending out a pull
request, and so far now issues have showed up.

The other changes in this series are timer changes for making use of the
new PWM driver, and timer changes to support more high security SoCs.
Also few minor improvments for module autoidle settings for ti81xx spinbox
and dra7 debug on uart4 in hwmod code. The rest is pretty much just removal
of platform data for SoCs that are all device tree only nowadays.

* tag 'omap-for-v4.5/soc-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove device creation for omap-pcm-audio
  ARM: OMAP1: Remove device creation for omap-pcm-audio
  ARM: OMAP2+: Change core_initcall levels to postcore_initcall
  ARM: DRA7: hwmod: Enable DEBUG_LL for UART4
  ARM: OMAP: RX-51: fix a typo in log writing
  ARM: omap4: hwmod: Remove elm address space from hwmod data
  ARM: OMAP2+: timer: Remove secure timer for DRA7xx HS devices
  ARM: OMAP: dmtimer: check for fixed timers during config
  ARM: OMAP2+: Remove omap_mmu_dev_attr structure
  ARM: OMAP4: hwmod data: Remove legacy IOMMU attr and addrs
  ARM: OMAP3: hwmod data: Remove legacy IOMMU data
  ARM: OMAP2+: Remove legacy device instantiation of IOMMUs
  ARM: OMAP2+: Add hwmod spinbox support for dm816x
  ARM: OMAP: add DT support for ti,dm816-timer
  ARM: OMAP: dmtimer: Add clock source from DT

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-12-22 14:49:17 -08:00
commit 45e2916be2
17 changed files with 90 additions and 211 deletions

View File

@ -33,24 +33,6 @@
#include "mmc.h"
#include "sram.h"
#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
static struct platform_device omap_pcm = {
.name = "omap-pcm-audio",
.id = -1,
};
static void omap_init_audio(void)
{
platform_device_register(&omap_pcm);
}
#else
static inline void omap_init_audio(void) {}
#endif
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
#define OMAP_RTC_BASE 0xfffb4800
@ -425,7 +407,6 @@ static int __init omap1_init_devices(void)
* in alphabetical order so they're easier to sort through.
*/
omap_init_audio();
omap_init_mbox();
omap_init_rtc();
omap_init_spi100k();

View File

@ -223,8 +223,6 @@ obj-$(CONFIG_SOC_DRA7XX) += omap_hwmod_7xx_data.o
# EMU peripherals
obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
# OMAP2420 MSDI controller integration support ("MMC")
obj-$(CONFIG_SOC_OMAP2420) += msdi.o

View File

@ -1257,7 +1257,7 @@ static struct platform_device omap3_rom_rng_device = {
static void __init rx51_init_omap3_rom_rng(void)
{
if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
pr_info("RX-51: Registering OMAP3 HWRNG device\n");
platform_device_register(&omap3_rom_rng_device);
}
}

View File

@ -94,22 +94,6 @@ static inline void omap_init_mbox(void) { }
static inline void omap_init_sti(void) {}
#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
static struct platform_device omap_pcm = {
.name = "omap-pcm-audio",
.id = -1,
};
static void omap_init_audio(void)
{
platform_device_register(&omap_pcm);
}
#else
static inline void omap_init_audio(void) {}
#endif
#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
#include <linux/platform_data/spi-omap2-mcspi.h>
@ -239,13 +223,12 @@ static int __init omap2_init_devices(void)
if (!of_have_populated_dt())
pinctrl_provide_dummies();
/*
* please keep these calls, and their implementations above,
* in alphabetical order so they're easier to sort through.
*/
omap_init_audio();
/* If dtb is there, the devices will be created dynamically */
if (!of_have_populated_dt()) {
/*
* please keep these calls, and their implementations above,
* in alphabetical order so they're easier to sort through.
*/
omap_init_mbox();
omap_init_mcspi();
omap_init_sham();

View File

@ -1,66 +0,0 @@
/*
* omap iommu: omap device registration
*
* Copyright (C) 2008-2009 Nokia Corporation
*
* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/platform_data/iommu-omap.h>
#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
struct iommu_platform_data *pdata;
struct omap_mmu_dev_attr *a = (struct omap_mmu_dev_attr *)oh->dev_attr;
static int i;
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
pdata->name = oh->name;
pdata->nr_tlb_entries = a->nr_tlb_entries;
if (oh->rst_lines_cnt == 1) {
pdata->reset_name = oh->rst_lines->name;
pdata->assert_reset = omap_device_assert_hardreset;
pdata->deassert_reset = omap_device_deassert_hardreset;
}
pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata));
kfree(pdata);
if (IS_ERR(pdev)) {
pr_err("%s: device build err: %ld\n", __func__, PTR_ERR(pdev));
return PTR_ERR(pdev);
}
i++;
return 0;
}
static int __init omap_iommu_init(void)
{
/* If dtb is there, the devices will be created dynamically */
if (of_have_populated_dt())
return -ENODEV;
return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
}
omap_subsys_initcall(omap_iommu_init);
/* must be ready before omap3isp is probed */

View File

@ -62,4 +62,4 @@ static int __init omap2xxx_common_look_up_clks_for_reset(void)
return 0;
}
omap_core_initcall(omap2xxx_common_look_up_clks_for_reset);
omap_postcore_initcall(omap2xxx_common_look_up_clks_for_reset);

View File

@ -869,7 +869,7 @@ static int __init omap_device_init(void)
bus_register_notifier(&platform_bus_type, &platform_nb);
return 0;
}
omap_core_initcall(omap_device_init);
omap_postcore_initcall(omap_device_init);
/**
* omap_device_late_idle - idle devices without drivers

View File

@ -3313,7 +3313,7 @@ static int __init omap_hwmod_setup_all(void)
return 0;
}
omap_core_initcall(omap_hwmod_setup_all);
omap_postcore_initcall(omap_hwmod_setup_all);
/**
* omap_hwmod_enable - enable an omap_hwmod

View File

@ -25,7 +25,6 @@
#include "l4_3xxx.h"
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/iommu-omap.h>
#include <plat/dmtimer.h>
#include "soc.h"
@ -2957,80 +2956,40 @@ static struct omap_hwmod_class omap3xxx_mmu_hwmod_class = {
};
/* mmu isp */
static struct omap_mmu_dev_attr mmu_isp_dev_attr = {
.nr_tlb_entries = 8,
};
static struct omap_hwmod omap3xxx_mmu_isp_hwmod;
static struct omap_hwmod_irq_info omap3xxx_mmu_isp_irqs[] = {
{ .irq = 24 + OMAP_INTC_START, },
{ .irq = -1 }
};
static struct omap_hwmod_addr_space omap3xxx_mmu_isp_addrs[] = {
{
.pa_start = 0x480bd400,
.pa_end = 0x480bd47f,
.flags = ADDR_TYPE_RT,
},
{ }
};
/* l4_core -> mmu isp */
static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmu_isp = {
.master = &omap3xxx_l4_core_hwmod,
.slave = &omap3xxx_mmu_isp_hwmod,
.addr = omap3xxx_mmu_isp_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod omap3xxx_mmu_isp_hwmod = {
.name = "mmu_isp",
.class = &omap3xxx_mmu_hwmod_class,
.mpu_irqs = omap3xxx_mmu_isp_irqs,
.main_clk = "cam_ick",
.dev_attr = &mmu_isp_dev_attr,
.flags = HWMOD_NO_IDLEST,
};
/* mmu iva */
static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
.nr_tlb_entries = 32,
};
static struct omap_hwmod omap3xxx_mmu_iva_hwmod;
static struct omap_hwmod_irq_info omap3xxx_mmu_iva_irqs[] = {
{ .irq = 28 + OMAP_INTC_START, },
{ .irq = -1 }
};
static struct omap_hwmod_rst_info omap3xxx_mmu_iva_resets[] = {
{ .name = "mmu", .rst_shift = 1, .st_shift = 9 },
};
static struct omap_hwmod_addr_space omap3xxx_mmu_iva_addrs[] = {
{
.pa_start = 0x5d000000,
.pa_end = 0x5d00007f,
.flags = ADDR_TYPE_RT,
},
{ }
};
/* l3_main -> iva mmu */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__mmu_iva = {
.master = &omap3xxx_l3_main_hwmod,
.slave = &omap3xxx_mmu_iva_hwmod,
.addr = omap3xxx_mmu_iva_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod omap3xxx_mmu_iva_hwmod = {
.name = "mmu_iva",
.class = &omap3xxx_mmu_hwmod_class,
.mpu_irqs = omap3xxx_mmu_iva_irqs,
.clkdm_name = "iva2_clkdm",
.rst_lines = omap3xxx_mmu_iva_resets,
.rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets),
@ -3043,7 +3002,6 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = {
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
},
},
.dev_attr = &mmu_iva_dev_attr,
.flags = HWMOD_NO_IDLEST,
};

View File

@ -30,7 +30,6 @@
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <linux/platform_data/iommu-omap.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
@ -2088,30 +2087,16 @@ static struct omap_hwmod_class omap44xx_mmu_hwmod_class = {
/* mmu ipu */
static struct omap_mmu_dev_attr mmu_ipu_dev_attr = {
.nr_tlb_entries = 32,
};
static struct omap_hwmod omap44xx_mmu_ipu_hwmod;
static struct omap_hwmod_rst_info omap44xx_mmu_ipu_resets[] = {
{ .name = "mmu_cache", .rst_shift = 2 },
};
static struct omap_hwmod_addr_space omap44xx_mmu_ipu_addrs[] = {
{
.pa_start = 0x55082000,
.pa_end = 0x550820ff,
.flags = ADDR_TYPE_RT,
},
{ }
};
/* l3_main_2 -> mmu_ipu */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__mmu_ipu = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_mmu_ipu_hwmod,
.clk = "l3_div_ck",
.addr = omap44xx_mmu_ipu_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@ -2130,35 +2115,20 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = {
.modulemode = MODULEMODE_HWCTRL,
},
},
.dev_attr = &mmu_ipu_dev_attr,
};
/* mmu dsp */
static struct omap_mmu_dev_attr mmu_dsp_dev_attr = {
.nr_tlb_entries = 32,
};
static struct omap_hwmod omap44xx_mmu_dsp_hwmod;
static struct omap_hwmod_rst_info omap44xx_mmu_dsp_resets[] = {
{ .name = "mmu_cache", .rst_shift = 1 },
};
static struct omap_hwmod_addr_space omap44xx_mmu_dsp_addrs[] = {
{
.pa_start = 0x4a066000,
.pa_end = 0x4a0660ff,
.flags = ADDR_TYPE_RT,
},
{ }
};
/* l4_cfg -> dsp */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mmu_dsp = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_mmu_dsp_hwmod,
.clk = "l4_div_ck",
.addr = omap44xx_mmu_dsp_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@ -2177,7 +2147,6 @@ static struct omap_hwmod omap44xx_mmu_dsp_hwmod = {
.modulemode = MODULEMODE_HWCTRL,
},
},
.dev_attr = &mmu_dsp_dev_attr,
};
/*
@ -3915,21 +3884,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_addr_space omap44xx_elm_addrs[] = {
{
.pa_start = 0x48078000,
.pa_end = 0x48078fff,
.flags = ADDR_TYPE_RT
},
{ }
};
/* l4_per -> elm */
static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_elm_hwmod,
.clk = "l4_div_ck",
.addr = omap44xx_elm_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

View File

@ -2103,7 +2103,7 @@ static struct omap_hwmod dra7xx_uart4_hwmod = {
.class = &dra7xx_uart_hwmod_class,
.clkdm_name = "l4per_clkdm",
.main_clk = "uart4_gfclk_mux",
.flags = HWMOD_SWSUP_SIDLE_ACT,
.flags = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP4UART4_FLAGS,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4PER_UART4_CLKCTRL_OFFSET,

View File

@ -1036,6 +1036,40 @@ static struct omap_hwmod_ocp_if dm81xx_l4_ls__mailbox = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_class_sysconfig dm81xx_spinbox_sysc = {
.rev_offs = 0x000,
.sysc_offs = 0x010,
.syss_offs = 0x014,
.sysc_flags = SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE,
.idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART,
.sysc_fields = &omap_hwmod_sysc_type1,
};
static struct omap_hwmod_class dm81xx_spinbox_hwmod_class = {
.name = "spinbox",
.sysc = &dm81xx_spinbox_sysc,
};
static struct omap_hwmod dm81xx_spinbox_hwmod = {
.name = "spinbox",
.clkdm_name = "alwon_l3s_clkdm",
.class = &dm81xx_spinbox_hwmod_class,
.main_clk = "sysclk6_ck",
.prcm = {
.omap4 = {
.clkctrl_offs = DM81XX_CM_ALWON_SPINBOX_CLKCTRL,
.modulemode = MODULEMODE_SWCTRL,
},
},
};
static struct omap_hwmod_ocp_if dm81xx_l4_ls__spinbox = {
.master = &dm81xx_l4_ls_hwmod,
.slave = &dm81xx_spinbox_hwmod,
.user = OCP_USER_MPU,
};
static struct omap_hwmod_class dm81xx_tpcc_hwmod_class = {
.name = "tpcc",
};
@ -1298,6 +1332,7 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = {
&dm816x_l4_ls__timer7,
&dm81xx_l4_ls__mcspi1,
&dm81xx_l4_ls__mailbox,
&dm81xx_l4_ls__spinbox,
&dm81xx_l4_hs__emac0,
&dm81xx_emac0__mdio,
&dm816x_l4_hs__emac1,

View File

@ -265,7 +265,7 @@ static void __init nokia_n900_legacy_init(void)
pr_warn("Thumb binaries may crash randomly without this workaround\n");
}
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
pr_info("RX-51: Registering OMAP3 HWRNG device\n");
platform_device_register(&omap3_rom_rng_device);
}

View File

@ -213,7 +213,7 @@ static int __init omap_serial_early_init(void)
return 0;
}
omap_core_initcall(omap_serial_early_init);
omap_postcore_initcall(omap_serial_early_init);
/**
* omap_serial_init_port() - initialize single serial port

View File

@ -194,8 +194,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id *
/**
* omap_dmtimer_init - initialisation function when device tree is used
*
* For secure OMAP3 devices, timers with device type "timer-secure" cannot
* be used by the kernel as they are reserved. Therefore, to prevent the
* For secure OMAP3/DRA7xx devices, timers with device type "timer-secure"
* cannot be used by the kernel as they are reserved. Therefore, to prevent the
* kernel registering these devices remove them dynamically from the device
* tree on boot.
*/
@ -203,7 +203,7 @@ static void __init omap_dmtimer_init(void)
{
struct device_node *np;
if (!cpu_is_omap34xx())
if (!cpu_is_omap34xx() && !soc_is_dra7xx())
return;
/* If we are a secure device, remove any secure timer nodes */

View File

@ -36,6 +36,7 @@
*/
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/device.h>
@ -137,6 +138,31 @@ static int omap_dm_timer_reset(struct omap_dm_timer *timer)
return 0;
}
static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
{
int ret;
struct clk *parent;
/*
* FIXME: OMAP1 devices do not use the clock framework for dmtimers so
* do not call clk_get() for these devices.
*/
if (!timer->fclk)
return -ENODEV;
parent = clk_get(&timer->pdev->dev, NULL);
if (IS_ERR(parent))
return -ENODEV;
ret = clk_set_parent(timer->fclk, parent);
if (ret < 0)
pr_err("%s: failed to set parent\n", __func__);
clk_put(parent);
return ret;
}
static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
{
int rc;
@ -166,7 +192,11 @@ static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
__omap_dm_timer_enable_posted(timer);
omap_dm_timer_disable(timer);
return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
rc = omap_dm_timer_of_set_source(timer);
if (rc == -ENODEV)
return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
return rc;
}
static inline u32 omap_dm_timer_reserved_systimer(int id)
@ -504,6 +534,12 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
if (IS_ERR(timer->fclk))
return -EINVAL;
#if defined(CONFIG_COMMON_CLK)
/* Check if the clock has configurable parents */
if (clk_hw_get_num_parents(__clk_get_hw(timer->fclk)) < 2)
return 0;
#endif
switch (source) {
case OMAP_TIMER_SRC_SYS_CLK:
parent_name = "timer_sys_ck";
@ -943,6 +979,10 @@ static const struct of_device_id omap_timer_match[] = {
.compatible = "ti,am335x-timer-1ms",
.data = &omap3plus_pdata,
},
{
.compatible = "ti,dm816-timer",
.data = &omap3plus_pdata,
},
{},
};
MODULE_DEVICE_TABLE(of, omap_timer_match);

View File

@ -29,15 +29,6 @@ struct omap_iommu_arch_data {
struct omap_iommu *iommu_dev;
};
/**
* struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
* @nr_tlb_entries: number of entries supported by the translation
* look-aside buffer (TLB).
*/
struct omap_mmu_dev_attr {
int nr_tlb_entries;
};
struct iommu_platform_data {
const char *name;
const char *reset_name;