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sh-pfc: r8a7790: Add SCIF, SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart
Simon Horman
parent
04e7ce78e0
commit
45c6c85d13
@ -1884,6 +1884,462 @@ static const unsigned int intc_irq3_pins[] = {
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static const unsigned int intc_irq3_mux[] = {
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IRQ3_MARK,
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};
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/* - SCIF0 ----------------------------------------------------------------- */
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static const unsigned int scif0_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
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};
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static const unsigned int scif0_data_mux[] = {
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RX0_MARK, TX0_MARK,
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};
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static const unsigned int scif0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 27),
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};
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static const unsigned int scif0_clk_mux[] = {
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SCK0_MARK,
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};
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static const unsigned int scif0_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
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};
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static const unsigned int scif0_ctrl_mux[] = {
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RTS0_N_TANS_MARK, CTS0_N_MARK,
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};
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static const unsigned int scif0_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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};
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static const unsigned int scif0_data_b_mux[] = {
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RX0_B_MARK, TX0_B_MARK,
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};
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/* - SCIF1 ----------------------------------------------------------------- */
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static const unsigned int scif1_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
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};
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static const unsigned int scif1_data_mux[] = {
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RX1_MARK, TX1_MARK,
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};
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static const unsigned int scif1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 20),
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};
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static const unsigned int scif1_clk_mux[] = {
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SCK1_MARK,
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};
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static const unsigned int scif1_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
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};
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static const unsigned int scif1_ctrl_mux[] = {
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RTS1_N_TANS_MARK, CTS1_N_MARK,
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};
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static const unsigned int scif1_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
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};
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static const unsigned int scif1_data_b_mux[] = {
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RX1_B_MARK, TX1_B_MARK,
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};
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static const unsigned int scif1_data_c_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
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};
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static const unsigned int scif1_data_c_mux[] = {
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RX1_C_MARK, TX1_C_MARK,
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};
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static const unsigned int scif1_data_d_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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};
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static const unsigned int scif1_data_d_mux[] = {
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RX1_D_MARK, TX1_D_MARK,
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};
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static const unsigned int scif1_clk_d_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 17),
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};
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static const unsigned int scif1_clk_d_mux[] = {
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SCK1_D_MARK,
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};
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static const unsigned int scif1_data_e_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
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};
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static const unsigned int scif1_data_e_mux[] = {
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RX1_E_MARK, TX1_E_MARK,
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};
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static const unsigned int scif1_clk_e_pins[] = {
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/* SCK */
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RCAR_GP_PIN(2, 20),
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};
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static const unsigned int scif1_clk_e_mux[] = {
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SCK1_E_MARK,
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};
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/* - SCIFA0 ----------------------------------------------------------------- */
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static const unsigned int scifa0_data_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
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};
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static const unsigned int scifa0_data_mux[] = {
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SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
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};
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static const unsigned int scifa0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 27),
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};
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static const unsigned int scifa0_clk_mux[] = {
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SCIFA0_SCK_MARK,
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};
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static const unsigned int scifa0_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
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};
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static const unsigned int scifa0_ctrl_mux[] = {
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SCIFA0_RTS_N_MARK, SCIFA0_CTS_N_MARK,
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};
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static const unsigned int scifa0_data_b_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21),
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};
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static const unsigned int scifa0_data_b_mux[] = {
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SCIFA0_RXD_B_MARK, SCIFA0_TXD_B_MARK
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};
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static const unsigned int scifa0_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(1, 19),
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};
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static const unsigned int scifa0_clk_b_mux[] = {
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SCIFA0_SCK_B_MARK,
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};
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static const unsigned int scifa0_ctrl_b_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22),
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};
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static const unsigned int scifa0_ctrl_b_mux[] = {
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SCIFA0_RTS_N_B_MARK, SCIFA0_CTS_N_B_MARK,
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};
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/* - SCIFA1 ----------------------------------------------------------------- */
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static const unsigned int scifa1_data_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
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};
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static const unsigned int scifa1_data_mux[] = {
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SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
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};
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static const unsigned int scifa1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 20),
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};
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static const unsigned int scifa1_clk_mux[] = {
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SCIFA1_SCK_MARK,
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};
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static const unsigned int scifa1_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
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};
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static const unsigned int scifa1_ctrl_mux[] = {
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SCIFA1_RTS_N_MARK, SCIFA1_CTS_N_MARK,
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};
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static const unsigned int scifa1_data_b_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 21),
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};
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static const unsigned int scifa1_data_b_mux[] = {
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SCIFA1_RXD_B_MARK, SCIFA1_TXD_B_MARK,
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};
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static const unsigned int scifa1_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(0, 23),
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};
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static const unsigned int scifa1_clk_b_mux[] = {
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SCIFA1_SCK_B_MARK,
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};
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static const unsigned int scifa1_ctrl_b_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 25),
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};
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static const unsigned int scifa1_ctrl_b_mux[] = {
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SCIFA1_RTS_N_B_MARK, SCIFA1_CTS_N_B_MARK,
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};
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static const unsigned int scifa1_data_c_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
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};
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static const unsigned int scifa1_data_c_mux[] = {
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SCIFA1_RXD_C_MARK, SCIFA1_TXD_C_MARK,
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};
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static const unsigned int scifa1_clk_c_pins[] = {
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/* SCK */
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RCAR_GP_PIN(0, 8),
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};
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static const unsigned int scifa1_clk_c_mux[] = {
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SCIFA1_SCK_C_MARK,
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};
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static const unsigned int scifa1_ctrl_c_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11),
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};
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static const unsigned int scifa1_ctrl_c_mux[] = {
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SCIFA1_RTS_N_C_MARK, SCIFA1_CTS_N_C_MARK,
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};
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static const unsigned int scifa1_data_d_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
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};
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static const unsigned int scifa1_data_d_mux[] = {
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SCIFA1_RXD_D_MARK, SCIFA1_TXD_D_MARK,
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};
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static const unsigned int scifa1_clk_d_pins[] = {
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/* SCK */
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RCAR_GP_PIN(2, 10),
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};
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static const unsigned int scifa1_clk_d_mux[] = {
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SCIFA1_SCK_D_MARK,
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};
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static const unsigned int scifa1_ctrl_d_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
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};
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static const unsigned int scifa1_ctrl_d_mux[] = {
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SCIFA1_RTS_N_D_MARK, SCIFA1_CTS_N_D_MARK,
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};
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/* - SCIFA2 ----------------------------------------------------------------- */
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static const unsigned int scifa2_data_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
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};
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static const unsigned int scifa2_data_mux[] = {
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SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
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};
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static const unsigned int scifa2_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(5, 4),
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};
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static const unsigned int scifa2_clk_mux[] = {
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SCIFA2_SCK_MARK,
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};
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static const unsigned int scifa2_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21),
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};
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static const unsigned int scifa2_ctrl_mux[] = {
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SCIFA2_RTS_N_MARK, SCIFA2_CTS_N_MARK,
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};
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static const unsigned int scifa2_data_b_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 16),
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};
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static const unsigned int scifa2_data_b_mux[] = {
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SCIFA2_RXD_B_MARK, SCIFA2_TXD_B_MARK,
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};
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static const unsigned int scifa2_data_c_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(5, 31), RCAR_GP_PIN(5, 30),
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};
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static const unsigned int scifa2_data_c_mux[] = {
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SCIFA2_RXD_C_MARK, SCIFA2_TXD_C_MARK,
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};
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static const unsigned int scifa2_clk_c_pins[] = {
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/* SCK */
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RCAR_GP_PIN(5, 29),
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};
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static const unsigned int scifa2_clk_c_mux[] = {
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SCIFA2_SCK_C_MARK,
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};
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/* - SCIFB0 ----------------------------------------------------------------- */
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static const unsigned int scifb0_data_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10),
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};
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static const unsigned int scifb0_data_mux[] = {
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SCIFB0_RXD_MARK, SCIFB0_TXD_MARK,
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};
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static const unsigned int scifb0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 8),
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};
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static const unsigned int scifb0_clk_mux[] = {
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SCIFB0_SCK_MARK,
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};
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static const unsigned int scifb0_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 11),
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};
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static const unsigned int scifb0_ctrl_mux[] = {
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SCIFB0_RTS_N_MARK, SCIFB0_CTS_N_MARK,
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};
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static const unsigned int scifb0_data_b_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
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};
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static const unsigned int scifb0_data_b_mux[] = {
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SCIFB0_RXD_B_MARK, SCIFB0_TXD_B_MARK,
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};
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static const unsigned int scifb0_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 9),
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};
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static const unsigned int scifb0_clk_b_mux[] = {
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SCIFB0_SCK_B_MARK,
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};
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static const unsigned int scifb0_ctrl_b_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
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};
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static const unsigned int scifb0_ctrl_b_mux[] = {
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SCIFB0_RTS_N_B_MARK, SCIFB0_CTS_N_B_MARK,
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};
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static const unsigned int scifb0_data_c_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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};
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static const unsigned int scifb0_data_c_mux[] = {
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SCIFB0_RXD_C_MARK, SCIFB0_TXD_C_MARK,
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};
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/* - SCIFB1 ----------------------------------------------------------------- */
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static const unsigned int scifb1_data_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
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};
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static const unsigned int scifb1_data_mux[] = {
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SCIFB1_RXD_MARK, SCIFB1_TXD_MARK,
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};
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static const unsigned int scifb1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 14),
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};
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static const unsigned int scifb1_clk_mux[] = {
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SCIFB1_SCK_MARK,
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};
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static const unsigned int scifb1_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17),
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};
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static const unsigned int scifb1_ctrl_mux[] = {
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SCIFB1_RTS_N_MARK, SCIFB1_CTS_N_MARK,
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};
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static const unsigned int scifb1_data_b_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
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};
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static const unsigned int scifb1_data_b_mux[] = {
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SCIFB1_RXD_B_MARK, SCIFB1_TXD_B_MARK,
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};
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static const unsigned int scifb1_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 1),
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};
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static const unsigned int scifb1_clk_b_mux[] = {
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SCIFB1_SCK_B_MARK,
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};
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static const unsigned int scifb1_ctrl_b_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 4),
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};
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static const unsigned int scifb1_ctrl_b_mux[] = {
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SCIFB1_RTS_N_B_MARK, SCIFB1_CTS_N_B_MARK,
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};
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static const unsigned int scifb1_data_c_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
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};
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static const unsigned int scifb1_data_c_mux[] = {
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SCIFB1_RXD_C_MARK, SCIFB1_TXD_C_MARK,
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};
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static const unsigned int scifb1_data_d_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
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};
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static const unsigned int scifb1_data_d_mux[] = {
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SCIFB1_RXD_D_MARK, SCIFB1_TXD_D_MARK,
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};
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static const unsigned int scifb1_data_e_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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};
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static const unsigned int scifb1_data_e_mux[] = {
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SCIFB1_RXD_E_MARK, SCIFB1_TXD_E_MARK,
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};
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static const unsigned int scifb1_clk_e_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 17),
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};
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static const unsigned int scifb1_clk_e_mux[] = {
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SCIFB1_SCK_E_MARK,
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};
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static const unsigned int scifb1_data_f_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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};
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static const unsigned int scifb1_data_f_mux[] = {
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SCIFB1_RXD_F_MARK, SCIFB1_TXD_F_MARK,
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};
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static const unsigned int scifb1_data_g_pins[] = {
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/* RXD, TXD */
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RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
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};
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static const unsigned int scifb1_data_g_mux[] = {
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SCIFB1_RXD_G_MARK, SCIFB1_TXD_G_MARK,
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};
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static const unsigned int scifb1_clk_g_pins[] = {
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/* SCK */
|
||||
RCAR_GP_PIN(2, 20),
|
||||
};
|
||||
static const unsigned int scifb1_clk_g_mux[] = {
|
||||
SCIFB1_SCK_G_MARK,
|
||||
};
|
||||
/* - SCIFB2 ----------------------------------------------------------------- */
|
||||
static const unsigned int scifb2_data_pins[] = {
|
||||
/* RXD, TXD */
|
||||
RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23),
|
||||
};
|
||||
static const unsigned int scifb2_data_mux[] = {
|
||||
SCIFB2_RXD_MARK, SCIFB2_TXD_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_clk_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(4, 21),
|
||||
};
|
||||
static const unsigned int scifb2_clk_mux[] = {
|
||||
SCIFB2_SCK_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_ctrl_pins[] = {
|
||||
/* RTS, CTS */
|
||||
RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24),
|
||||
};
|
||||
static const unsigned int scifb2_ctrl_mux[] = {
|
||||
SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_data_b_pins[] = {
|
||||
/* RXD, TXD */
|
||||
RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 30),
|
||||
};
|
||||
static const unsigned int scifb2_data_b_mux[] = {
|
||||
SCIFB2_RXD_B_MARK, SCIFB2_TXD_B_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_clk_b_pins[] = {
|
||||
/* SCK */
|
||||
RCAR_GP_PIN(0, 31),
|
||||
};
|
||||
static const unsigned int scifb2_clk_b_mux[] = {
|
||||
SCIFB2_SCK_B_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_ctrl_b_pins[] = {
|
||||
/* RTS, CTS */
|
||||
RCAR_GP_PIN(0, 29), RCAR_GP_PIN(0, 27),
|
||||
};
|
||||
static const unsigned int scifb2_ctrl_b_mux[] = {
|
||||
SCIFB2_RTS_N_B_MARK, SCIFB2_CTS_N_B_MARK,
|
||||
};
|
||||
static const unsigned int scifb2_data_c_pins[] = {
|
||||
/* RXD, TXD */
|
||||
RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
|
||||
};
|
||||
static const unsigned int scifb2_data_c_mux[] = {
|
||||
SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
|
||||
};
|
||||
|
||||
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(eth_link),
|
||||
@ -1894,6 +2350,70 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(intc_irq1),
|
||||
SH_PFC_PIN_GROUP(intc_irq2),
|
||||
SH_PFC_PIN_GROUP(intc_irq3),
|
||||
SH_PFC_PIN_GROUP(scif0_data),
|
||||
SH_PFC_PIN_GROUP(scif0_clk),
|
||||
SH_PFC_PIN_GROUP(scif0_ctrl),
|
||||
SH_PFC_PIN_GROUP(scif0_data_b),
|
||||
SH_PFC_PIN_GROUP(scif1_data),
|
||||
SH_PFC_PIN_GROUP(scif1_clk),
|
||||
SH_PFC_PIN_GROUP(scif1_ctrl),
|
||||
SH_PFC_PIN_GROUP(scif1_data_b),
|
||||
SH_PFC_PIN_GROUP(scif1_data_c),
|
||||
SH_PFC_PIN_GROUP(scif1_data_d),
|
||||
SH_PFC_PIN_GROUP(scif1_clk_d),
|
||||
SH_PFC_PIN_GROUP(scif1_data_e),
|
||||
SH_PFC_PIN_GROUP(scif1_clk_e),
|
||||
SH_PFC_PIN_GROUP(scifa0_data),
|
||||
SH_PFC_PIN_GROUP(scifa0_clk),
|
||||
SH_PFC_PIN_GROUP(scifa0_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifa0_data_b),
|
||||
SH_PFC_PIN_GROUP(scifa0_clk_b),
|
||||
SH_PFC_PIN_GROUP(scifa0_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(scifa1_data),
|
||||
SH_PFC_PIN_GROUP(scifa1_clk),
|
||||
SH_PFC_PIN_GROUP(scifa1_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifa1_data_b),
|
||||
SH_PFC_PIN_GROUP(scifa1_clk_b),
|
||||
SH_PFC_PIN_GROUP(scifa1_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(scifa1_data_c),
|
||||
SH_PFC_PIN_GROUP(scifa1_clk_c),
|
||||
SH_PFC_PIN_GROUP(scifa1_ctrl_c),
|
||||
SH_PFC_PIN_GROUP(scifa1_data_d),
|
||||
SH_PFC_PIN_GROUP(scifa1_clk_d),
|
||||
SH_PFC_PIN_GROUP(scifa1_ctrl_d),
|
||||
SH_PFC_PIN_GROUP(scifa2_data),
|
||||
SH_PFC_PIN_GROUP(scifa2_clk),
|
||||
SH_PFC_PIN_GROUP(scifa2_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifa2_data_b),
|
||||
SH_PFC_PIN_GROUP(scifa2_data_c),
|
||||
SH_PFC_PIN_GROUP(scifa2_clk_c),
|
||||
SH_PFC_PIN_GROUP(scifb0_data),
|
||||
SH_PFC_PIN_GROUP(scifb0_clk),
|
||||
SH_PFC_PIN_GROUP(scifb0_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifb0_data_b),
|
||||
SH_PFC_PIN_GROUP(scifb0_clk_b),
|
||||
SH_PFC_PIN_GROUP(scifb0_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(scifb0_data_c),
|
||||
SH_PFC_PIN_GROUP(scifb1_data),
|
||||
SH_PFC_PIN_GROUP(scifb1_clk),
|
||||
SH_PFC_PIN_GROUP(scifb1_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_b),
|
||||
SH_PFC_PIN_GROUP(scifb1_clk_b),
|
||||
SH_PFC_PIN_GROUP(scifb1_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_c),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_d),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_e),
|
||||
SH_PFC_PIN_GROUP(scifb1_clk_e),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_f),
|
||||
SH_PFC_PIN_GROUP(scifb1_data_g),
|
||||
SH_PFC_PIN_GROUP(scifb1_clk_g),
|
||||
SH_PFC_PIN_GROUP(scifb2_data),
|
||||
SH_PFC_PIN_GROUP(scifb2_clk),
|
||||
SH_PFC_PIN_GROUP(scifb2_ctrl),
|
||||
SH_PFC_PIN_GROUP(scifb2_data_b),
|
||||
SH_PFC_PIN_GROUP(scifb2_clk_b),
|
||||
SH_PFC_PIN_GROUP(scifb2_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(scifb2_data_c),
|
||||
};
|
||||
|
||||
static const char * const eth_groups[] = {
|
||||
@ -1909,9 +2429,106 @@ static const char * const intc_groups[] = {
|
||||
"intc_irq2",
|
||||
"intc_irq3",
|
||||
};
|
||||
|
||||
static const char * const scif0_groups[] = {
|
||||
"scif0_data",
|
||||
"scif0_clk",
|
||||
"scif0_ctrl",
|
||||
"scif0_data_b",
|
||||
};
|
||||
|
||||
static const char * const scif1_groups[] = {
|
||||
"scif1_data",
|
||||
"scif1_clk",
|
||||
"scif1_ctrl",
|
||||
"scif1_data_b",
|
||||
"scif1_data_c",
|
||||
"scif1_data_d",
|
||||
"scif1_clk_d",
|
||||
"scif1_data_e",
|
||||
"scif1_clk_e",
|
||||
};
|
||||
|
||||
static const char * const scifa0_groups[] = {
|
||||
"scifa0_data",
|
||||
"scifa0_clk",
|
||||
"scifa0_ctrl",
|
||||
"scifa0_data_b",
|
||||
"scifa0_clk_b",
|
||||
"scifa0_ctrl_b",
|
||||
};
|
||||
|
||||
static const char * const scifa1_groups[] = {
|
||||
"scifa1_data",
|
||||
"scifa1_clk",
|
||||
"scifa1_ctrl",
|
||||
"scifa1_data_b",
|
||||
"scifa1_clk_b",
|
||||
"scifa1_ctrl_b",
|
||||
"scifa1_data_c",
|
||||
"scifa1_clk_c",
|
||||
"scifa1_ctrl_c",
|
||||
"scifa1_data_d",
|
||||
"scifa1_clk_d",
|
||||
"scifa1_ctrl_d",
|
||||
};
|
||||
|
||||
static const char * const scifa2_groups[] = {
|
||||
"scifa2_data",
|
||||
"scifa2_clk",
|
||||
"scifa2_ctrl",
|
||||
"scifa2_data_b",
|
||||
"scifa2_data_c",
|
||||
"scifa2_clk_c",
|
||||
};
|
||||
|
||||
static const char * const scifb0_groups[] = {
|
||||
"scifb0_data",
|
||||
"scifb0_clk",
|
||||
"scifb0_ctrl",
|
||||
"scifb0_data_b",
|
||||
"scifb0_clk_b",
|
||||
"scifb0_ctrl_b",
|
||||
"scifb0_data_c",
|
||||
};
|
||||
|
||||
static const char * const scifb1_groups[] = {
|
||||
"scifb1_data",
|
||||
"scifb1_clk",
|
||||
"scifb1_ctrl",
|
||||
"scifb1_data_b",
|
||||
"scifb1_clk_b",
|
||||
"scifb1_ctrl_b",
|
||||
"scifb1_data_c",
|
||||
"scifb1_data_d",
|
||||
"scifb1_data_e",
|
||||
"scifb1_clk_e",
|
||||
"scifb1_data_f",
|
||||
"scifb1_data_g",
|
||||
"scifb1_clk_g",
|
||||
};
|
||||
|
||||
static const char * const scifb2_groups[] = {
|
||||
"scifb2_data",
|
||||
"scifb2_clk",
|
||||
"scifb2_ctrl",
|
||||
"scifb2_data_b",
|
||||
"scifb2_clk_b",
|
||||
"scifb2_ctrl_b",
|
||||
"scifb2_data_c",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(eth),
|
||||
SH_PFC_FUNCTION(intc),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scifa0),
|
||||
SH_PFC_FUNCTION(scifa1),
|
||||
SH_PFC_FUNCTION(scifa2),
|
||||
SH_PFC_FUNCTION(scifb0),
|
||||
SH_PFC_FUNCTION(scifb1),
|
||||
SH_PFC_FUNCTION(scifb2),
|
||||
};
|
||||
|
||||
#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user