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drm/i915: Replace DRM_DEBUG with DRM_DEBUG_DRIVER

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Replace the DRM_DEBUG with DRM_DEBUG_DRIVER in generic i915 driver.
Then the debug info can be obtained by adding the boot option of
"drm.debug=0x02".

At the same time the debug info in increase/decrease clock is also
printed by using DRM_DEBUG_DRIVER instead of DRM_DEBUG_KMS.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Zhao Yakui 2009-10-09 11:39:40 +08:00 committed by Eric Anholt
parent 5c5a4359fe
commit 44d98a6142
6 changed files with 38 additions and 36 deletions
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4
drivers/gpu/drm/i915/i915_dma.c
View File

@ -1073,7 +1073,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
entry = *(volatile u32 *)(gtt + (gtt_addr / 1024)); entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));
DRM_DEBUG("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry); DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
/* Mask out these reserved bits on this hardware. */ /* Mask out these reserved bits on this hardware. */
if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) || if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) ||
@ -1099,7 +1099,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
phys =(entry & PTE_ADDRESS_MASK) | phys =(entry & PTE_ADDRESS_MASK) |
((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4)); ((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));
DRM_DEBUG("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys); DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
return phys; return phys;
} }

6
drivers/gpu/drm/i915/i915_gem.c
View File

@ -1617,7 +1617,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
OUT_RING(MI_USER_INTERRUPT); OUT_RING(MI_USER_INTERRUPT);
ADVANCE_LP_RING(); ADVANCE_LP_RING();
DRM_DEBUG("%d\n", seqno); DRM_DEBUG_DRIVER("%d\n", seqno);
request->seqno = seqno; request->seqno = seqno;
request->emitted_jiffies = jiffies; request->emitted_jiffies = jiffies;
@ -4367,7 +4367,7 @@ i915_gem_init_hws(struct drm_device *dev)
memset(dev_priv->hw_status_page, 0, PAGE_SIZE); memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
I915_READ(HWS_PGA); /* posting read */ I915_READ(HWS_PGA); /* posting read */
DRM_DEBUG("hws offset: 0x%08x\n", dev_priv->status_gfx_addr); DRM_DEBUG_DRIVER("hws offset: 0x%08x\n", dev_priv->status_gfx_addr);
return 0; return 0;
} }
@ -4801,7 +4801,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
user_data = (char __user *) (uintptr_t) args->data_ptr; user_data = (char __user *) (uintptr_t) args->data_ptr;
obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset; obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset;
DRM_DEBUG("obj_addr %p, %lld\n", obj_addr, args->size); DRM_DEBUG_DRIVER("obj_addr %p, %lld\n", obj_addr, args->size);
ret = copy_from_user(obj_addr, user_data, args->size); ret = copy_from_user(obj_addr, user_data, args->size);
if (ret) if (ret)
return -EFAULT; return -EFAULT;

2
drivers/gpu/drm/i915/i915_gem_tiling.c
View File

@ -121,7 +121,7 @@ intel_alloc_mchbar_resource(struct drm_device *dev)
0, pcibios_align_resource, 0, pcibios_align_resource,
dev_priv->bridge_dev); dev_priv->bridge_dev);
if (ret) { if (ret) {
DRM_DEBUG("failed bus alloc: %d\n", ret); DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret);
dev_priv->mch_res.start = 0; dev_priv->mch_res.start = 0;
goto out; goto out;
} }

26
drivers/gpu/drm/i915/i915_irq.c
View File

@ -191,7 +191,8 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
if (!i915_pipe_enabled(dev, pipe)) { if (!i915_pipe_enabled(dev, pipe)) {
DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe); DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
"pipe %d\n", pipe);
return 0; return 0;
} }
@ -220,7 +221,8 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
if (!i915_pipe_enabled(dev, pipe)) { if (!i915_pipe_enabled(dev, pipe)) {
DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe); DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
"pipe %d\n", pipe);
return 0; return 0;
} }
@ -309,19 +311,19 @@ static void i915_error_work_func(struct work_struct *work)
char *reset_event[] = { "RESET=1", NULL }; char *reset_event[] = { "RESET=1", NULL };
char *reset_done_event[] = { "ERROR=0", NULL }; char *reset_done_event[] = { "ERROR=0", NULL };
DRM_DEBUG("generating error event\n"); DRM_DEBUG_DRIVER("generating error event\n");
kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event);
if (atomic_read(&dev_priv->mm.wedged)) { if (atomic_read(&dev_priv->mm.wedged)) {
if (IS_I965G(dev)) { if (IS_I965G(dev)) {
DRM_DEBUG("resetting chip\n"); DRM_DEBUG_DRIVER("resetting chip\n");
kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event);
if (!i965_reset(dev, GDRST_RENDER)) { if (!i965_reset(dev, GDRST_RENDER)) {
atomic_set(&dev_priv->mm.wedged, 0); atomic_set(&dev_priv->mm.wedged, 0);
kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event); kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event);
} }
} else { } else {
printk("reboot required\n"); DRM_DEBUG_DRIVER("reboot required\n");
} }
} }
} }
@ -347,7 +349,7 @@ static void i915_capture_error_state(struct drm_device *dev)
error = kmalloc(sizeof(*error), GFP_ATOMIC); error = kmalloc(sizeof(*error), GFP_ATOMIC);
if (!error) { if (!error) {
DRM_DEBUG("out ot memory, not capturing error state\n"); DRM_DEBUG_DRIVER("out ot memory, not capturing error state\n");
goto out; goto out;
} }
@ -560,14 +562,14 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
*/ */
if (pipea_stats & 0x8000ffff) { if (pipea_stats & 0x8000ffff) {
if (pipea_stats & PIPE_FIFO_UNDERRUN_STATUS) if (pipea_stats & PIPE_FIFO_UNDERRUN_STATUS)
DRM_DEBUG("pipe a underrun\n"); DRM_DEBUG_DRIVER("pipe a underrun\n");
I915_WRITE(PIPEASTAT, pipea_stats); I915_WRITE(PIPEASTAT, pipea_stats);
irq_received = 1; irq_received = 1;
} }
if (pipeb_stats & 0x8000ffff) { if (pipeb_stats & 0x8000ffff) {
if (pipeb_stats & PIPE_FIFO_UNDERRUN_STATUS) if (pipeb_stats & PIPE_FIFO_UNDERRUN_STATUS)
DRM_DEBUG("pipe b underrun\n"); DRM_DEBUG_DRIVER("pipe b underrun\n");
I915_WRITE(PIPEBSTAT, pipeb_stats); I915_WRITE(PIPEBSTAT, pipeb_stats);
irq_received = 1; irq_received = 1;
} }
@ -583,7 +585,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
(iir & I915_DISPLAY_PORT_INTERRUPT)) { (iir & I915_DISPLAY_PORT_INTERRUPT)) {
u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT); u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
DRM_DEBUG("hotplug event received, stat 0x%08x\n", DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
hotplug_status); hotplug_status);
if (hotplug_status & dev_priv->hotplug_supported_mask) if (hotplug_status & dev_priv->hotplug_supported_mask)
queue_work(dev_priv->wq, queue_work(dev_priv->wq,
@ -597,7 +599,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
(hotplug_status & CRT_EOS_INT_STATUS)) { (hotplug_status & CRT_EOS_INT_STATUS)) {
u32 temp; u32 temp;
DRM_DEBUG("EOS interrupt occurs\n"); DRM_DEBUG_DRIVER("EOS interrupt occurs\n");
/* status is already cleared */ /* status is already cleared */
temp = I915_READ(ADPA); temp = I915_READ(ADPA);
temp &= ~ADPA_DAC_ENABLE; temp &= ~ADPA_DAC_ENABLE;
@ -676,7 +678,7 @@ static int i915_emit_irq(struct drm_device * dev)
i915_kernel_lost_context(dev); i915_kernel_lost_context(dev);
DRM_DEBUG("\n"); DRM_DEBUG_DRIVER("\n");
dev_priv->counter++; dev_priv->counter++;
if (dev_priv->counter > 0x7FFFFFFFUL) if (dev_priv->counter > 0x7FFFFFFFUL)
@ -741,7 +743,7 @@ static int i915_wait_irq(struct drm_device * dev, int irq_nr)
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
int ret = 0; int ret = 0;
DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,
READ_BREADCRUMB(dev_priv)); READ_BREADCRUMB(dev_priv));
if (READ_BREADCRUMB(dev_priv) >= irq_nr) { if (READ_BREADCRUMB(dev_priv) >= irq_nr) {

16
drivers/gpu/drm/i915/i915_opregion.c
View File

@ -224,7 +224,7 @@ void opregion_asle_intr(struct drm_device *dev)
asle_req = asle->aslc & ASLE_REQ_MSK; asle_req = asle->aslc & ASLE_REQ_MSK;
if (!asle_req) { if (!asle_req) {
DRM_DEBUG("non asle set request??\n"); DRM_DEBUG_DRIVER("non asle set request??\n");
return; return;
} }
@ -361,9 +361,9 @@ int intel_opregion_init(struct drm_device *dev, int resume)
int err = 0; int err = 0;
pci_read_config_dword(dev->pdev, PCI_ASLS, &asls); pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
DRM_DEBUG("graphic opregion physical addr: 0x%x\n", asls); DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
if (asls == 0) { if (asls == 0) {
DRM_DEBUG("ACPI OpRegion not supported!\n"); DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
return -ENOTSUPP; return -ENOTSUPP;
} }
@ -373,30 +373,30 @@ int intel_opregion_init(struct drm_device *dev, int resume)
opregion->header = base; opregion->header = base;
if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) { if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) {
DRM_DEBUG("opregion signature mismatch\n"); DRM_DEBUG_DRIVER("opregion signature mismatch\n");
err = -EINVAL; err = -EINVAL;
goto err_out; goto err_out;
} }
mboxes = opregion->header->mboxes; mboxes = opregion->header->mboxes;
if (mboxes & MBOX_ACPI) { if (mboxes & MBOX_ACPI) {
DRM_DEBUG("Public ACPI methods supported\n"); DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
opregion->acpi = base + OPREGION_ACPI_OFFSET; opregion->acpi = base + OPREGION_ACPI_OFFSET;
if (drm_core_check_feature(dev, DRIVER_MODESET)) if (drm_core_check_feature(dev, DRIVER_MODESET))
intel_didl_outputs(dev); intel_didl_outputs(dev);
} else { } else {
DRM_DEBUG("Public ACPI methods not supported\n"); DRM_DEBUG_DRIVER("Public ACPI methods not supported\n");
err = -ENOTSUPP; err = -ENOTSUPP;
goto err_out; goto err_out;
} }
opregion->enabled = 1; opregion->enabled = 1;
if (mboxes & MBOX_SWSCI) { if (mboxes & MBOX_SWSCI) {
DRM_DEBUG("SWSCI supported\n"); DRM_DEBUG_DRIVER("SWSCI supported\n");
opregion->swsci = base + OPREGION_SWSCI_OFFSET; opregion->swsci = base + OPREGION_SWSCI_OFFSET;
} }
if (mboxes & MBOX_ASLE) { if (mboxes & MBOX_ASLE) {
DRM_DEBUG("ASLE supported\n"); DRM_DEBUG_DRIVER("ASLE supported\n");
opregion->asle = base + OPREGION_ASLE_OFFSET; opregion->asle = base + OPREGION_ASLE_OFFSET;
opregion_enable_asle(dev); opregion_enable_asle(dev);
} }

20
drivers/gpu/drm/i915/intel_display.c
View File

@ -3690,7 +3690,7 @@ static void intel_gpu_idle_timer(unsigned long arg)
struct drm_device *dev = (struct drm_device *)arg; struct drm_device *dev = (struct drm_device *)arg;
drm_i915_private_t *dev_priv = dev->dev_private; drm_i915_private_t *dev_priv = dev->dev_private;
DRM_DEBUG("idle timer fired, downclocking\n"); DRM_DEBUG_DRIVER("idle timer fired, downclocking\n");
dev_priv->busy = false; dev_priv->busy = false;
@ -3705,7 +3705,7 @@ void intel_increase_renderclock(struct drm_device *dev, bool schedule)
return; return;
if (!dev_priv->render_reclock_avail) { if (!dev_priv->render_reclock_avail) {
DRM_DEBUG("not reclocking render clock\n"); DRM_DEBUG_DRIVER("not reclocking render clock\n");
return; return;
} }
@ -3714,7 +3714,7 @@ void intel_increase_renderclock(struct drm_device *dev, bool schedule)
pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock); pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock);
else if (IS_I85X(dev)) else if (IS_I85X(dev))
pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock); pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock);
DRM_DEBUG("increasing render clock frequency\n"); DRM_DEBUG_DRIVER("increasing render clock frequency\n");
/* Schedule downclock */ /* Schedule downclock */
if (schedule) if (schedule)
@ -3730,7 +3730,7 @@ void intel_decrease_renderclock(struct drm_device *dev)
return; return;
if (!dev_priv->render_reclock_avail) { if (!dev_priv->render_reclock_avail) {
DRM_DEBUG("not reclocking render clock\n"); DRM_DEBUG_DRIVER("not reclocking render clock\n");
return; return;
} }
@ -3790,7 +3790,7 @@ void intel_decrease_renderclock(struct drm_device *dev)
pci_write_config_word(dev->pdev, HPLLCC, hpllcc); pci_write_config_word(dev->pdev, HPLLCC, hpllcc);
} }
DRM_DEBUG("decreasing render clock frequency\n"); DRM_DEBUG_DRIVER("decreasing render clock frequency\n");
} }
/* Note that no increase function is needed for this - increase_renderclock() /* Note that no increase function is needed for this - increase_renderclock()
@ -3824,7 +3824,7 @@ static void intel_crtc_idle_timer(unsigned long arg)
struct drm_crtc *crtc = &intel_crtc->base; struct drm_crtc *crtc = &intel_crtc->base;
drm_i915_private_t *dev_priv = crtc->dev->dev_private; drm_i915_private_t *dev_priv = crtc->dev->dev_private;
DRM_DEBUG("idle timer fired, downclocking\n"); DRM_DEBUG_DRIVER("idle timer fired, downclocking\n");
intel_crtc->busy = false; intel_crtc->busy = false;
@ -3847,7 +3847,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule)
return; return;
if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) { if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
DRM_DEBUG("upclocking LVDS\n"); DRM_DEBUG_DRIVER("upclocking LVDS\n");
/* Unlock panel regs */ /* Unlock panel regs */
I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
@ -3858,7 +3858,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule)
intel_wait_for_vblank(dev); intel_wait_for_vblank(dev);
dpll = I915_READ(dpll_reg); dpll = I915_READ(dpll_reg);
if (dpll & DISPLAY_RATE_SELECT_FPA1) if (dpll & DISPLAY_RATE_SELECT_FPA1)
DRM_DEBUG("failed to upclock LVDS!\n"); DRM_DEBUG_DRIVER("failed to upclock LVDS!\n");
/* ...and lock them again */ /* ...and lock them again */
I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
@ -3890,7 +3890,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
* the manual case. * the manual case.
*/ */
if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) { if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
DRM_DEBUG("downclocking LVDS\n"); DRM_DEBUG_DRIVER("downclocking LVDS\n");
/* Unlock panel regs */ /* Unlock panel regs */
I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
@ -3901,7 +3901,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
intel_wait_for_vblank(dev); intel_wait_for_vblank(dev);
dpll = I915_READ(dpll_reg); dpll = I915_READ(dpll_reg);
if (!(dpll & DISPLAY_RATE_SELECT_FPA1)) if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
DRM_DEBUG("failed to downclock LVDS!\n"); DRM_DEBUG_DRIVER("failed to downclock LVDS!\n");
/* ...and lock them again */ /* ...and lock them again */
I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3); I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);