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[WATCHDOG] w83697hf/hg WDT driver - patch 5

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This is patch 5 in the series of patches that converts
Marcus Junker's w83697hf watchdog driver to Samuel Tardieau's
w83697hf/hg watchdog driver.

This patch contains following changes:
 - Rename the Extended Function Registers to the names
   used in the data-sheet.

Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Samuel Tardieu 2006-09-07 11:57:00 +02:00 committed by Wim Van Sebroeck
parent eb64419e39
commit 44d7d3282b
1 changed files with 21 additions and 21 deletions
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42
drivers/char/watchdog/w83697hf_wdt.c
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@ -64,29 +64,29 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CON
* Kernel methods.
*/
#define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
#define WDT_EFIR (wdt_io+0) /* Extended Function Index Register (same as EFER) */
#define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
#define W83697HF_EFER (wdt_io+0) /* Extended Function Enable Register */
#define W83697HF_EFIR (wdt_io+0) /* Extended Function Index Register (same as EFER) */
#define W83697HF_EFDR (wdt_io+1) /* Extended Function Data Register */
static void
w83697hf_select_wd_register(void)
{
outb_p(0x87, WDT_EFER); /* Enter extended function mode */
outb_p(0x87, WDT_EFER); /* Again according to manual */
outb_p(0x87, W83697HF_EFER); /* Enter extended function mode */
outb_p(0x87, W83697HF_EFER); /* Again according to manual */
outb_p(0x29, WDT_EFER); /* select CR29 */
outb_p(0x20, WDT_EFDR); /* select WDTO */
outb_p(0x29, W83697HF_EFER); /* select CR29 */
outb_p(0x20, W83697HF_EFDR); /* select WDTO */
outb_p(0x07, WDT_EFER); /* point to logical device number reg */
outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */
outb_p(0x30, WDT_EFER); /* select CR30 */
outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
outb_p(0x07, W83697HF_EFER); /* point to logical device number reg */
outb_p(0x08, W83697HF_EFDR); /* select logical device 8 (GPIO2) */
outb_p(0x30, W83697HF_EFER); /* select CR30 */
outb_p(0x01, W83697HF_EFDR); /* set bit 0 to activate GPIO2 */
}
static void
w83697hf_unselect_wd_register(void)
{
outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
outb_p(0xAA, W83697HF_EFER); /* Leave extended function mode */
}
static void
@ -96,17 +96,17 @@ w83697hf_init(void)
w83697hf_select_wd_register();
outb_p(0xF3, WDT_EFER); /* Select CRF3 */
outb_p(0xF3, W83697HF_EFER); /* Select CRF3 */
t=inb_p(WDT_EFDR); /* read CRF3 */
t=inb_p(W83697HF_EFDR); /* read CRF3 */
if (t != 0) {
printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout);
outb_p(timeout, WDT_EFDR); /* Write back to CRF3 */
outb_p(timeout, W83697HF_EFDR); /* Write back to CRF3 */
}
outb_p(0xF4, WDT_EFER); /* Select CRF4 */
t=inb_p(WDT_EFDR); /* read CRF4 */
t&=~0x0C; /* set second mode & disable keyboard turning off watchdog */
outb_p(t, WDT_EFDR); /* Write back to CRF4 */
outb_p(0xF4, W83697HF_EFER); /* Select CRF4 */
t=inb_p(W83697HF_EFDR); /* read CRF4 */
t&=~0x0C; /* set second mode & disable keyboard turning off watchdog */
outb_p(t, W83697HF_EFDR); /* Write back to CRF4 */
w83697hf_unselect_wd_register();
}
@ -118,8 +118,8 @@ wdt_ctrl(int timeout)
w83697hf_select_wd_register();
outb_p(0xF4, WDT_EFER); /* Select CRF4 */
outb_p(timeout, WDT_EFDR); /* Write Timeout counter to CRF4 */
outb_p(0xF4, W83697HF_EFER); /* Select CRF4 */
outb_p(timeout, W83697HF_EFDR); /* Write Timeout counter to CRF4 */
w83697hf_unselect_wd_register();