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drm/amdgpu: Add a UAPI flag for user to call mem_sync
When this flag is set in the CS IB flags, it causes a memory cache flush of the GFX. v2: Move new flag to drm_amdgpu_cs_chunk_ib.flags Bump up UAPI version Remove condition on job != null to emit mem_sync Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -86,9 +86,10 @@
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* - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
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* - 3.36.0 - Allow reading more status registers on si/cik
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* - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
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* - 3.38.0 - Add AMDGPU_IB_FLAG_EMIT_MEM_SYNC
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*/
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#define KMS_DRIVER_MAJOR 3
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#define KMS_DRIVER_MINOR 37
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#define KMS_DRIVER_MINOR 38
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#define KMS_DRIVER_PATCHLEVEL 0
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int amdgpu_vram_limit = 0;
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@ -189,6 +189,9 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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dma_fence_put(tmp);
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}
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if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)
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ring->funcs->emit_mem_sync(ring);
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if (ring->funcs->insert_start)
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ring->funcs->insert_start(ring);
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@ -602,6 +602,10 @@ union drm_amdgpu_cs {
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*/
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#define AMDGPU_IB_FLAGS_SECURE (1 << 5)
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/* Tell KMD to flush and invalidate caches
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*/
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#define AMDGPU_IB_FLAG_EMIT_MEM_SYNC (1 << 6)
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struct drm_amdgpu_cs_chunk_ib {
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__u32 _pad;
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/** AMDGPU_IB_FLAG_* */
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