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arm64: dts: visconti: Update the clock providers for UART
Remove fixed clock and source common clock for UART. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Link: https://lore.kernel.org/r/20220510015229.139818-2-nobuhiro1.iwamatsu@toshiba.co.jp/
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@ -32,14 +32,10 @@
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&uart0 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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&uart1 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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&piether {
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@ -32,14 +32,10 @@
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&uart0 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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&uart1 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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&piether {
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@ -129,12 +129,6 @@
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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};
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uart_clk: uart-clk {
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compatible = "fixed-clock";
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clock-frequency = <150000000>;
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#clock-cells = <0>;
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};
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clk25mhz: clk25mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@ -243,6 +237,8 @@
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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clocks = <&pismu TMPV770X_CLK_PIUART0>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -252,6 +248,8 @@
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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clocks = <&pismu TMPV770X_CLK_PIUART1>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -261,6 +259,8 @@
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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clocks = <&pismu TMPV770X_CLK_PIUART2>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -270,6 +270,8 @@
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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clocks = <&pismu TMPV770X_CLK_PIUART2>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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