korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-03 17:14:14 +08:00
Code Issues Packages Projects Releases Wiki Activity

The biggest change is a fix to deal with different power state

Browse Source 
on omap2 registers that causes issues trying to use common PM code.
 Also fix few incorrect registers, and an issue for omap1 USB, and
 few sparse fixes for issues that sneaked in with all the clean-up.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQ7FjAAAoJEBvUPslcq6Vz4QEQAIEh1cbAPJ+zMoZjviZ9t4iE
 MvYsxp6htB1KAx1esFqiqBdiBF6CuNW6ffGRpX93RbsZzmCXYM6T87opS/VrqeQh
 El5yeEeERe/tC0ZZMy1GKyutGz0L8su4XMCiOo5fZM+PtkJhmdWKtcfeEhRVyAKA
 3CR0SEHrV0+IEYwnvV7w3il0dxGXOdB42jNSVZFa4bks10Mty7k4yVEKUCS+iE+Z
 wwsgVCy2TWrECcWj+pdbiGJCh3kUfWVUYTaAXxpZMSPZNyiIe+WYWxieGg/O3DeX
 f5QE9/BRo12btT8vvIxxNtlDe62on/KkYQOFVDZ6pc+xf+GXja+3HFglwIaQsY6z
 GYI8DDwjHMoRrR0oPx86jSUS2fqS7o26XC7XEwjnCkgxysYv5NmTIz0Avpz/8m5T
 N8gpVPl8uVxbku0xH9ZhWUlbxfL1rkG/GUIJtrjgdg50rsFmqUDKJsZwTxfNqhe2
 mQ6TUWDr9JvTbam+NXN2JMvSp3g+9UTYz4isDvRL0HTqPhteCWZQnDzyHGpfodxu
 AEQSvEowQcSHlnz0G2CYwItT6HI2i9i8s2XpLsNxDsSgjYPPvuDcSxOmzn3a74YI
 WPKkAumAM01dvGNrOcBQJffF152YKMpqY7H1PKBY1zvgj7Z5yYlutVo1EUNvwDBD
 IY8bJji5X2t+EitH9fna
 =gqPM
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren:
The biggest change is a fix to deal with different power state
on omap2 registers that causes issues trying to use common PM code.
Also fix few incorrect registers, and an issue for omap1 USB, and
few sparse fixes for issues that sneaked in with all the clean-up.

* tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  ARM: OMAP1: fix USB configuration use-after-release
  ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
  ARM: OMAP3: clock data: Add missing enable/disable for EMU clock
  ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources
  ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets
  ARM: OMAP4: PRM: Correct reset source map
  ARM: OMAP: SRAM: resolve sparse warnings
  ARM: OMAP AM33xx: hwmod data: resolve sparse warnings
  ARM: OMAP: 32k counter: resolve sparse warnings

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-01-08 09:49:50 -08:00
commit 434fec1694
11 changed files with 132 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_usb_config ams_delta_usb_config = {
static struct omap_usb_config ams_delta_usb_config __initdata = {
.register_host = 1,
.hmc_mode = 16,
.pins[0] = 2,

8
arch/arm/mach-omap1/usb.c
View File

@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
#endif
void __init omap1_usb_init(struct omap_usb_config *pdata)
void __init omap1_usb_init(struct omap_usb_config *_pdata)
{
struct omap_usb_config *pdata;
pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return;
pdata->usb0_init = omap1_usb0_init;
pdata->usb1_init = omap1_usb1_init;
pdata->usb2_init = omap1_usb2_init;

2
arch/arm/mach-omap2/cclock3xxx_data.c
View File

@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
.recalc_rate = &omap2_clksel_recalc,
.get_parent = &omap2_clksel_find_parent_index,
.set_parent = &omap2_clksel_set_parent,
.enable = &omap2_clkops_enable_clkdm,
.disable = &omap2_clkops_disable_clkdm,
};
static struct clk emu_src_ck;

6
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
View File

@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
{ .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
{ .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
{ .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
{ .irq = -1 + OMAP_INTC_START, },
{ .irq = -1, },
};
static struct omap_hwmod am33xx_usbss_hwmod = {
@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
.user = OCP_USER_MPU,
};
struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{
.pa_start = 0x4A101000,
.pa_end = 0x4A101000 + SZ_256 - 1,
@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{ }
};
struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
.master = &am33xx_cpgmac0_hwmod,
.slave = &am33xx_mdio_hwmod,
.addr = am33xx_mdio_addr_space,

88
arch/arm/mach-omap2/prm2xxx.c
View File

@ -27,6 +27,14 @@
#include "cm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"
/*
* OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
* these are reversed from the bits used on OMAP3+
*/
#define OMAP24XX_PWRDM_POWER_ON 0x0
#define OMAP24XX_PWRDM_POWER_RET 0x1
#define OMAP24XX_PWRDM_POWER_OFF 0x3
/*
* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
* hardware register (which are specific to the OMAP2xxx SoCs) to
@ -67,6 +75,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
return r;
}
/**
* omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
* @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
*
* Return the common power state bits corresponding to the OMAP2xxx
* hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
*/
static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
{
u8 pwrst;
switch (omap2xxx_pwrst) {
case OMAP24XX_PWRDM_POWER_OFF:
pwrst = PWRDM_POWER_OFF;
break;
case OMAP24XX_PWRDM_POWER_RET:
pwrst = PWRDM_POWER_RET;
break;
case OMAP24XX_PWRDM_POWER_ON:
pwrst = PWRDM_POWER_ON;
break;
default:
return -EINVAL;
}
return pwrst;
}
/**
* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
*
@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
return 0;
}
static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
u8 omap24xx_pwrst;
switch (pwrst) {
case PWRDM_POWER_OFF:
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
break;
case PWRDM_POWER_RET:
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
break;
case PWRDM_POWER_ON:
omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
break;
default:
return -EINVAL;
}
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
return 0;
}
static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
u8 omap2xxx_pwrst;
omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTCTRL,
OMAP_POWERSTATE_MASK);
return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
}
static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
u8 omap2xxx_pwrst;
omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTST,
OMAP_POWERSTATEST_MASK);
return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
}
struct pwrdm_ops omap2_pwrdm_operations = {
.pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
.pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,

22
arch/arm/mach-omap2/prm2xxx_3xxx.c
View File

@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
/* Powerdomain low-level functions */
/* Common functions across OMAP2 and OMAP3 */
int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
return 0;
}
int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTCTRL,
OMAP_POWERSTATE_MASK);
}
int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTST,
OMAP_POWERSTATEST_MASK);
}
int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
u8 pwrst)
{

28
arch/arm/mach-omap2/prm3xxx.c
View File

@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
/* Powerdomain low-level functions */
static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
return 0;
}
static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTCTRL,
OMAP_POWERSTATE_MASK);
}
static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
OMAP2_PM_PWSTST,
OMAP_POWERSTATEST_MASK);
}
/* Applicable only for OMAP3. Not supported on OMAP2 */
static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
}
struct pwrdm_ops omap3_pwrdm_operations = {
.pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
.pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
.pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,

6
arch/arm/mach-omap2/prm44xx.c
View File

@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
* enumeration)
*/
static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
{ OMAP4430_RST_GLOBAL_WARM_SW_SHIFT,
{ OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
{ OMAP4430_RST_GLOBAL_COLD_SW_SHIFT,
{ OMAP4430_GLOBAL_COLD_RST_SHIFT,
OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
{ OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
u32 r = 0;
u32 v;
v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
OMAP4_RM_RSTST);
p = omap44xx_prm_reset_src_map;

4
arch/arm/mach-omap2/prm44xx.h
View File

@ -62,8 +62,8 @@
/* OMAP4 specific register offsets */
#define OMAP4_RM_RSTCTRL 0x0000
#define OMAP4_RM_RSTTIME 0x0004
#define OMAP4_RM_RSTST 0x0008
#define OMAP4_RM_RSTST 0x0004
#define OMAP4_RM_RSTTIME 0x0008
#define OMAP4_PM_PWSTCTRL 0x0000
#define OMAP4_PM_PWSTST 0x0004

2
arch/arm/plat-omap/counter_32k.c
View File

@ -22,6 +22,8 @@
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
#include <plat/counter-32k.h>
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)

2
arch/arm/plat-omap/sram.c
View File

@ -26,6 +26,8 @@
#include <asm/mach/map.h>
#include <plat/sram.h>
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
static void __iomem *omap_sram_base;