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x86: i8259: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
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020dd984d7
commit
4305df947c
@ -55,6 +55,8 @@ extern struct irq_chip i8259A_chip;
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struct legacy_pic {
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int nr_legacy_irqs;
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struct irq_chip *chip;
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void (*mask)(unsigned int irq);
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void (*unmask)(unsigned int irq);
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void (*mask_all)(void);
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void (*restore_mask)(void);
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void (*init)(int auto_eoi);
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@ -1459,7 +1459,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
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ioapic_register_intr(irq, desc, trigger);
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if (irq < legacy_pic->nr_legacy_irqs)
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legacy_pic->chip->mask(irq);
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legacy_pic->mask(irq);
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ioapic_write_entry(apic_id, pin, entry);
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}
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@ -2233,7 +2233,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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if (irq < legacy_pic->nr_legacy_irqs) {
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legacy_pic->chip->mask(irq);
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legacy_pic->mask(irq);
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if (legacy_pic->irq_pending(irq))
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was_pending = 1;
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}
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@ -2928,7 +2928,7 @@ static inline void __init check_timer(void)
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/*
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* get/set the timer IRQ vector:
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*/
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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assign_irq_vector(0, cfg, apic->target_cpus());
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/*
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@ -3000,7 +3000,7 @@ static inline void __init check_timer(void)
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if (timer_irq_works()) {
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if (nmi_watchdog == NMI_IO_APIC) {
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setup_nmi();
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legacy_pic->chip->unmask(0);
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legacy_pic->unmask(0);
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}
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if (disable_timer_pin_1 > 0)
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clear_IO_APIC_pin(0, pin1);
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@ -3023,14 +3023,14 @@ static inline void __init check_timer(void)
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*/
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replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2);
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setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
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legacy_pic->chip->unmask(0);
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legacy_pic->unmask(0);
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if (timer_irq_works()) {
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apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
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timer_through_8259 = 1;
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if (nmi_watchdog == NMI_IO_APIC) {
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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setup_nmi();
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legacy_pic->chip->unmask(0);
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legacy_pic->unmask(0);
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}
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goto out;
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}
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@ -3038,7 +3038,7 @@ static inline void __init check_timer(void)
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* Cleanup, just in case ...
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*/
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local_irq_disable();
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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clear_IO_APIC_pin(apic2, pin2);
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apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
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}
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@ -3057,14 +3057,14 @@ static inline void __init check_timer(void)
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lapic_register_intr(0, desc);
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apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */
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legacy_pic->chip->unmask(0);
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legacy_pic->unmask(0);
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if (timer_irq_works()) {
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apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
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goto out;
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}
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local_irq_disable();
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
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apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
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@ -178,7 +178,7 @@ int __init check_nmi_watchdog(void)
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error:
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if (nmi_watchdog == NMI_IO_APIC) {
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if (!timer_through_8259)
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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on_each_cpu(__acpi_nmi_disable, NULL, 1);
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}
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@ -29,24 +29,10 @@
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* plus some generic x86 specific things if generic specifics makes
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* any sense at all.
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*/
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static void init_8259A(int auto_eoi);
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static int i8259A_auto_eoi;
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DEFINE_RAW_SPINLOCK(i8259A_lock);
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static void mask_and_ack_8259A(unsigned int);
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static void mask_8259A(void);
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static void unmask_8259A(void);
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static void disable_8259A_irq(unsigned int irq);
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static void enable_8259A_irq(unsigned int irq);
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static void init_8259A(int auto_eoi);
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static int i8259A_irq_pending(unsigned int irq);
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struct irq_chip i8259A_chip = {
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.name = "XT-PIC",
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.mask = disable_8259A_irq,
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.disable = disable_8259A_irq,
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.unmask = enable_8259A_irq,
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.mask_ack = mask_and_ack_8259A,
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};
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/*
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* 8259A PIC functions to handle ISA devices:
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@ -68,7 +54,7 @@ unsigned int cached_irq_mask = 0xffff;
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*/
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unsigned long io_apic_irqs;
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static void disable_8259A_irq(unsigned int irq)
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static void mask_8259A_irq(unsigned int irq)
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{
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unsigned int mask = 1 << irq;
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unsigned long flags;
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@ -82,7 +68,12 @@ static void disable_8259A_irq(unsigned int irq)
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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}
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static void enable_8259A_irq(unsigned int irq)
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static void disable_8259A_irq(struct irq_data *data)
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{
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mask_8259A_irq(data->irq);
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}
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static void unmask_8259A_irq(unsigned int irq)
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{
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unsigned int mask = ~(1 << irq);
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unsigned long flags;
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@ -96,6 +87,11 @@ static void enable_8259A_irq(unsigned int irq)
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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}
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static void enable_8259A_irq(struct irq_data *data)
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{
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unmask_8259A_irq(data->irq);
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}
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static int i8259A_irq_pending(unsigned int irq)
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{
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unsigned int mask = 1<<irq;
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@ -117,7 +113,7 @@ static void make_8259A_irq(unsigned int irq)
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disable_irq_nosync(irq);
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io_apic_irqs &= ~(1<<irq);
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set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
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"XT");
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i8259A_chip.name);
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enable_irq(irq);
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}
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@ -150,8 +146,9 @@ static inline int i8259A_irq_real(unsigned int irq)
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* first, _then_ send the EOI, and the order of EOI
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* to the two 8259s is important!
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*/
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static void mask_and_ack_8259A(unsigned int irq)
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static void mask_and_ack_8259A(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned int irqmask = 1 << irq;
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unsigned long flags;
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@ -223,6 +220,14 @@ spurious_8259A_irq:
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}
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}
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struct irq_chip i8259A_chip = {
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.name = "XT-PIC",
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.irq_mask = disable_8259A_irq,
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.irq_disable = disable_8259A_irq,
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.irq_unmask = enable_8259A_irq,
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.irq_mask_ack = mask_and_ack_8259A,
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};
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static char irq_trigger[2];
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/**
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* ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ
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@ -342,9 +347,9 @@ static void init_8259A(int auto_eoi)
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* In AEOI mode we just have to mask the interrupt
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* when acking.
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*/
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i8259A_chip.mask_ack = disable_8259A_irq;
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i8259A_chip.irq_mask_ack = disable_8259A_irq;
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else
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i8259A_chip.mask_ack = mask_and_ack_8259A;
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i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
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udelay(100); /* wait for 8259A to initialize */
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@ -363,14 +368,6 @@ static void init_8259A(int auto_eoi)
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static void legacy_pic_noop(void) { };
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static void legacy_pic_uint_noop(unsigned int unused) { };
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static void legacy_pic_int_noop(int unused) { };
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static struct irq_chip dummy_pic_chip = {
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.name = "dummy pic",
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.mask = legacy_pic_uint_noop,
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.unmask = legacy_pic_uint_noop,
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.disable = legacy_pic_uint_noop,
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.mask_ack = legacy_pic_uint_noop,
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};
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static int legacy_pic_irq_pending_noop(unsigned int irq)
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{
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return 0;
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@ -378,7 +375,9 @@ static int legacy_pic_irq_pending_noop(unsigned int irq)
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struct legacy_pic null_legacy_pic = {
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.nr_legacy_irqs = 0,
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.chip = &dummy_pic_chip,
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.chip = &dummy_irq_chip,
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.mask = legacy_pic_uint_noop,
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.unmask = legacy_pic_uint_noop,
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.mask_all = legacy_pic_noop,
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.restore_mask = legacy_pic_noop,
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.init = legacy_pic_int_noop,
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@ -389,7 +388,9 @@ struct legacy_pic null_legacy_pic = {
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struct legacy_pic default_legacy_pic = {
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.nr_legacy_irqs = NR_IRQS_LEGACY,
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.chip = &i8259A_chip,
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.mask_all = mask_8259A,
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.mask = mask_8259A_irq,
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.unmask = unmask_8259A_irq,
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.mask_all = mask_8259A,
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.restore_mask = unmask_8259A,
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.init = init_8259A,
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.irq_pending = i8259A_irq_pending,
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@ -324,9 +324,9 @@ notrace static void __cpuinit start_secondary(void *unused)
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check_tsc_sync_target();
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if (nmi_watchdog == NMI_IO_APIC) {
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legacy_pic->chip->mask(0);
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legacy_pic->mask(0);
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enable_NMI_through_LVT0();
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legacy_pic->chip->unmask(0);
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legacy_pic->unmask(0);
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}
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/* This must be done before setting cpu_online_mask */
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