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- Remove the vendor check when selecting MWAIT as the default idle state
- Respect idle=nomwait when supplied on the kernel cmdline - Two small cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmLntx0ACgkQEsHwGGHe VUqlRxAAkULobsk6Dx3wrQcYlpA8Mt/ctttTQXWiIQwhK1j7uP0zlGWBqImr5Wsk T04g1s29azulnPs3PydCF2QlLqSyF4v2PyyUwnpKfTP6CPM+MLtz98Gm6Xcbkt+s f28ISYgNP+15tskWdNqB5XIVGkuyBdNne9TiFwtnVrJYF47FSwqEWRyqMH+bIOGT wSZUCfjcw7PtKwfIAmYq4beS2+wbY9bsfVyIz+H0ks2EVFQdjYWb/kH9PgUYEQFe VEOBsPvTHDOJt0QXEXSJjmoSRUS77Wduw56Y3L2T4jWdXXQFWJ79rqNYDBvXGAdh Y8BKM5IYFZpzrmfw2RB6jbDY/JWO5PPFvHTXogQf9+wttSerZEffVQdOeTwjT8VD wc9/ZnNkT7915033VI90V+hdFkwarq8FXuFH8TkzcxP9DQNYG8CRTZBceq0UWBl0 5RpIDwNX9JxGrR+frJi0D24qxz//wLe56UqW9hLp73NP8QtEYEW1nb1q30Q2eM3N iQblgmh63qQ/dy6JV1GFb3aePiWMUNQwcTrj1pd8YDfNlp4IsFsSswnsdAZWtr1A l9qewHkBZbbzyTQkBjExUsaIdiaMywFwnUmcQNL+fHqznZIvMhJC/oCJeS0Pe/RH alTUrYsk6Y87HFpxoXpd85a9+20m8yrA64uY8cSQguGZ9i5Lm8g= =jkpj -----END PGP SIGNATURE----- Merge tag 'x86_cpu_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cpu updates from Borislav Petkov: - Remove the vendor check when selecting MWAIT as the default idle state - Respect idle=nomwait when supplied on the kernel cmdline - Two small cleanups * tag 'x86_cpu_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Use MSR_IA32_MISC_ENABLE constants x86: Fix comment for X86_FEATURE_ZEN x86: Remove vendor checks from prefer_mwait_c1_over_halt x86: Handle idle=nomwait cmdline properly for x86_idle
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commit
42efa5e3a8
@ -612,8 +612,8 @@ the ``menu`` governor to be used on the systems that use the ``ladder`` governor
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by default this way, for example.
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The other kernel command line parameters controlling CPU idle time management
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described below are only relevant for the *x86* architecture and some of
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them affect Intel processors only.
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described below are only relevant for the *x86* architecture and references
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to ``intel_idle`` affect Intel processors only.
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The *x86* architecture support code recognizes three kernel command line
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options related to CPU idle time management: ``idle=poll``, ``idle=halt``,
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@ -635,10 +635,13 @@ idle, so it very well may hurt single-thread computations performance as well as
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energy-efficiency. Thus using it for performance reasons may not be a good idea
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at all.]
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The ``idle=nomwait`` option disables the ``intel_idle`` driver and causes
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``acpi_idle`` to be used (as long as all of the information needed by it is
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there in the system's ACPI tables), but it is not allowed to use the
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``MWAIT`` instruction of the CPUs to ask the hardware to enter idle states.
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The ``idle=nomwait`` option prevents the use of ``MWAIT`` instruction of
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the CPU to enter idle states. When this option is used, the ``acpi_idle``
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driver will use the ``HLT`` instruction instead of ``MWAIT``. On systems
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running Intel processors, this option disables the ``intel_idle`` driver
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and forces the use of the ``acpi_idle`` driver instead. Note that in either
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case, ``acpi_idle`` driver will function only if all the information needed
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by it is in the system's ACPI tables.
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In addition to the architecture-level kernel command line options affecting CPU
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idle time management, there are parameters affecting individual ``CPUIdle``
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@ -219,7 +219,7 @@
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#define X86_FEATURE_IBRS ( 7*32+25) /* Indirect Branch Restricted Speculation */
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#define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier */
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#define X86_FEATURE_STIBP ( 7*32+27) /* Single Thread Indirect Branch Predictors */
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#define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 or above (Zen) */
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#define X86_FEATURE_ZEN (7*32+28) /* "" CPU based on Zen microarchitecture */
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#define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */
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#define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
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#define X86_FEATURE_MSR_IA32_FEAT_CTL ( 7*32+31) /* "" MSR IA32_FEAT_CTL configured */
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@ -13,6 +13,7 @@
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#define MWAIT_SUBSTATE_SIZE 4
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#define MWAIT_HINT2CSTATE(hint) (((hint) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK)
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#define MWAIT_HINT2SUBSTATE(hint) ((hint) & MWAIT_CSTATE_MASK)
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#define MWAIT_C1_SUBSTATE_MASK 0xf0
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#define CPUID_MWAIT_LEAF 5
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#define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
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@ -682,9 +682,9 @@ static void init_intel(struct cpuinfo_x86 *c)
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unsigned int l1, l2;
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rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
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if (!(l1 & (1<<11)))
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if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL))
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set_cpu_cap(c, X86_FEATURE_BTS);
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if (!(l1 & (1<<12)))
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if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL))
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set_cpu_cap(c, X86_FEATURE_PEBS);
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}
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@ -810,24 +810,43 @@ static void amd_e400_idle(void)
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}
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/*
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* Intel Core2 and older machines prefer MWAIT over HALT for C1.
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* We can't rely on cpuidle installing MWAIT, because it will not load
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* on systems that support only C1 -- so the boot default must be MWAIT.
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* Prefer MWAIT over HALT if MWAIT is supported, MWAIT_CPUID leaf
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* exists and whenever MONITOR/MWAIT extensions are present there is at
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* least one C1 substate.
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*
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* Some AMD machines are the opposite, they depend on using HALT.
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*
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* So for default C1, which is used during boot until cpuidle loads,
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* use MWAIT-C1 on Intel HW that has it, else use HALT.
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* Do not prefer MWAIT if MONITOR instruction has a bug or idle=nomwait
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* is passed to kernel commandline parameter.
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*/
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static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
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{
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if (c->x86_vendor != X86_VENDOR_INTEL)
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u32 eax, ebx, ecx, edx;
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/* User has disallowed the use of MWAIT. Fallback to HALT */
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if (boot_option_idle_override == IDLE_NOMWAIT)
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return 0;
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if (!cpu_has(c, X86_FEATURE_MWAIT) || boot_cpu_has_bug(X86_BUG_MONITOR))
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/* MWAIT is not supported on this platform. Fallback to HALT */
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if (!cpu_has(c, X86_FEATURE_MWAIT))
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return 0;
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return 1;
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/* Monitor has a bug. Fallback to HALT */
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if (boot_cpu_has_bug(X86_BUG_MONITOR))
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return 0;
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cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
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/*
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* If MWAIT extensions are not available, it is safe to use MWAIT
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* with EAX=0, ECX=0.
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*/
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if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED))
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return 1;
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/*
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* If MWAIT extensions are available, there should be at least one
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* MWAIT C1 substate present.
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*/
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return (edx & MWAIT_C1_SUBSTATE_MASK);
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}
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/*
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@ -932,9 +951,8 @@ static int __init idle_setup(char *str)
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} else if (!strcmp(str, "nomwait")) {
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/*
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* If the boot option of "idle=nomwait" is added,
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* it means that mwait will be disabled for CPU C2/C3
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* states. In such case it won't touch the variable
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* of boot_option_idle_override.
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* it means that mwait will be disabled for CPU C1/C2/C3
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* states.
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*/
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boot_option_idle_override = IDLE_NOMWAIT;
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} else
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