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drm/i915: apply G45 vblank count code to all G4x chips and fix max_frame_count

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All G4x and newer chips use the new style frame count register, with a
full 32 bit frame count.  Update the code to reflect this.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Jesse Barnes 2009-05-05 13:13:16 -07:00 committed by Eric Anholt
parent 70aa96ca2d
commit 42c2798b35
2 changed files with 4 additions and 3 deletions
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5
drivers/gpu/drm/i915/i915_dma.c
View File

@ -1161,8 +1161,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
#endif
dev->driver->get_vblank_counter = i915_get_vblank_counter;
if (IS_GM45(dev))
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
if (IS_G4X(dev)) {
dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
}
i915_gem_load(dev);

2
drivers/gpu/drm/i915/i915_irq.c
View File

@ -574,8 +574,6 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
/* Unmask the interrupts that we always want on. */
dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;