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usb: dwc3: Allow disabling of metastability workaround
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble with the metastability workaround as it supports only a High-Speed PHY and the PHY can enter into an Erratic state [1] when the controller is set in SuperSpeed mode as part of the metastability workaround. This causes upto 2 seconds delay in enumeration on DRA7's USB2 instance in gadget mode. If these platforms can be better off without the workaround, provide a device tree property to suggest that so the workaround is avoided. [1] Device mode enumeration trace showing PHY Erratic Error. irq/90-dwc3-969 [000] d... 52.323145: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.560646: dwc3_event: event (00000901): Erratic Error [U0] irq/90-dwc3-969 [000] d... 52.798144: dwc3_event: event (00000901): Erratic Error [U0] Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -47,6 +47,8 @@ Optional properties:
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from P0 to P1/P2/P3 without delay.
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- snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check
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during HS transmit.
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- snps,dis_metastability_quirk: when set, disable metastability workaround.
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CAUTION: use only if you are absolutely sure of it.
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- snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
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utmi_l1_suspend_n, false when asserts utmi_sleep_n
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- snps,hird-threshold: HIRD threshold
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@ -1062,6 +1062,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
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device_property_read_u32(dev, "snps,quirk-frame-length-adjustment",
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&dwc->fladj);
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dwc->dis_metastability_quirk = device_property_read_bool(dev,
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"snps,dis_metastability_quirk");
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dwc->lpm_nyet_threshold = lpm_nyet_threshold;
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dwc->tx_de_emphasis = tx_de_emphasis;
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@ -856,6 +856,7 @@ struct dwc3_scratchpad_array {
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* 1 - -3.5dB de-emphasis
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* 2 - No de-emphasis
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* 3 - Reserved
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* @dis_metastability_quirk: set to disable metastability quirk.
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* @imod_interval: set the interrupt moderation interval in 250ns
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* increments or 0 to disable.
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*/
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@ -1008,6 +1009,8 @@ struct dwc3 {
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unsigned tx_de_emphasis_quirk:1;
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unsigned tx_de_emphasis:2;
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unsigned dis_metastability_quirk:1;
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u16 imod_interval;
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};
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@ -2005,7 +2005,8 @@ static void dwc3_gadget_set_speed(struct usb_gadget *g,
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* STAR#9000525659: Clock Domain Crossing on DCTL in
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* USB 2.0 Mode
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*/
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if (dwc->revision < DWC3_REVISION_220A) {
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if (dwc->revision < DWC3_REVISION_220A &&
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!dwc->dis_metastability_quirk) {
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reg |= DWC3_DCFG_SUPERSPEED;
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} else {
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switch (speed) {
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@ -3224,7 +3225,8 @@ int dwc3_gadget_init(struct dwc3 *dwc)
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* is less than super speed because we don't have means, yet, to tell
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* composite.c that we are USB 2.0 + LPM ECN.
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*/
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if (dwc->revision < DWC3_REVISION_220A)
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if (dwc->revision < DWC3_REVISION_220A &&
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!dwc->dis_metastability_quirk)
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dev_info(dwc->dev, "changing max_speed on rev %08x\n",
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dwc->revision);
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