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dmaengine: ste_dma40: Remove platform data
The Ux500 is device tree-only since ages. Delete the platform data header and push it into or next to the driver instead. Drop the non-DT probe path since this will not happen. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230417-ux500-dma40-cleanup-v3-4-60bfa6785968@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Linus Walleij
Vinod Koul
parent
fb85a8c517
commit
42ae6f1695
@ -23,11 +23,39 @@
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#include <linux/of_dma.h>
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#include <linux/amba/bus.h>
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#include <linux/regulator/consumer.h>
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#include <linux/platform_data/dma-ste-dma40.h>
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#include "dmaengine.h"
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#include "ste_dma40.h"
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#include "ste_dma40_ll.h"
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/**
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* struct stedma40_platform_data - Configuration struct for the dma device.
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*
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* @dev_tx: mapping between destination event line and io address
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* @dev_rx: mapping between source event line and io address
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* @disabled_channels: A vector, ending with -1, that marks physical channels
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* that are for different reasons not available for the driver.
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* @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
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* which avoids HW bug that exists in some versions of the controller.
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* SoftLLI introduces relink overhead that could impact performace for
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* certain use cases.
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* @num_of_soft_lli_chans: The number of channels that needs to be configured
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* to use SoftLLI.
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* @use_esram_lcla: flag for mapping the lcla into esram region
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* @num_of_memcpy_chans: The number of channels reserved for memcpy.
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* @num_of_phy_chans: The number of physical channels implemented in HW.
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* 0 means reading the number of channels from DMA HW but this is only valid
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* for 'multiple of 4' channels, like 8.
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*/
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struct stedma40_platform_data {
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int disabled_channels[STEDMA40_MAX_PHYS];
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int *soft_lli_chans;
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int num_of_soft_lli_chans;
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bool use_esram_lcla;
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int num_of_memcpy_chans;
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int num_of_phy_chans;
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};
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#define D40_NAME "dma40"
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#define D40_PHY_CHAN -1
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@ -2269,7 +2297,7 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src,
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return NULL;
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}
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bool stedma40_filter(struct dma_chan *chan, void *data)
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static bool stedma40_filter(struct dma_chan *chan, void *data)
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{
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struct stedma40_chan_cfg *info = data;
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struct d40_chan *d40c =
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@ -2288,7 +2316,6 @@ bool stedma40_filter(struct dma_chan *chan, void *data)
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return err == 0;
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}
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EXPORT_SYMBOL(stedma40_filter);
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static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src)
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{
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@ -3517,16 +3544,9 @@ static int __init d40_probe(struct platform_device *pdev)
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int num_reserved_chans;
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u32 val;
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if (!plat_data) {
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if (np) {
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if (d40_of_probe(pdev, np)) {
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ret = -ENOMEM;
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goto report_failure;
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}
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} else {
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d40_err(dev, "No pdata or Device Tree provided\n");
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goto report_failure;
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}
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if (d40_of_probe(pdev, np)) {
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ret = -ENOMEM;
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goto report_failure;
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}
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base = d40_hw_detect_init(pdev);
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@ -3650,11 +3670,11 @@ static int __init d40_probe(struct platform_device *pdev)
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d40_hw_init(base);
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if (np) {
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ret = of_dma_controller_register(np, d40_xlate, NULL);
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if (ret)
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dev_err(dev,
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"could not register of_dma_controller\n");
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ret = of_dma_controller_register(np, d40_xlate, NULL);
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if (ret) {
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dev_err(dev,
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"could not register of_dma_controller\n");
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goto destroy_cache;
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}
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dev_info(base->dev, "initialized\n");
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@ -1,19 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) ST-Ericsson SA 2007-2010
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* Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
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* Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
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*/
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#ifndef STE_DMA40_H
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#define STE_DMA40_H
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#include <linux/dmaengine.h>
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#include <linux/scatterlist.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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/*
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* Maxium size for a single dma descriptor
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* Size is limited to 16 bits.
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@ -118,92 +107,4 @@ struct stedma40_chan_cfg {
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int phy_channel;
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};
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/**
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* struct stedma40_platform_data - Configuration struct for the dma device.
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*
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* @dev_tx: mapping between destination event line and io address
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* @dev_rx: mapping between source event line and io address
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* @disabled_channels: A vector, ending with -1, that marks physical channels
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* that are for different reasons not available for the driver.
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* @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
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* which avoids HW bug that exists in some versions of the controller.
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* SoftLLI introduces relink overhead that could impact performace for
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* certain use cases.
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* @num_of_soft_lli_chans: The number of channels that needs to be configured
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* to use SoftLLI.
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* @use_esram_lcla: flag for mapping the lcla into esram region
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* @num_of_memcpy_chans: The number of channels reserved for memcpy.
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* @num_of_phy_chans: The number of physical channels implemented in HW.
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* 0 means reading the number of channels from DMA HW but this is only valid
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* for 'multiple of 4' channels, like 8.
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*/
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struct stedma40_platform_data {
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int disabled_channels[STEDMA40_MAX_PHYS];
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int *soft_lli_chans;
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int num_of_soft_lli_chans;
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bool use_esram_lcla;
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int num_of_memcpy_chans;
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int num_of_phy_chans;
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};
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#ifdef CONFIG_STE_DMA40
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/**
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* stedma40_filter() - Provides stedma40_chan_cfg to the
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* ste_dma40 dma driver via the dmaengine framework.
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* does some checking of what's provided.
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*
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* Never directly called by client. It used by dmaengine.
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* @chan: dmaengine handle.
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* @data: Must be of type: struct stedma40_chan_cfg and is
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* the configuration of the framework.
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*
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*
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*/
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bool stedma40_filter(struct dma_chan *chan, void *data);
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/**
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* stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
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* (=device)
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*
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* @chan: dmaengine handle
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* @addr: source or destination physicall address.
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* @size: bytes to transfer
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* @direction: direction of transfer
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* @flags: is actually enum dma_ctrl_flags. See dmaengine.h
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*/
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static inline struct
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dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
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dma_addr_t addr,
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unsigned int size,
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enum dma_transfer_direction direction,
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unsigned long flags)
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{
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struct scatterlist sg;
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sg_init_table(&sg, 1);
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sg.dma_address = addr;
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sg.length = size;
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return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
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}
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#else
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static inline bool stedma40_filter(struct dma_chan *chan, void *data)
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{
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return false;
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}
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static inline struct
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dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
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dma_addr_t addr,
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unsigned int size,
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enum dma_transfer_direction direction,
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unsigned long flags)
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{
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return NULL;
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}
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#endif
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#endif
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#endif /* STE_DMA40_H */
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@ -6,8 +6,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/platform_data/dma-ste-dma40.h>
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#include <linux/dmaengine.h>
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#include "ste_dma40.h"
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#include "ste_dma40_ll.h"
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static u8 d40_width_to_bits(enum dma_slave_buswidth width)
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