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media: ti-vpe: cal: rename cal_ctx->index to dma_ctx
Rename cal_ctx->index to dma_ctx to clarify that the field refers to the DMA context number. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -899,7 +899,7 @@ int cal_ctx_v4l2_register(struct cal_ctx *ctx)
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MEDIA_LNK_FL_ENABLED);
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if (ret) {
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ctx_err(ctx, "Failed to create media link for context %u\n",
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ctx->index);
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ctx->dma_ctx);
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video_unregister_device(vfd);
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return ret;
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}
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@ -951,7 +951,7 @@ int cal_ctx_v4l2_init(struct cal_ctx *ctx)
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| (cal_mc_api ? V4L2_CAP_IO_MC : 0);
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vfd->v4l2_dev = &ctx->cal->v4l2_dev;
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vfd->queue = q;
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snprintf(vfd->name, sizeof(vfd->name), "CAL output %u", ctx->index);
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snprintf(vfd->name, sizeof(vfd->name), "CAL output %u", ctx->dma_ctx);
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vfd->release = video_device_release_empty;
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vfd->ioctl_ops = cal_mc_api ? &cal_ioctl_mc_ops : &cal_ioctl_video_ops;
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vfd->lock = &ctx->mutex;
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@ -372,7 +372,7 @@ static void cal_ctx_wr_dma_config(struct cal_ctx *ctx)
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unsigned int stride = ctx->v_fmt.fmt.pix.bytesperline;
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u32 val;
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val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index));
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val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx));
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cal_set_field(&val, ctx->cport, CAL_WR_DMA_CTRL_CPORT_MASK);
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cal_set_field(&val, ctx->v_fmt.fmt.pix.height,
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CAL_WR_DMA_CTRL_YSIZE_MASK);
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@ -383,16 +383,16 @@ static void cal_ctx_wr_dma_config(struct cal_ctx *ctx)
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cal_set_field(&val, CAL_WR_DMA_CTRL_PATTERN_LINEAR,
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CAL_WR_DMA_CTRL_PATTERN_MASK);
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cal_set_field(&val, 1, CAL_WR_DMA_CTRL_STALL_RD_MASK);
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cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->index), val);
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ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index)));
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cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val);
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ctx_dbg(3, ctx, "CAL_WR_DMA_CTRL(%d) = 0x%08x\n", ctx->dma_ctx,
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cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx)));
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cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->index),
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cal_write_field(ctx->cal, CAL_WR_DMA_OFST(ctx->dma_ctx),
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stride / 16, CAL_WR_DMA_OFST_MASK);
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ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->index)));
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ctx_dbg(3, ctx, "CAL_WR_DMA_OFST(%d) = 0x%08x\n", ctx->dma_ctx,
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cal_read(ctx->cal, CAL_WR_DMA_OFST(ctx->dma_ctx)));
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val = cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index));
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val = cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx));
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/* 64 bit word means no skipping */
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cal_set_field(&val, 0, CAL_WR_DMA_XSIZE_XSKIP_MASK);
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/*
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@ -401,23 +401,23 @@ static void cal_ctx_wr_dma_config(struct cal_ctx *ctx)
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* written per line.
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*/
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cal_set_field(&val, stride / 8, CAL_WR_DMA_XSIZE_MASK);
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cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index), val);
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ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->index,
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cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->index)));
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cal_write(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx), val);
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ctx_dbg(3, ctx, "CAL_WR_DMA_XSIZE(%d) = 0x%08x\n", ctx->dma_ctx,
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cal_read(ctx->cal, CAL_WR_DMA_XSIZE(ctx->dma_ctx)));
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}
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void cal_ctx_set_dma_addr(struct cal_ctx *ctx, dma_addr_t addr)
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{
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cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->index), addr);
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cal_write(ctx->cal, CAL_WR_DMA_ADDR(ctx->dma_ctx), addr);
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}
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static void cal_ctx_wr_dma_disable(struct cal_ctx *ctx)
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{
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u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->index));
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u32 val = cal_read(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx));
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cal_set_field(&val, CAL_WR_DMA_CTRL_MODE_DIS,
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CAL_WR_DMA_CTRL_MODE_MASK);
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cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->index), val);
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cal_write(ctx->cal, CAL_WR_DMA_CTRL(ctx->dma_ctx), val);
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}
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static bool cal_ctx_wr_dma_stopped(struct cal_ctx *ctx)
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@ -452,9 +452,9 @@ void cal_ctx_start(struct cal_ctx *ctx)
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/* Enable IRQ_WDMA_END and IRQ_WDMA_START. */
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cal_write(ctx->cal, CAL_HL_IRQENABLE_SET(1),
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CAL_HL_IRQ_MASK(ctx->index));
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CAL_HL_IRQ_MASK(ctx->dma_ctx));
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cal_write(ctx->cal, CAL_HL_IRQENABLE_SET(2),
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CAL_HL_IRQ_MASK(ctx->index));
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CAL_HL_IRQ_MASK(ctx->dma_ctx));
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}
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void cal_ctx_stop(struct cal_ctx *ctx)
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@ -478,9 +478,9 @@ void cal_ctx_stop(struct cal_ctx *ctx)
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/* Disable IRQ_WDMA_END and IRQ_WDMA_START. */
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cal_write(ctx->cal, CAL_HL_IRQENABLE_CLR(1),
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CAL_HL_IRQ_MASK(ctx->index));
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CAL_HL_IRQ_MASK(ctx->dma_ctx));
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cal_write(ctx->cal, CAL_HL_IRQENABLE_CLR(2),
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CAL_HL_IRQ_MASK(ctx->index));
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CAL_HL_IRQ_MASK(ctx->dma_ctx));
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ctx->dma.state = CAL_DMA_STOPPED;
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}
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@ -853,7 +853,7 @@ static struct cal_ctx *cal_ctx_create(struct cal_dev *cal, int inst)
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ctx->cal = cal;
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ctx->phy = cal->phy[inst];
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ctx->index = inst;
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ctx->dma_ctx = inst;
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ctx->csi2_ctx = inst;
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ctx->cport = inst;
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ctx->pix_proc = inst;
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@ -217,7 +217,7 @@ struct cal_ctx {
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unsigned int sequence;
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struct vb2_queue vb_vidq;
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u8 index;
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u8 dma_ctx;
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u8 cport;
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u8 csi2_ctx;
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u8 pix_proc;
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@ -238,11 +238,11 @@ extern bool cal_mc_api;
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dev_err((cal)->dev, fmt, ##arg)
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#define ctx_dbg(level, ctx, fmt, arg...) \
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cal_dbg(level, (ctx)->cal, "ctx%u: " fmt, (ctx)->index, ##arg)
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cal_dbg(level, (ctx)->cal, "ctx%u: " fmt, (ctx)->dma_ctx, ##arg)
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#define ctx_info(ctx, fmt, arg...) \
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cal_info((ctx)->cal, "ctx%u: " fmt, (ctx)->index, ##arg)
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cal_info((ctx)->cal, "ctx%u: " fmt, (ctx)->dma_ctx, ##arg)
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#define ctx_err(ctx, fmt, arg...) \
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cal_err((ctx)->cal, "ctx%u: " fmt, (ctx)->index, ##arg)
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cal_err((ctx)->cal, "ctx%u: " fmt, (ctx)->dma_ctx, ##arg)
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#define phy_dbg(level, phy, fmt, arg...) \
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cal_dbg(level, (phy)->cal, "phy%u: " fmt, (phy)->instance, ##arg)
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