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net: stmmac: Implement L3/L4 Filters using TC Flower
Implement filters for Layer 3 and Layer 4 using TC Flower API. Add the corresponding callbacks in XGMAC core. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jose Abreu
David S. Miller
parent
c104891c4b
commit
425eabddaf
@ -360,6 +360,7 @@ struct dma_features {
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unsigned int sphen;
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unsigned int vlins;
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unsigned int dvlan;
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unsigned int l3l4fnum;
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};
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/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
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@ -47,6 +47,7 @@
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#define XGMAC_CORE_INIT_RX 0
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#define XGMAC_PACKET_FILTER 0x00000008
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#define XGMAC_FILTER_RA BIT(31)
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#define XGMAC_FILTER_IPFE BIT(20)
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#define XGMAC_FILTER_VTFE BIT(16)
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#define XGMAC_FILTER_HPF BIT(10)
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#define XGMAC_FILTER_PCF BIT(7)
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@ -119,6 +120,7 @@
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#define XGMAC_HWFEAT_VLHASH BIT(4)
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#define XGMAC_HWFEAT_GMIISEL BIT(1)
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#define XGMAC_HW_FEATURE1 0x00000120
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#define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27)
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#define XGMAC_HWFEAT_RSSEN BIT(20)
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#define XGMAC_HWFEAT_TSOEN BIT(18)
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#define XGMAC_HWFEAT_SPHEN BIT(17)
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@ -150,6 +152,34 @@
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#define XGMAC_DCS GENMASK(19, 16)
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#define XGMAC_DCS_SHIFT 16
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#define XGMAC_ADDRx_LOW(x) (0x00000304 + (x) * 0x8)
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#define XGMAC_L3L4_ADDR_CTRL 0x00000c00
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#define XGMAC_IDDR GENMASK(15, 8)
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#define XGMAC_IDDR_SHIFT 8
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#define XGMAC_IDDR_FNUM 4
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#define XGMAC_TT BIT(1)
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#define XGMAC_XB BIT(0)
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#define XGMAC_L3L4_DATA 0x00000c04
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#define XGMAC_L3L4_CTRL 0x0
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#define XGMAC_L4DPIM0 BIT(21)
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#define XGMAC_L4DPM0 BIT(20)
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#define XGMAC_L4SPIM0 BIT(19)
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#define XGMAC_L4SPM0 BIT(18)
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#define XGMAC_L4PEN0 BIT(16)
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#define XGMAC_L3HDBM0 GENMASK(15, 11)
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#define XGMAC_L3HSBM0 GENMASK(10, 6)
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#define XGMAC_L3DAIM0 BIT(5)
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#define XGMAC_L3DAM0 BIT(4)
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#define XGMAC_L3SAIM0 BIT(3)
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#define XGMAC_L3SAM0 BIT(2)
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#define XGMAC_L3PEN0 BIT(0)
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#define XGMAC_L4_ADDR 0x1
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#define XGMAC_L4DP0 GENMASK(31, 16)
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#define XGMAC_L4DP0_SHIFT 16
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#define XGMAC_L4SP0 GENMASK(15, 0)
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#define XGMAC_L3_ADDR0 0x4
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#define XGMAC_L3_ADDR1 0x5
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#define XGMAC_L3_ADDR2 0x6
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#define XMGAC_L3_ADDR3 0x7
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#define XGMAC_ARP_ADDR 0x00000c10
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#define XGMAC_RSS_CTRL 0x00000c80
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#define XGMAC_UDP4TE BIT(3)
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@ -1163,6 +1163,181 @@ static void dwxgmac2_enable_vlan(struct mac_device_info *hw, u32 type)
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writel(value, ioaddr + XGMAC_VLAN_INCL);
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}
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static int dwxgmac2_filter_wait(struct mac_device_info *hw)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 value;
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if (readl_poll_timeout(ioaddr + XGMAC_L3L4_ADDR_CTRL, value,
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!(value & XGMAC_XB), 100, 10000))
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return -EBUSY;
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return 0;
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}
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static int dwxgmac2_filter_read(struct mac_device_info *hw, u32 filter_no,
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u8 reg, u32 *data)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 value;
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int ret;
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ret = dwxgmac2_filter_wait(hw);
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if (ret)
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return ret;
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value = ((filter_no << XGMAC_IDDR_FNUM) | reg) << XGMAC_IDDR_SHIFT;
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value |= XGMAC_TT | XGMAC_XB;
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writel(value, ioaddr + XGMAC_L3L4_ADDR_CTRL);
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ret = dwxgmac2_filter_wait(hw);
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if (ret)
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return ret;
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*data = readl(ioaddr + XGMAC_L3L4_DATA);
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return 0;
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}
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static int dwxgmac2_filter_write(struct mac_device_info *hw, u32 filter_no,
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u8 reg, u32 data)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 value;
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int ret;
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ret = dwxgmac2_filter_wait(hw);
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if (ret)
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return ret;
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writel(data, ioaddr + XGMAC_L3L4_DATA);
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value = ((filter_no << XGMAC_IDDR_FNUM) | reg) << XGMAC_IDDR_SHIFT;
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value |= XGMAC_XB;
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writel(value, ioaddr + XGMAC_L3L4_ADDR_CTRL);
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return dwxgmac2_filter_wait(hw);
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}
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static int dwxgmac2_config_l3_filter(struct mac_device_info *hw, u32 filter_no,
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bool en, bool ipv6, bool sa, bool inv,
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u32 match)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 value;
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int ret;
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value = readl(ioaddr + XGMAC_PACKET_FILTER);
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value |= XGMAC_FILTER_IPFE;
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writel(value, ioaddr + XGMAC_PACKET_FILTER);
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ret = dwxgmac2_filter_read(hw, filter_no, XGMAC_L3L4_CTRL, &value);
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if (ret)
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return ret;
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/* For IPv6 not both SA/DA filters can be active */
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if (ipv6) {
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value |= XGMAC_L3PEN0;
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value &= ~(XGMAC_L3SAM0 | XGMAC_L3SAIM0);
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value &= ~(XGMAC_L3DAM0 | XGMAC_L3DAIM0);
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if (sa) {
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value |= XGMAC_L3SAM0;
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if (inv)
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value |= XGMAC_L3SAIM0;
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} else {
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value |= XGMAC_L3DAM0;
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if (inv)
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value |= XGMAC_L3DAIM0;
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}
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} else {
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value &= ~XGMAC_L3PEN0;
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if (sa) {
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value |= XGMAC_L3SAM0;
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if (inv)
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value |= XGMAC_L3SAIM0;
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} else {
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value |= XGMAC_L3DAM0;
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if (inv)
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value |= XGMAC_L3DAIM0;
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}
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}
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, value);
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if (ret)
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return ret;
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if (sa) {
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3_ADDR0, match);
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if (ret)
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return ret;
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} else {
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3_ADDR1, match);
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if (ret)
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return ret;
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}
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if (!en)
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return dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, 0);
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return 0;
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}
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static int dwxgmac2_config_l4_filter(struct mac_device_info *hw, u32 filter_no,
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bool en, bool udp, bool sa, bool inv,
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u32 match)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 value;
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int ret;
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value = readl(ioaddr + XGMAC_PACKET_FILTER);
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value |= XGMAC_FILTER_IPFE;
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writel(value, ioaddr + XGMAC_PACKET_FILTER);
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ret = dwxgmac2_filter_read(hw, filter_no, XGMAC_L3L4_CTRL, &value);
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if (ret)
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return ret;
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if (udp) {
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value |= XGMAC_L4PEN0;
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} else {
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value &= ~XGMAC_L4PEN0;
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}
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value &= ~(XGMAC_L4SPM0 | XGMAC_L4SPIM0);
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value &= ~(XGMAC_L4DPM0 | XGMAC_L4DPIM0);
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if (sa) {
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value |= XGMAC_L4SPM0;
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if (inv)
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value |= XGMAC_L4SPIM0;
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} else {
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value |= XGMAC_L4DPM0;
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if (inv)
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value |= XGMAC_L4DPIM0;
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}
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, value);
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if (ret)
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return ret;
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if (sa) {
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value = match & XGMAC_L4SP0;
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L4_ADDR, value);
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if (ret)
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return ret;
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} else {
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value = (match << XGMAC_L4DP0_SHIFT) & XGMAC_L4DP0;
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ret = dwxgmac2_filter_write(hw, filter_no, XGMAC_L4_ADDR, value);
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if (ret)
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return ret;
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}
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if (!en)
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return dwxgmac2_filter_write(hw, filter_no, XGMAC_L3L4_CTRL, 0);
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return 0;
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}
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const struct stmmac_ops dwxgmac210_ops = {
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.core_init = dwxgmac2_core_init,
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.set_mac = dwxgmac2_set_mac,
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@ -1203,6 +1378,8 @@ const struct stmmac_ops dwxgmac210_ops = {
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.flex_pps_config = dwxgmac2_flex_pps_config,
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.sarc_configure = dwxgmac2_sarc_configure,
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.enable_vlan = dwxgmac2_enable_vlan,
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.config_l3_filter = dwxgmac2_config_l3_filter,
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.config_l4_filter = dwxgmac2_config_l4_filter,
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};
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int dwxgmac2_setup(struct stmmac_priv *priv)
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@ -378,6 +378,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr,
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/* MAC HW feature 1 */
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hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);
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dma_cap->l3l4fnum = (hw_cap & XGMAC_HWFEAT_L3L4FNUM) >> 27;
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dma_cap->rssen = (hw_cap & XGMAC_HWFEAT_RSSEN) >> 20;
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dma_cap->tsoen = (hw_cap & XGMAC_HWFEAT_TSOEN) >> 18;
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dma_cap->sphen = (hw_cap & XGMAC_HWFEAT_SPHEN) >> 17;
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@ -363,6 +363,13 @@ struct stmmac_ops {
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int (*get_mac_tx_timestamp)(struct mac_device_info *hw, u64 *ts);
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/* Source Address Insertion / Replacement */
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void (*sarc_configure)(void __iomem *ioaddr, int val);
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/* Filtering */
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int (*config_l3_filter)(struct mac_device_info *hw, u32 filter_no,
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bool en, bool ipv6, bool sa, bool inv,
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u32 match);
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int (*config_l4_filter)(struct mac_device_info *hw, u32 filter_no,
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bool en, bool udp, bool sa, bool inv,
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u32 match);
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};
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#define stmmac_core_init(__priv, __args...) \
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@ -443,6 +450,10 @@ struct stmmac_ops {
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stmmac_do_callback(__priv, mac, get_mac_tx_timestamp, __args)
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#define stmmac_sarc_configure(__priv, __args...) \
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stmmac_do_void_callback(__priv, mac, sarc_configure, __args)
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#define stmmac_config_l3_filter(__priv, __args...) \
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stmmac_do_callback(__priv, mac, config_l3_filter, __args)
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#define stmmac_config_l4_filter(__priv, __args...) \
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stmmac_do_callback(__priv, mac, config_l4_filter, __args)
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/* PTP and HW Timer helpers */
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struct stmmac_hwtimestamp {
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@ -499,6 +510,7 @@ struct stmmac_mode_ops {
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struct stmmac_priv;
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struct tc_cls_u32_offload;
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struct tc_cbs_qopt_offload;
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struct flow_cls_offload;
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struct stmmac_tc_ops {
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int (*init)(struct stmmac_priv *priv);
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@ -506,6 +518,8 @@ struct stmmac_tc_ops {
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struct tc_cls_u32_offload *cls);
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int (*setup_cbs)(struct stmmac_priv *priv,
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struct tc_cbs_qopt_offload *qopt);
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int (*setup_cls)(struct stmmac_priv *priv,
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struct flow_cls_offload *cls);
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};
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#define stmmac_tc_init(__priv, __args...) \
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@ -514,6 +528,8 @@ struct stmmac_tc_ops {
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stmmac_do_callback(__priv, tc, setup_cls_u32, __args)
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#define stmmac_tc_setup_cbs(__priv, __args...) \
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stmmac_do_callback(__priv, tc, setup_cbs, __args)
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#define stmmac_tc_setup_cls(__priv, __args...) \
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stmmac_do_callback(__priv, tc, setup_cls, __args)
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struct stmmac_counters;
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@ -128,6 +128,16 @@ struct stmmac_rss {
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u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
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};
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#define STMMAC_FLOW_ACTION_DROP BIT(0)
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struct stmmac_flow_entry {
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unsigned long cookie;
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unsigned long action;
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u8 ip_proto;
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int in_use;
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int idx;
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int is_l4;
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};
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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u32 tx_coal_frames;
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@ -216,6 +226,8 @@ struct stmmac_priv {
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unsigned int tc_entries_max;
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unsigned int tc_off_max;
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struct stmmac_tc_entry *tc_entries;
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unsigned int flow_entries_max;
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struct stmmac_flow_entry *flow_entries;
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/* Pulse Per Second output */
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struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
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@ -3931,12 +3931,17 @@ static int stmmac_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
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struct stmmac_priv *priv = cb_priv;
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int ret = -EOPNOTSUPP;
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if (!tc_cls_can_offload_and_chain0(priv->dev, type_data))
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return ret;
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stmmac_disable_all_queues(priv);
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switch (type) {
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case TC_SETUP_CLSU32:
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if (tc_cls_can_offload_and_chain0(priv->dev, type_data))
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ret = stmmac_tc_setup_cls_u32(priv, priv, type_data);
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ret = stmmac_tc_setup_cls_u32(priv, priv, type_data);
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break;
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case TC_SETUP_CLSFLOWER:
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ret = stmmac_tc_setup_cls(priv, priv, type_data);
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break;
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default:
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break;
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@ -242,6 +242,23 @@ static int tc_init(struct stmmac_priv *priv)
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{
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struct dma_features *dma_cap = &priv->dma_cap;
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unsigned int count;
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int i;
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if (dma_cap->l3l4fnum) {
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priv->flow_entries_max = dma_cap->l3l4fnum;
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priv->flow_entries = devm_kcalloc(priv->device,
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dma_cap->l3l4fnum,
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sizeof(*priv->flow_entries),
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GFP_KERNEL);
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if (!priv->flow_entries)
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return -ENOMEM;
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for (i = 0; i < priv->flow_entries_max; i++)
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priv->flow_entries[i].idx = i;
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dev_info(priv->device, "Enabled Flow TC (entries=%d)\n",
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priv->flow_entries_max);
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}
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/* Fail silently as we can still use remaining features, e.g. CBS */
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if (!dma_cap->frpsel)
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@ -350,8 +367,235 @@ static int tc_setup_cbs(struct stmmac_priv *priv,
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return 0;
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}
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static int tc_parse_flow_actions(struct stmmac_priv *priv,
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struct flow_action *action,
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struct stmmac_flow_entry *entry)
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{
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struct flow_action_entry *act;
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int i;
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if (!flow_action_has_entries(action))
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return -EINVAL;
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flow_action_for_each(i, act, action) {
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switch (act->id) {
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case FLOW_ACTION_DROP:
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entry->action |= STMMAC_FLOW_ACTION_DROP;
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return 0;
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default:
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break;
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}
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}
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/* Nothing to do, maybe inverse filter ? */
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return 0;
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}
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static int tc_add_basic_flow(struct stmmac_priv *priv,
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struct flow_cls_offload *cls,
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struct stmmac_flow_entry *entry)
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{
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struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
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struct flow_dissector *dissector = rule->match.dissector;
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struct flow_match_basic match;
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/* Nothing to do here */
|
||||
if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_BASIC))
|
||||
return -EINVAL;
|
||||
|
||||
flow_rule_match_basic(rule, &match);
|
||||
entry->ip_proto = match.key->ip_proto;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tc_add_ip4_flow(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls,
|
||||
struct stmmac_flow_entry *entry)
|
||||
{
|
||||
struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
|
||||
struct flow_dissector *dissector = rule->match.dissector;
|
||||
bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
|
||||
struct flow_match_ipv4_addrs match;
|
||||
u32 hw_match;
|
||||
int ret;
|
||||
|
||||
/* Nothing to do here */
|
||||
if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_IPV4_ADDRS))
|
||||
return -EINVAL;
|
||||
|
||||
flow_rule_match_ipv4_addrs(rule, &match);
|
||||
hw_match = ntohl(match.key->src) & ntohl(match.mask->src);
|
||||
if (hw_match) {
|
||||
ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
|
||||
false, true, inv, hw_match);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
hw_match = ntohl(match.key->dst) & ntohl(match.mask->dst);
|
||||
if (hw_match) {
|
||||
ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, true,
|
||||
false, false, inv, hw_match);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tc_add_ports_flow(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls,
|
||||
struct stmmac_flow_entry *entry)
|
||||
{
|
||||
struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
|
||||
struct flow_dissector *dissector = rule->match.dissector;
|
||||
bool inv = entry->action & STMMAC_FLOW_ACTION_DROP;
|
||||
struct flow_match_ports match;
|
||||
u32 hw_match;
|
||||
bool is_udp;
|
||||
int ret;
|
||||
|
||||
/* Nothing to do here */
|
||||
if (!dissector_uses_key(dissector, FLOW_DISSECTOR_KEY_PORTS))
|
||||
return -EINVAL;
|
||||
|
||||
switch (entry->ip_proto) {
|
||||
case IPPROTO_TCP:
|
||||
is_udp = false;
|
||||
break;
|
||||
case IPPROTO_UDP:
|
||||
is_udp = true;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
flow_rule_match_ports(rule, &match);
|
||||
|
||||
hw_match = ntohs(match.key->src) & ntohs(match.mask->src);
|
||||
if (hw_match) {
|
||||
ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
|
||||
is_udp, true, inv, hw_match);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
hw_match = ntohs(match.key->dst) & ntohs(match.mask->dst);
|
||||
if (hw_match) {
|
||||
ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, true,
|
||||
is_udp, false, inv, hw_match);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
entry->is_l4 = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls,
|
||||
bool get_free)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < priv->flow_entries_max; i++) {
|
||||
struct stmmac_flow_entry *entry = &priv->flow_entries[i];
|
||||
|
||||
if (entry->cookie == cls->cookie)
|
||||
return entry;
|
||||
if (get_free && (entry->in_use == false))
|
||||
return entry;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
struct {
|
||||
int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls,
|
||||
struct stmmac_flow_entry *entry);
|
||||
} tc_flow_parsers[] = {
|
||||
{ .fn = tc_add_basic_flow },
|
||||
{ .fn = tc_add_ip4_flow },
|
||||
{ .fn = tc_add_ports_flow },
|
||||
};
|
||||
|
||||
static int tc_add_flow(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls)
|
||||
{
|
||||
struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
|
||||
struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
|
||||
int i, ret;
|
||||
|
||||
if (!entry) {
|
||||
entry = tc_find_flow(priv, cls, true);
|
||||
if (!entry)
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
ret = tc_parse_flow_actions(priv, &rule->action, entry);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tc_flow_parsers); i++) {
|
||||
ret = tc_flow_parsers[i].fn(priv, cls, entry);
|
||||
if (!ret) {
|
||||
entry->in_use = true;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
if (!entry->in_use)
|
||||
return -EINVAL;
|
||||
|
||||
entry->cookie = cls->cookie;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tc_del_flow(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls)
|
||||
{
|
||||
struct stmmac_flow_entry *entry = tc_find_flow(priv, cls, false);
|
||||
int ret;
|
||||
|
||||
if (!entry || !entry->in_use)
|
||||
return -ENOENT;
|
||||
|
||||
if (entry->is_l4) {
|
||||
ret = stmmac_config_l4_filter(priv, priv->hw, entry->idx, false,
|
||||
false, false, false, 0);
|
||||
} else {
|
||||
ret = stmmac_config_l3_filter(priv, priv->hw, entry->idx, false,
|
||||
false, false, false, 0);
|
||||
}
|
||||
|
||||
entry->in_use = false;
|
||||
entry->cookie = 0;
|
||||
entry->is_l4 = false;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int tc_setup_cls(struct stmmac_priv *priv,
|
||||
struct flow_cls_offload *cls)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
switch (cls->command) {
|
||||
case FLOW_CLS_REPLACE:
|
||||
ret = tc_add_flow(priv, cls);
|
||||
break;
|
||||
case FLOW_CLS_DESTROY:
|
||||
ret = tc_del_flow(priv, cls);
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
const struct stmmac_tc_ops dwmac510_tc_ops = {
|
||||
.init = tc_init,
|
||||
.setup_cls_u32 = tc_setup_cls_u32,
|
||||
.setup_cbs = tc_setup_cbs,
|
||||
.setup_cls = tc_setup_cls,
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user