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dmaengine: dw: move dwc->initialized to dwc->flags
We have already dedicated variable for flags, therefore no need to create an additional storage for that. Covert dwc->initialized to use dwc->flags. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -137,7 +137,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
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u32 cfghi = DWC_CFGH_FIFO_MODE;
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u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
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if (dwc->initialized == true)
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if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
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return;
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cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
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@ -150,7 +150,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
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channel_set_bit(dw, MASK.XFER, dwc->mask);
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channel_set_bit(dw, MASK.ERROR, dwc->mask);
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dwc->initialized = true;
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set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
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}
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/*----------------------------------------------------------------------*/
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@ -1127,7 +1127,7 @@ static void dw_dma_off(struct dw_dma *dw)
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cpu_relax();
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for (i = 0; i < dw->dma.chancnt; i++)
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dw->chan[i].initialized = false;
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clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags);
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}
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static void dw_dma_on(struct dw_dma *dw)
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@ -1236,7 +1236,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
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dwc->m_master = 0;
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dwc->p_master = 0;
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dwc->initialized = false;
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clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
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/* Disable interrupts */
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channel_clear_bit(dw, MASK.XFER, dwc->mask);
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@ -217,6 +217,7 @@ enum dw_dmac_flags {
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DW_DMA_IS_CYCLIC = 0,
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DW_DMA_IS_SOFT_LLP = 1,
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DW_DMA_IS_PAUSED = 2,
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DW_DMA_IS_INITIALIZED = 3,
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};
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struct dw_dma_chan {
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@ -225,7 +226,6 @@ struct dw_dma_chan {
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u8 mask;
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u8 priority;
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enum dma_transfer_direction direction;
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bool initialized;
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/* software emulation of the LLP transfers */
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struct list_head *tx_node_active;
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