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[PATCH] i2c: SMBus PEC support rewrite, 2 of 3
This is my rewrite of the SMBus PEC support. The original implementation was known to have bugs (credits go to Hideki Iwamoto for reporting many of them recently), and was incomplete due to a conceptual limitation. The rewrite affects only software PEC. Hardware PEC needs very little code and is mostly untouched. Technically, both implementations differ in that the original one was emulating PEC in software by modifying the contents of an i2c_smbus_data union (changing the transaction to a different type), while the new one works one level lower, on i2c_msg structures (working on message contents). Due to the definition of the i2c_smbus_data union, not all SMBus transactions could be handled (at least not without changing the definition of this union, which would break user-space compatibility), and those which could had to be implemented individually. At the opposite, adding PEC to an i2c_msg structure can be done on any SMBus transaction with common code. Advantages of the new implementation: * It's about twice as small (from ~136 lines before to ~70 now, only counting i2c-core, including blank and comment lines). The memory used by i2c-core is down by ~640 bytes (~3.5%). * Easier to validate, less tricky code. The code being common to all transactions by design, the risk that a bug can stay uncovered is lower. * All SMBus transactions have PEC support in I2C emulation mode (providing the non-PEC transaction is also implemented). Transactions which have no emulation code right now will get PEC support for free when they finally get implemented. * Allows for code simplifications in header files and bus drivers (patch follows). Drawbacks (I guess there had to be at least one): * PEC emulation for non-PEC capable non-I2C SMBus masters was dropped. It was based on SMBus tricks and doesn't quite fit in the new design. I don't think it's really a problem, as the benefit was certainly not worth the additional complexity, but it's only fair that I at least mention it. Lastly, let's note that the new implementation does slightly affect compatibility (both in kernel and user-space), but doesn't actually break it. Some defines will be dropped, but the code can always be changed in a way that will work with both the old and the new implementations. It shouldn't be a problem as there doesn't seem to be many users of SMBus PEC to date anyway. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -19,7 +19,8 @@
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/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>.
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All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl>
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SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> */
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SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
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Jean Delvare <khali@linux-fr.org> */
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#include <linux/module.h>
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#include <linux/kernel.h>
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@ -830,101 +831,44 @@ crc8(u16 data)
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return (u8)(data >> 8);
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}
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/* CRC over count bytes in the first array plus the bytes in the rest
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array if it is non-null. rest[0] is the (length of rest) - 1
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and is included. */
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static u8 i2c_smbus_partial_pec(u8 crc, int count, u8 *first, u8 *rest)
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/* Incremental CRC8 over count bytes in the array pointed to by p */
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static u8 i2c_smbus_pec(u8 crc, u8 *p, size_t count)
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{
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int i;
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for(i = 0; i < count; i++)
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crc = crc8((crc ^ first[i]) << 8);
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if(rest != NULL)
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for(i = 0; i <= rest[0]; i++)
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crc = crc8((crc ^ rest[i]) << 8);
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crc = crc8((crc ^ p[i]) << 8);
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return crc;
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}
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static u8 i2c_smbus_pec(int count, u8 *first, u8 *rest)
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/* Assume a 7-bit address, which is reasonable for SMBus */
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static u8 i2c_smbus_msg_pec(u8 pec, struct i2c_msg *msg)
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{
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return i2c_smbus_partial_pec(0, count, first, rest);
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/* The address will be sent first */
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u8 addr = (msg->addr << 1) | !!(msg->flags & I2C_M_RD);
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pec = i2c_smbus_pec(pec, &addr, 1);
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/* The data buffer follows */
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return i2c_smbus_pec(pec, msg->buf, msg->len);
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}
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/* Returns new "size" (transaction type)
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Note that we convert byte to byte_data and byte_data to word_data
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rather than invent new xxx_PEC transactions. */
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static int i2c_smbus_add_pec(u16 addr, u8 command, int size,
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union i2c_smbus_data *data)
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/* Used for write only transactions */
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static inline void i2c_smbus_add_pec(struct i2c_msg *msg)
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{
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u8 buf[3];
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buf[0] = addr << 1;
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buf[1] = command;
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switch(size) {
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case I2C_SMBUS_BYTE:
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data->byte = i2c_smbus_pec(2, buf, NULL);
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size = I2C_SMBUS_BYTE_DATA;
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break;
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case I2C_SMBUS_BYTE_DATA:
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buf[2] = data->byte;
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data->word = buf[2] |
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(i2c_smbus_pec(3, buf, NULL) << 8);
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size = I2C_SMBUS_WORD_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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/* unsupported */
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break;
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case I2C_SMBUS_BLOCK_DATA:
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data->block[data->block[0] + 1] =
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i2c_smbus_pec(2, buf, data->block);
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size = I2C_SMBUS_BLOCK_DATA_PEC;
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break;
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}
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return size;
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msg->buf[msg->len] = i2c_smbus_msg_pec(0, msg);
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msg->len++;
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}
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static int i2c_smbus_check_pec(u16 addr, u8 command, int size, u8 partial,
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union i2c_smbus_data *data)
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/* Return <0 on CRC error
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If there was a write before this read (most cases) we need to take the
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partial CRC from the write part into account.
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Note that this function does modify the message (we need to decrease the
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message length to hide the CRC byte from the caller). */
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static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
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{
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u8 buf[3], rpec, cpec;
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u8 rpec = msg->buf[--msg->len];
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cpec = i2c_smbus_msg_pec(cpec, msg);
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buf[1] = command;
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switch(size) {
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case I2C_SMBUS_BYTE_DATA:
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buf[0] = (addr << 1) | 1;
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cpec = i2c_smbus_pec(2, buf, NULL);
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rpec = data->byte;
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break;
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case I2C_SMBUS_WORD_DATA:
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buf[0] = (addr << 1) | 1;
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buf[2] = data->word & 0xff;
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cpec = i2c_smbus_pec(3, buf, NULL);
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rpec = data->word >> 8;
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break;
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case I2C_SMBUS_WORD_DATA_PEC:
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/* unsupported */
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cpec = rpec = 0;
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break;
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case I2C_SMBUS_PROC_CALL_PEC:
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/* unsupported */
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cpec = rpec = 0;
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break;
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case I2C_SMBUS_BLOCK_DATA_PEC:
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buf[0] = (addr << 1);
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buf[2] = (addr << 1) | 1;
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cpec = i2c_smbus_pec(3, buf, data->block);
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rpec = data->block[data->block[0] + 1];
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break;
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case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
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buf[0] = (addr << 1) | 1;
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rpec = i2c_smbus_partial_pec(partial, 1,
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buf, data->block);
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cpec = data->block[data->block[0] + 1];
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break;
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default:
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cpec = rpec = 0;
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break;
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}
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if (rpec != cpec) {
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pr_debug("i2c-core: Bad PEC 0x%02x vs. 0x%02x\n",
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rpec, cpec);
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@ -951,9 +895,8 @@ s32 i2c_smbus_read_byte(struct i2c_client *client)
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s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value)
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{
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union i2c_smbus_data data; /* only for PEC */
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return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
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I2C_SMBUS_WRITE,value, I2C_SMBUS_BYTE,&data);
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I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
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}
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s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command)
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@ -1043,6 +986,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
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{ addr, flags | I2C_M_RD, 0, msgbuf1 }
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};
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int i;
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u8 partial_pec = 0;
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msgbuf0[0] = command;
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switch(size) {
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@ -1085,7 +1029,6 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
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msgbuf0[2] = (data->word >> 8) & 0xff;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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case I2C_SMBUS_BLOCK_DATA_PEC:
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if (read_write == I2C_SMBUS_READ) {
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dev_err(&adapter->dev, "Block read not supported "
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"under I2C emulation!\n");
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@ -1098,14 +1041,11 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
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data->block[0]);
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return -1;
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}
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if(size == I2C_SMBUS_BLOCK_DATA_PEC)
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(msg[0].len)++;
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for (i = 1; i < msg[0].len; i++)
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msgbuf0[i] = data->block[i-1];
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}
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break;
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case I2C_SMBUS_BLOCK_PROC_CALL:
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case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
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dev_dbg(&adapter->dev, "Block process call not supported "
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"under I2C emulation!\n");
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return -1;
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@ -1130,9 +1070,30 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
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return -1;
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}
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i = ((flags & I2C_CLIENT_PEC) && size != I2C_SMBUS_QUICK
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&& size != I2C_SMBUS_I2C_BLOCK_DATA);
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if (i) {
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/* Compute PEC if first message is a write */
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if (!(msg[0].flags & I2C_M_RD)) {
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if (num == 1) /* Write only */
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i2c_smbus_add_pec(&msg[0]);
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else /* Write followed by read */
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partial_pec = i2c_smbus_msg_pec(0, &msg[0]);
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}
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/* Ask for PEC if last message is a read */
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if (msg[num-1].flags & I2C_M_RD)
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msg[num-1].len++;
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}
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if (i2c_transfer(adapter, msg, num) < 0)
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return -1;
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/* Check PEC if last message is a read */
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if (i && (msg[num-1].flags & I2C_M_RD)) {
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if (i2c_smbus_check_pec(partial_pec, &msg[num-1]) < 0)
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return -1;
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}
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if (read_write == I2C_SMBUS_READ)
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switch(size) {
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case I2C_SMBUS_BYTE:
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@ -1161,28 +1122,8 @@ s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags,
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union i2c_smbus_data * data)
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{
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s32 res;
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int swpec = 0;
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u8 partial = 0;
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flags &= I2C_M_TEN | I2C_CLIENT_PEC;
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if((flags & I2C_CLIENT_PEC) &&
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!(i2c_check_functionality(adapter, I2C_FUNC_SMBUS_HWPEC_CALC))) {
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swpec = 1;
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if(read_write == I2C_SMBUS_READ &&
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size == I2C_SMBUS_BLOCK_DATA)
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size = I2C_SMBUS_BLOCK_DATA_PEC;
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else if(size == I2C_SMBUS_PROC_CALL)
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size = I2C_SMBUS_PROC_CALL_PEC;
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else if(size == I2C_SMBUS_BLOCK_PROC_CALL) {
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i2c_smbus_add_pec(addr, command,
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I2C_SMBUS_BLOCK_DATA, data);
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partial = data->block[data->block[0] + 1];
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size = I2C_SMBUS_BLOCK_PROC_CALL_PEC;
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} else if(read_write == I2C_SMBUS_WRITE &&
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size != I2C_SMBUS_QUICK &&
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size != I2C_SMBUS_I2C_BLOCK_DATA)
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size = i2c_smbus_add_pec(addr, command, size, data);
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}
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if (adapter->algo->smbus_xfer) {
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down(&adapter->bus_lock);
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@ -1193,13 +1134,6 @@ s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags,
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res = i2c_smbus_xfer_emulated(adapter,addr,flags,read_write,
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command,size,data);
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if(res >= 0 && swpec &&
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size != I2C_SMBUS_QUICK && size != I2C_SMBUS_I2C_BLOCK_DATA &&
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(read_write == I2C_SMBUS_READ || size == I2C_SMBUS_PROC_CALL_PEC ||
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size == I2C_SMBUS_BLOCK_PROC_CALL_PEC)) {
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if(i2c_smbus_check_pec(addr, command, size, partial, data))
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return -1;
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}
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return res;
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}
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__u8 byte;
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__u16 word;
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__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
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/* and one more for PEC */
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/* and one more for user-space compatibility */
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};
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/* smbus_access read or write markers */
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