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[media] media: platform: add VPFE capture driver support for AM437X
This patch adds Video Processing Front End (VPFE) driver for AM437X family of devices Driver supports the following: - V4L2 API using MMAP buffer access based on videobuf2 api - Asynchronous sensor/decoder sub device registration - DT support Signed-off-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> [hans.verkuil@cisco.com: swapped two lines to fix vpfe_release() & add pinctrl include] Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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61
Documentation/devicetree/bindings/media/ti-am437x-vpfe.txt
Normal file
61
Documentation/devicetree/bindings/media/ti-am437x-vpfe.txt
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@ -0,0 +1,61 @@
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Texas Instruments AM437x CAMERA (VPFE)
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--------------------------------------
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The Video Processing Front End (VPFE) is a key component for image capture
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applications. The capture module provides the system interface and the
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processing capability to connect RAW image-sensor modules and video decoders
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to the AM437x device.
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Required properties:
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- compatible: must be "ti,am437x-vpfe"
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- reg: physical base address and length of the registers set for the device;
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- interrupts: should contain IRQ line for the VPFE;
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- ti,am437x-vpfe-interface: can be one of the following,
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0 - Raw Bayer Interface.
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1 - 8 Bit BT656 Interface.
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2 - 10 Bit BT656 Interface.
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3 - YCbCr 8 Bit Interface.
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4 - YCbCr 16 Bit Interface.
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VPFE supports a single port node with parallel bus. It should contain one
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'port' child node with child 'endpoint' node. Please refer to the bindings
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defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
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Example:
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vpfe: vpfe@f0034000 {
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compatible = "ti,am437x-vpfe";
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reg = <0x48328000 0x2000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&vpfe_pins_default>;
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pinctrl-1 = <&vpfe_pins_sleep>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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vpfe0_ep: endpoint {
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remote-endpoint = <&ov2659_1>;
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ti,am437x-vpfe-interface = <0>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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};
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i2c1: i2c@4802a000 {
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ov2659@30 {
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compatible = "ti,ov2659";
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reg = <0x30>;
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port {
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ov2659_1: endpoint {
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remote-endpoint = <&vpfe0_ep>;
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bus-width = <8>;
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mclk-frequency = <12000000>;
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};
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};
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};
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@ -8745,6 +8745,15 @@ S: Maintained
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F: drivers/media/platform/davinci/
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F: include/media/davinci/
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TI AM437X VPFE DRIVER
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M: Lad, Prabhakar <prabhakar.csengg@gmail.com>
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L: linux-media@vger.kernel.org
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W: http://linuxtv.org/
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Q: http://patchwork.linuxtv.org/project/linux-media/list/
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T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git
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S: Maintained
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F: drivers/media/platform/am437x/
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SIS 190 ETHERNET DRIVER
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M: Francois Romieu <romieu@fr.zoreil.com>
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L: netdev@vger.kernel.org
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@ -118,6 +118,7 @@ config VIDEO_S3C_CAMIF
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source "drivers/media/platform/soc_camera/Kconfig"
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source "drivers/media/platform/exynos4-is/Kconfig"
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source "drivers/media/platform/s5p-tv/Kconfig"
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source "drivers/media/platform/am437x/Kconfig"
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endif # V4L_PLATFORM_DRIVERS
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@ -46,4 +46,6 @@ obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1/
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obj-y += omap/
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obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x/
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ccflags-y += -I$(srctree)/drivers/media/i2c
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11
drivers/media/platform/am437x/Kconfig
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11
drivers/media/platform/am437x/Kconfig
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@ -0,0 +1,11 @@
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config VIDEO_AM437X_VPFE
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tristate "TI AM437x VPFE video capture driver"
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depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
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depends on SOC_AM43XX || COMPILE_TEST
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select VIDEOBUF2_DMA_CONTIG
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help
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Support for AM437x Video Processing Front End based Video
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Capture Driver.
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To compile this driver as a module, choose M here. The module
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will be called am437x-vpfe.
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3
drivers/media/platform/am437x/Makefile
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3
drivers/media/platform/am437x/Makefile
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@ -0,0 +1,3 @@
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# Makefile for AM437x VPFE driver
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obj-$(CONFIG_VIDEO_AM437X_VPFE) += am437x-vpfe.o
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2778
drivers/media/platform/am437x/am437x-vpfe.c
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2778
drivers/media/platform/am437x/am437x-vpfe.c
Normal file
File diff suppressed because it is too large
Load Diff
283
drivers/media/platform/am437x/am437x-vpfe.h
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283
drivers/media/platform/am437x/am437x-vpfe.h
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@ -0,0 +1,283 @@
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/*
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* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
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*
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* Benoit Parrot <bparrot@ti.com>
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* Lad, Prabhakar <prabhakar.csengg@gmail.com>
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef AM437X_VPFE_H
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#define AM437X_VPFE_H
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#include <linux/am437x-vpfe.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-dev.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include <media/videobuf2-dma-contig.h>
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#include "am437x-vpfe_regs.h"
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enum vpfe_pin_pol {
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VPFE_PINPOL_POSITIVE = 0,
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VPFE_PINPOL_NEGATIVE,
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};
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enum vpfe_hw_if_type {
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/* Raw Bayer */
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VPFE_RAW_BAYER = 0,
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/* BT656 - 8 bit */
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VPFE_BT656,
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/* BT656 - 10 bit */
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VPFE_BT656_10BIT,
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/* YCbCr - 8 bit with external sync */
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VPFE_YCBCR_SYNC_8,
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/* YCbCr - 16 bit with external sync */
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VPFE_YCBCR_SYNC_16,
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};
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/* interface description */
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struct vpfe_hw_if_param {
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enum vpfe_hw_if_type if_type;
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enum vpfe_pin_pol hdpol;
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enum vpfe_pin_pol vdpol;
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unsigned int bus_width;
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};
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#define VPFE_MAX_SUBDEV 1
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#define VPFE_MAX_INPUTS 1
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struct vpfe_pixel_format {
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struct v4l2_fmtdesc fmtdesc;
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/* bytes per pixel */
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int bpp;
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};
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struct vpfe_std_info {
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int active_pixels;
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int active_lines;
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/* current frame format */
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int frame_format;
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};
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struct vpfe_route {
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u32 input;
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u32 output;
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};
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struct vpfe_subdev_info {
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char name[32];
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/* Sub device group id */
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int grp_id;
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/* inputs available at the sub device */
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struct v4l2_input inputs[VPFE_MAX_INPUTS];
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/* Sub dev routing information for each input */
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struct vpfe_route *routes;
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/* check if sub dev supports routing */
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int can_route;
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/* ccdc bus/interface configuration */
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struct vpfe_hw_if_param vpfe_param;
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struct v4l2_subdev *sd;
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};
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struct vpfe_config {
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/* information about each subdev */
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struct vpfe_subdev_info sub_devs[VPFE_MAX_SUBDEV];
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/* Flat array, arranged in groups */
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struct v4l2_async_subdev *asd[VPFE_MAX_SUBDEV];
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};
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struct vpfe_cap_buffer {
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struct vb2_buffer vb;
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struct list_head list;
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};
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enum ccdc_pixfmt {
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CCDC_PIXFMT_RAW = 0,
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CCDC_PIXFMT_YCBCR_16BIT,
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CCDC_PIXFMT_YCBCR_8BIT,
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};
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enum ccdc_frmfmt {
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CCDC_FRMFMT_PROGRESSIVE = 0,
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CCDC_FRMFMT_INTERLACED,
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};
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/* PIXEL ORDER IN MEMORY from LSB to MSB */
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/* only applicable for 8-bit input mode */
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enum ccdc_pixorder {
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CCDC_PIXORDER_YCBYCR,
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CCDC_PIXORDER_CBYCRY,
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};
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enum ccdc_buftype {
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CCDC_BUFTYPE_FLD_INTERLEAVED,
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CCDC_BUFTYPE_FLD_SEPARATED
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};
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/* returns the highest bit used for the gamma */
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static inline u8 ccdc_gamma_width_max_bit(enum vpfe_ccdc_gamma_width width)
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{
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return 15 - width;
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}
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/* returns the highest bit used for this data size */
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static inline u8 ccdc_data_size_max_bit(enum vpfe_ccdc_data_size sz)
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{
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return sz == VPFE_CCDC_DATA_8BITS ? 7 : 15 - sz;
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}
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/* Structure for CCDC configuration parameters for raw capture mode */
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struct ccdc_params_raw {
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/* pixel format */
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enum ccdc_pixfmt pix_fmt;
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/* progressive or interlaced frame */
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enum ccdc_frmfmt frm_fmt;
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struct v4l2_rect win;
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/* Current Format Bytes Per Pixels */
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unsigned int bytesperpixel;
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/* Current Format Bytes per Lines
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* (Aligned to 32 bytes) used for HORZ_INFO
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*/
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unsigned int bytesperline;
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/* field id polarity */
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enum vpfe_pin_pol fid_pol;
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/* vertical sync polarity */
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enum vpfe_pin_pol vd_pol;
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/* horizontal sync polarity */
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enum vpfe_pin_pol hd_pol;
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/* interleaved or separated fields */
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enum ccdc_buftype buf_type;
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/*
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* enable to store the image in inverse
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* order in memory(bottom to top)
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*/
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unsigned char image_invert_enable;
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/* configurable parameters */
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struct vpfe_ccdc_config_params_raw config_params;
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};
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struct ccdc_params_ycbcr {
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/* pixel format */
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enum ccdc_pixfmt pix_fmt;
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/* progressive or interlaced frame */
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enum ccdc_frmfmt frm_fmt;
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struct v4l2_rect win;
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/* Current Format Bytes Per Pixels */
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unsigned int bytesperpixel;
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/* Current Format Bytes per Lines
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* (Aligned to 32 bytes) used for HORZ_INFO
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*/
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unsigned int bytesperline;
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/* field id polarity */
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enum vpfe_pin_pol fid_pol;
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/* vertical sync polarity */
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enum vpfe_pin_pol vd_pol;
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/* horizontal sync polarity */
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enum vpfe_pin_pol hd_pol;
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/* enable BT.656 embedded sync mode */
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int bt656_enable;
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/* cb:y:cr:y or y:cb:y:cr in memory */
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enum ccdc_pixorder pix_order;
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/* interleaved or separated fields */
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enum ccdc_buftype buf_type;
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};
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/*
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* CCDC operational configuration
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*/
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struct ccdc_config {
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/* CCDC interface type */
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enum vpfe_hw_if_type if_type;
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/* Raw Bayer configuration */
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struct ccdc_params_raw bayer;
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/* YCbCr configuration */
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struct ccdc_params_ycbcr ycbcr;
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/* ccdc base address */
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void __iomem *base_addr;
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};
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struct vpfe_ccdc {
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struct ccdc_config ccdc_cfg;
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u32 ccdc_ctx[VPFE_REG_END / sizeof(u32)];
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};
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struct vpfe_device {
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/* V4l2 specific parameters */
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/* Identifies video device for this channel */
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struct video_device *video_dev;
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/* sub devices */
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struct v4l2_subdev **sd;
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/* vpfe cfg */
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struct vpfe_config *cfg;
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/* V4l2 device */
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struct v4l2_device v4l2_dev;
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/* parent device */
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struct device *pdev;
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/* subdevice async Notifier */
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struct v4l2_async_notifier notifier;
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/* Indicates id of the field which is being displayed */
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unsigned field;
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unsigned sequence;
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/* current interface type */
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struct vpfe_hw_if_param vpfe_if_params;
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/* ptr to currently selected sub device */
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struct vpfe_subdev_info *current_subdev;
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/* current input at the sub device */
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int current_input;
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/* Keeps track of the information about the standard */
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struct vpfe_std_info std_info;
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/* std index into std table */
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int std_index;
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/* IRQs used when CCDC output to SDRAM */
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unsigned int irq;
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/* Pointer pointing to current v4l2_buffer */
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struct vpfe_cap_buffer *cur_frm;
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/* Pointer pointing to next v4l2_buffer */
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struct vpfe_cap_buffer *next_frm;
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/* Used to store pixel format */
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struct v4l2_format fmt;
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/* Used to store current bytes per pixel based on current format */
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unsigned int bpp;
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/*
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* used when IMP is chained to store the crop window which
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* is different from the image window
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*/
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struct v4l2_rect crop;
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/* Buffer queue used in video-buf */
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struct vb2_queue buffer_queue;
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/* Allocator-specific contexts for each plane */
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struct vb2_alloc_ctx *alloc_ctx;
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/* Queue of filled frames */
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struct list_head dma_queue;
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/* IRQ lock for DMA queue */
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spinlock_t dma_queue_lock;
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/* lock used to access this structure */
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struct mutex lock;
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/*
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* offset where second field starts from the starting of the
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* buffer for field separated YCbCr formats
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*/
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u32 field_off;
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struct vpfe_ccdc ccdc;
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};
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#endif /* AM437X_VPFE_H */
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140
drivers/media/platform/am437x/am437x-vpfe_regs.h
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140
drivers/media/platform/am437x/am437x-vpfe_regs.h
Normal file
@ -0,0 +1,140 @@
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/*
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* TI AM437x Image Sensor Interface Registers
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*
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* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
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*
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* Benoit Parrot <bparrot@ti.com>
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* Lad, Prabhakar <prabhakar.csengg@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef AM437X_VPFE_REGS_H
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#define AM437X_VPFE_REGS_H
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/* VPFE module register offset */
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#define VPFE_REVISION 0x0
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#define VPFE_PCR 0x4
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#define VPFE_SYNMODE 0x8
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#define VPFE_HD_VD_WID 0xc
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#define VPFE_PIX_LINES 0x10
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#define VPFE_HORZ_INFO 0x14
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#define VPFE_VERT_START 0x18
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#define VPFE_VERT_LINES 0x1c
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#define VPFE_CULLING 0x20
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#define VPFE_HSIZE_OFF 0x24
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#define VPFE_SDOFST 0x28
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#define VPFE_SDR_ADDR 0x2c
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#define VPFE_CLAMP 0x30
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#define VPFE_DCSUB 0x34
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#define VPFE_COLPTN 0x38
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#define VPFE_BLKCMP 0x3c
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#define VPFE_VDINT 0x48
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#define VPFE_ALAW 0x4c
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#define VPFE_REC656IF 0x50
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#define VPFE_CCDCFG 0x54
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#define VPFE_DMA_CNTL 0x98
|
||||
#define VPFE_SYSCONFIG 0x104
|
||||
#define VPFE_CONFIG 0x108
|
||||
#define VPFE_IRQ_EOI 0x110
|
||||
#define VPFE_IRQ_STS_RAW 0x114
|
||||
#define VPFE_IRQ_STS 0x118
|
||||
#define VPFE_IRQ_EN_SET 0x11c
|
||||
#define VPFE_IRQ_EN_CLR 0x120
|
||||
#define VPFE_REG_END 0x124
|
||||
|
||||
/* Define bit fields within selected registers */
|
||||
#define VPFE_FID_POL_MASK 1
|
||||
#define VPFE_FID_POL_SHIFT 4
|
||||
#define VPFE_HD_POL_MASK 1
|
||||
#define VPFE_HD_POL_SHIFT 3
|
||||
#define VPFE_VD_POL_MASK 1
|
||||
#define VPFE_VD_POL_SHIFT 2
|
||||
#define VPFE_HSIZE_OFF_MASK 0xffffffe0
|
||||
#define VPFE_32BYTE_ALIGN_VAL 31
|
||||
#define VPFE_FRM_FMT_MASK 0x1
|
||||
#define VPFE_FRM_FMT_SHIFT 7
|
||||
#define VPFE_DATA_SZ_MASK 7
|
||||
#define VPFE_DATA_SZ_SHIFT 8
|
||||
#define VPFE_PIX_FMT_MASK 3
|
||||
#define VPFE_PIX_FMT_SHIFT 12
|
||||
#define VPFE_VP2SDR_DISABLE 0xfffbffff
|
||||
#define VPFE_WEN_ENABLE (1 << 17)
|
||||
#define VPFE_SDR2RSZ_DISABLE 0xfff7ffff
|
||||
#define VPFE_VDHDEN_ENABLE (1 << 16)
|
||||
#define VPFE_LPF_ENABLE (1 << 14)
|
||||
#define VPFE_ALAW_ENABLE (1 << 3)
|
||||
#define VPFE_ALAW_GAMMA_WD_MASK 7
|
||||
#define VPFE_BLK_CLAMP_ENABLE (1 << 31)
|
||||
#define VPFE_BLK_SGAIN_MASK 0x1f
|
||||
#define VPFE_BLK_ST_PXL_MASK 0x7fff
|
||||
#define VPFE_BLK_ST_PXL_SHIFT 10
|
||||
#define VPFE_BLK_SAMPLE_LN_MASK 7
|
||||
#define VPFE_BLK_SAMPLE_LN_SHIFT 28
|
||||
#define VPFE_BLK_SAMPLE_LINE_MASK 7
|
||||
#define VPFE_BLK_SAMPLE_LINE_SHIFT 25
|
||||
#define VPFE_BLK_DC_SUB_MASK 0x03fff
|
||||
#define VPFE_BLK_COMP_MASK 0xff
|
||||
#define VPFE_BLK_COMP_GB_COMP_SHIFT 8
|
||||
#define VPFE_BLK_COMP_GR_COMP_SHIFT 16
|
||||
#define VPFE_BLK_COMP_R_COMP_SHIFT 24
|
||||
#define VPFE_LATCH_ON_VSYNC_DISABLE (1 << 15)
|
||||
#define VPFE_DATA_PACK_ENABLE (1 << 11)
|
||||
#define VPFE_HORZ_INFO_SPH_SHIFT 16
|
||||
#define VPFE_VERT_START_SLV0_SHIFT 16
|
||||
#define VPFE_VDINT_VDINT0_SHIFT 16
|
||||
#define VPFE_VDINT_VDINT1_MASK 0xffff
|
||||
#define VPFE_PPC_RAW 1
|
||||
#define VPFE_DCSUB_DEFAULT_VAL 0
|
||||
#define VPFE_CLAMP_DEFAULT_VAL 0
|
||||
#define VPFE_COLPTN_VAL 0xbb11bb11
|
||||
#define VPFE_TWO_BYTES_PER_PIXEL 2
|
||||
#define VPFE_INTERLACED_IMAGE_INVERT 0x4b6d
|
||||
#define VPFE_INTERLACED_NO_IMAGE_INVERT 0x0249
|
||||
#define VPFE_PROGRESSIVE_IMAGE_INVERT 0x4000
|
||||
#define VPFE_PROGRESSIVE_NO_IMAGE_INVERT 0
|
||||
#define VPFE_INTERLACED_HEIGHT_SHIFT 1
|
||||
#define VPFE_SYN_MODE_INPMOD_SHIFT 12
|
||||
#define VPFE_SYN_MODE_INPMOD_MASK 3
|
||||
#define VPFE_SYN_MODE_8BITS (7 << 8)
|
||||
#define VPFE_SYN_MODE_10BITS (6 << 8)
|
||||
#define VPFE_SYN_MODE_11BITS (5 << 8)
|
||||
#define VPFE_SYN_MODE_12BITS (4 << 8)
|
||||
#define VPFE_SYN_MODE_13BITS (3 << 8)
|
||||
#define VPFE_SYN_MODE_14BITS (2 << 8)
|
||||
#define VPFE_SYN_MODE_15BITS (1 << 8)
|
||||
#define VPFE_SYN_MODE_16BITS (0 << 8)
|
||||
#define VPFE_SYN_FLDMODE_MASK 1
|
||||
#define VPFE_SYN_FLDMODE_SHIFT 7
|
||||
#define VPFE_REC656IF_BT656_EN 3
|
||||
#define VPFE_SYN_MODE_VD_POL_NEGATIVE (1 << 2)
|
||||
#define VPFE_CCDCFG_Y8POS_SHIFT 11
|
||||
#define VPFE_CCDCFG_BW656_10BIT (1 << 5)
|
||||
#define VPFE_SDOFST_FIELD_INTERLEAVED 0x249
|
||||
#define VPFE_NO_CULLING 0xffff00ff
|
||||
#define VPFE_VDINT0 (1 << 0)
|
||||
#define VPFE_VDINT1 (1 << 1)
|
||||
#define VPFE_VDINT2 (1 << 2)
|
||||
#define VPFE_DMA_CNTL_OVERFLOW (1 << 31)
|
||||
|
||||
#define VPFE_CONFIG_PCLK_INV_SHIFT 0
|
||||
#define VPFE_CONFIG_PCLK_INV_MASK 1
|
||||
#define VPFE_CONFIG_PCLK_INV_NOT_INV 0
|
||||
#define VPFE_CONFIG_PCLK_INV_INV 1
|
||||
#define VPFE_CONFIG_EN_SHIFT 1
|
||||
#define VPFE_CONFIG_EN_MASK 2
|
||||
#define VPFE_CONFIG_EN_DISABLE 0
|
||||
#define VPFE_CONFIG_EN_ENABLE 1
|
||||
#define VPFE_CONFIG_ST_SHIFT 2
|
||||
#define VPFE_CONFIG_ST_MASK 4
|
||||
#define VPFE_CONFIG_ST_OCP_ACTIVE 0
|
||||
#define VPFE_CONFIG_ST_OCP_STANDBY 1
|
||||
|
||||
#endif /* AM437X_VPFE_REGS_H */
|
@ -35,6 +35,7 @@ header-y += adfs_fs.h
|
||||
header-y += affs_hardblocks.h
|
||||
header-y += agpgart.h
|
||||
header-y += aio_abi.h
|
||||
header-y += am437x-vpfe.h
|
||||
header-y += apm_bios.h
|
||||
header-y += arcfb.h
|
||||
header-y += atalk.h
|
||||
|
122
include/uapi/linux/am437x-vpfe.h
Normal file
122
include/uapi/linux/am437x-vpfe.h
Normal file
@ -0,0 +1,122 @@
|
||||
/*
|
||||
* Copyright (C) 2013 - 2014 Texas Instruments, Inc.
|
||||
*
|
||||
* Benoit Parrot <bparrot@ti.com>
|
||||
* Lad, Prabhakar <prabhakar.csengg@gmail.com>
|
||||
*
|
||||
* This program is free software; you may redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef AM437X_VPFE_USER_H
|
||||
#define AM437X_VPFE_USER_H
|
||||
|
||||
enum vpfe_ccdc_data_size {
|
||||
VPFE_CCDC_DATA_16BITS = 0,
|
||||
VPFE_CCDC_DATA_15BITS,
|
||||
VPFE_CCDC_DATA_14BITS,
|
||||
VPFE_CCDC_DATA_13BITS,
|
||||
VPFE_CCDC_DATA_12BITS,
|
||||
VPFE_CCDC_DATA_11BITS,
|
||||
VPFE_CCDC_DATA_10BITS,
|
||||
VPFE_CCDC_DATA_8BITS,
|
||||
};
|
||||
|
||||
/* enum for No of pixel per line to be avg. in Black Clamping*/
|
||||
enum vpfe_ccdc_sample_length {
|
||||
VPFE_CCDC_SAMPLE_1PIXELS = 0,
|
||||
VPFE_CCDC_SAMPLE_2PIXELS,
|
||||
VPFE_CCDC_SAMPLE_4PIXELS,
|
||||
VPFE_CCDC_SAMPLE_8PIXELS,
|
||||
VPFE_CCDC_SAMPLE_16PIXELS,
|
||||
};
|
||||
|
||||
/* enum for No of lines in Black Clamping */
|
||||
enum vpfe_ccdc_sample_line {
|
||||
VPFE_CCDC_SAMPLE_1LINES = 0,
|
||||
VPFE_CCDC_SAMPLE_2LINES,
|
||||
VPFE_CCDC_SAMPLE_4LINES,
|
||||
VPFE_CCDC_SAMPLE_8LINES,
|
||||
VPFE_CCDC_SAMPLE_16LINES,
|
||||
};
|
||||
|
||||
/* enum for Alaw gamma width */
|
||||
enum vpfe_ccdc_gamma_width {
|
||||
VPFE_CCDC_GAMMA_BITS_15_6 = 0, /* use bits 15-6 for gamma */
|
||||
VPFE_CCDC_GAMMA_BITS_14_5,
|
||||
VPFE_CCDC_GAMMA_BITS_13_4,
|
||||
VPFE_CCDC_GAMMA_BITS_12_3,
|
||||
VPFE_CCDC_GAMMA_BITS_11_2,
|
||||
VPFE_CCDC_GAMMA_BITS_10_1,
|
||||
VPFE_CCDC_GAMMA_BITS_09_0, /* use bits 9-0 for gamma */
|
||||
};
|
||||
|
||||
/* structure for ALaw */
|
||||
struct vpfe_ccdc_a_law {
|
||||
/* Enable/disable A-Law */
|
||||
unsigned char enable;
|
||||
/* Gamma Width Input */
|
||||
enum vpfe_ccdc_gamma_width gamma_wd;
|
||||
};
|
||||
|
||||
/* structure for Black Clamping */
|
||||
struct vpfe_ccdc_black_clamp {
|
||||
unsigned char enable;
|
||||
/* only if bClampEnable is TRUE */
|
||||
enum vpfe_ccdc_sample_length sample_pixel;
|
||||
/* only if bClampEnable is TRUE */
|
||||
enum vpfe_ccdc_sample_line sample_ln;
|
||||
/* only if bClampEnable is TRUE */
|
||||
unsigned short start_pixel;
|
||||
/* only if bClampEnable is TRUE */
|
||||
unsigned short sgain;
|
||||
/* only if bClampEnable is FALSE */
|
||||
unsigned short dc_sub;
|
||||
};
|
||||
|
||||
/* structure for Black Level Compensation */
|
||||
struct vpfe_ccdc_black_compensation {
|
||||
/* Constant value to subtract from Red component */
|
||||
char r;
|
||||
/* Constant value to subtract from Gr component */
|
||||
char gr;
|
||||
/* Constant value to subtract from Blue component */
|
||||
char b;
|
||||
/* Constant value to subtract from Gb component */
|
||||
char gb;
|
||||
};
|
||||
|
||||
/* Structure for CCDC configuration parameters for raw capture mode passed
|
||||
* by application
|
||||
*/
|
||||
struct vpfe_ccdc_config_params_raw {
|
||||
/* data size value from 8 to 16 bits */
|
||||
enum vpfe_ccdc_data_size data_sz;
|
||||
/* Structure for Optional A-Law */
|
||||
struct vpfe_ccdc_a_law alaw;
|
||||
/* Structure for Optical Black Clamp */
|
||||
struct vpfe_ccdc_black_clamp blk_clamp;
|
||||
/* Structure for Black Compensation */
|
||||
struct vpfe_ccdc_black_compensation blk_comp;
|
||||
};
|
||||
|
||||
/*
|
||||
* Private IOCTL
|
||||
* VIDIOC_AM437X_CCDC_CFG - Set CCDC configuration for raw capture
|
||||
* This is an experimental ioctl that will change in future kernels. So use
|
||||
* this ioctl with care !
|
||||
**/
|
||||
#define VIDIOC_AM437X_CCDC_CFG \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 1, void *)
|
||||
|
||||
#endif /* AM437X_VPFE_USER_H */
|
Loading…
Reference in New Issue
Block a user