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crypto: qce - Remove totallen and offset in qce_start
totallen is used to get the size of the data to be transformed. This is also available via nbytes or cryptlen in the qce_sha_reqctx and qce_cipher_ctx. Similarly offset convey nothing for the supported encryption and authentication transformations and is always 0. Remove these two redundant parameters in qce_start. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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62e4842842
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@ -140,8 +140,7 @@ static u32 qce_auth_cfg(unsigned long flags, u32 key_size)
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return cfg;
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}
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static int qce_setup_regs_ahash(struct crypto_async_request *async_req,
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u32 totallen, u32 offset)
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static int qce_setup_regs_ahash(struct crypto_async_request *async_req)
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{
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struct ahash_request *req = ahash_request_cast(async_req);
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struct crypto_ahash *ahash = __crypto_ahash_cast(async_req->tfm);
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@ -306,8 +305,7 @@ static void qce_xtskey(struct qce_device *qce, const u8 *enckey,
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qce_write(qce, REG_ENCR_XTS_DU_SIZE, cryptlen);
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}
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static int qce_setup_regs_skcipher(struct crypto_async_request *async_req,
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u32 totallen, u32 offset)
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static int qce_setup_regs_skcipher(struct crypto_async_request *async_req)
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{
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struct skcipher_request *req = skcipher_request_cast(async_req);
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struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
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@ -367,7 +365,7 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req,
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qce_write(qce, REG_ENCR_SEG_CFG, encr_cfg);
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qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen);
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qce_write(qce, REG_ENCR_SEG_START, offset & 0xffff);
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qce_write(qce, REG_ENCR_SEG_START, 0);
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if (IS_CTR(flags)) {
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qce_write(qce, REG_CNTR_MASK, ~0);
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@ -376,7 +374,7 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req,
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qce_write(qce, REG_CNTR_MASK2, ~0);
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}
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qce_write(qce, REG_SEG_SIZE, totallen);
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qce_write(qce, REG_SEG_SIZE, rctx->cryptlen);
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/* get little endianness */
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config = qce_config_reg(qce, 1);
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@ -388,17 +386,16 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req,
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}
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#endif
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int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
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u32 offset)
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int qce_start(struct crypto_async_request *async_req, u32 type)
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{
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switch (type) {
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#ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER
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case CRYPTO_ALG_TYPE_SKCIPHER:
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return qce_setup_regs_skcipher(async_req, totallen, offset);
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return qce_setup_regs_skcipher(async_req);
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#endif
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#ifdef CONFIG_CRYPTO_DEV_QCE_SHA
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case CRYPTO_ALG_TYPE_AHASH:
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return qce_setup_regs_ahash(async_req, totallen, offset);
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return qce_setup_regs_ahash(async_req);
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#endif
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default:
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return -EINVAL;
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@ -94,7 +94,6 @@ struct qce_alg_template {
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void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
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int qce_check_status(struct qce_device *qce, u32 *status);
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void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
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int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
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u32 offset);
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int qce_start(struct crypto_async_request *async_req, u32 type);
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#endif /* _COMMON_H_ */
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@ -113,7 +113,7 @@ static int qce_ahash_async_req_handle(struct crypto_async_request *async_req)
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qce_dma_issue_pending(&qce->dma);
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ret = qce_start(async_req, tmpl->crypto_alg_type, 0, 0);
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ret = qce_start(async_req, tmpl->crypto_alg_type);
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if (ret)
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goto error_terminate;
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@ -144,7 +144,7 @@ qce_skcipher_async_req_handle(struct crypto_async_request *async_req)
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qce_dma_issue_pending(&qce->dma);
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ret = qce_start(async_req, tmpl->crypto_alg_type, req->cryptlen, 0);
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ret = qce_start(async_req, tmpl->crypto_alg_type);
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if (ret)
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goto error_terminate;
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