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EDAC, thunderx: Add Cavium ThunderX EDAC driver
Add support for Cavium ThunderX EDAC capable on-chip peripherals, namely the DRAM controller (LMC), cache coherent processor interconnect (CCPI) and level 2 cache blocks (L2C-TAD, L2C-MCI, L2C-CBC) Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Cc: David.Daney@cavium.com Cc: Jan.Glauber@cavium.com Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170324222837.60583-1-s.temerkhanov@gmail.com Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -4695,6 +4695,7 @@ L: linux-edac@vger.kernel.org
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L: linux-mips@linux-mips.org
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S: Supported
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F: drivers/edac/octeon_edac*
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F: drivers/edac/thunderx_edac*
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EDAC-E752X
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M: Mark Gross <mark.gross@intel.com>
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@ -392,6 +392,17 @@ config EDAC_OCTEON_PCI
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Support for error detection and correction on the
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Cavium Octeon family of SOCs.
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config EDAC_THUNDERX
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tristate "Cavium ThunderX EDAC"
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depends on EDAC_MM_EDAC
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depends on ARM64
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depends on PCI
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help
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Support for error detection and correction on the
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Cavium ThunderX memory controllers (LMC), Cache
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Coherent Processor Interconnect (CCPI) and L2 cache
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blocks (TAD, CBC, MCI).
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config EDAC_ALTERA
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bool "Altera SOCFPGA ECC"
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depends on EDAC_MM_EDAC=y && ARCH_SOCFPGA
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@ -74,6 +74,7 @@ obj-$(CONFIG_EDAC_OCTEON_PC) += octeon_edac-pc.o
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obj-$(CONFIG_EDAC_OCTEON_L2C) += octeon_edac-l2c.o
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obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o
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obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o
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obj-$(CONFIG_EDAC_THUNDERX) += thunderx_edac.o
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obj-$(CONFIG_EDAC_ALTERA) += altera_edac.o
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obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o
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2183
drivers/edac/thunderx_edac.c
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2183
drivers/edac/thunderx_edac.c
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