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drivers/rapidio/devices/tsi721_dma.c: optimize use of BDMA descriptors
Combine SG entries describing single contiguous memory block into one Tsi721 BDMA descriptor. This reduces number of hardware descriptors required for large data transfers and improves performance on the PCIe side by reducing number of descriptor fetch requests. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Alexandre Bounine
Linus Torvalds
parent
3f59b067c5
commit
40f847baf5
@ -644,6 +644,9 @@ enum tsi721_smsg_int_flag {
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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#define TSI721_BDMA_BD_RING_SZ 128
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#define TSI721_BDMA_MAX_BCOUNT (TSI721_DMAD_BCOUNT1 + 1)
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struct tsi721_tx_desc {
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struct dma_async_tx_descriptor txd;
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struct tsi721_dma_desc *hw_desc;
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@ -652,6 +655,7 @@ struct tsi721_tx_desc {
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u64 rio_addr;
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/* upper 2-bits of 66-bit RIO address */
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u8 rio_addr_u;
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u32 bcount;
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bool interrupt;
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struct list_head desc_node;
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struct list_head tx_list;
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@ -304,35 +304,17 @@ struct tsi721_tx_desc *tsi721_desc_get(struct tsi721_bdma_chan *bdma_chan)
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}
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static int
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tsi721_fill_desc(struct tsi721_bdma_chan *bdma_chan,
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struct tsi721_tx_desc *desc, struct scatterlist *sg,
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tsi721_desc_fill_init(struct tsi721_tx_desc *desc, struct scatterlist *sg,
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enum dma_rtype rtype, u32 sys_size)
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{
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struct tsi721_dma_desc *bd_ptr = desc->hw_desc;
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u64 rio_addr;
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if (sg_dma_len(sg) > TSI721_DMAD_BCOUNT1 + 1) {
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dev_err(bdma_chan->dchan.device->dev,
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"SG element is too large\n");
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return -EINVAL;
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}
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dev_dbg(bdma_chan->dchan.device->dev,
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"desc: 0x%llx, addr: 0x%llx len: 0x%x\n",
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(u64)desc->txd.phys, (unsigned long long)sg_dma_address(sg),
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sg_dma_len(sg));
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dev_dbg(bdma_chan->dchan.device->dev,
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"bd_ptr = %p did=%d raddr=0x%llx\n",
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bd_ptr, desc->destid, desc->rio_addr);
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/* Initialize DMA descriptor */
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bd_ptr->type_id = cpu_to_le32((DTYPE1 << 29) |
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(rtype << 19) | desc->destid);
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if (desc->interrupt)
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bd_ptr->type_id |= cpu_to_le32(TSI721_DMAD_IOF);
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bd_ptr->bcount = cpu_to_le32(((desc->rio_addr & 0x3) << 30) |
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(sys_size << 26) | sg_dma_len(sg));
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(sys_size << 26));
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rio_addr = (desc->rio_addr >> 2) |
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((u64)(desc->rio_addr_u & 0x3) << 62);
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bd_ptr->raddr_lo = cpu_to_le32(rio_addr & 0xffffffff);
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@ -346,6 +328,20 @@ tsi721_fill_desc(struct tsi721_bdma_chan *bdma_chan,
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return 0;
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}
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static int
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tsi721_desc_fill_end(struct tsi721_tx_desc *desc)
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{
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struct tsi721_dma_desc *bd_ptr = desc->hw_desc;
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/* Update DMA descriptor */
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if (desc->interrupt)
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bd_ptr->type_id |= cpu_to_le32(TSI721_DMAD_IOF);
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bd_ptr->bcount |= cpu_to_le32(desc->bcount & TSI721_DMAD_BCOUNT1);
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return 0;
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}
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static void tsi721_dma_chain_complete(struct tsi721_bdma_chan *bdma_chan,
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struct tsi721_tx_desc *desc)
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{
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@ -674,6 +670,7 @@ struct dma_async_tx_descriptor *tsi721_prep_rio_sg(struct dma_chan *dchan,
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unsigned int i;
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u32 sys_size = dma_to_mport(dchan->device)->sys_size;
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enum dma_rtype rtype;
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dma_addr_t next_addr = -1;
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if (!sgl || !sg_len) {
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dev_err(dchan->device->dev, "%s: No SG list\n", __func__);
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@ -704,36 +701,84 @@ struct dma_async_tx_descriptor *tsi721_prep_rio_sg(struct dma_chan *dchan,
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for_each_sg(sgl, sg, sg_len, i) {
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int err;
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dev_dbg(dchan->device->dev, "%s: sg #%d\n", __func__, i);
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if (sg_dma_len(sg) > TSI721_BDMA_MAX_BCOUNT) {
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dev_err(dchan->device->dev,
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"%s: SG entry %d is too large\n", __func__, i);
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goto err_desc_put;
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}
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/*
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* If this sg entry forms contiguous block with previous one,
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* try to merge it into existing DMA descriptor
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*/
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if (desc) {
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if (next_addr == sg_dma_address(sg) &&
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desc->bcount + sg_dma_len(sg) <=
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TSI721_BDMA_MAX_BCOUNT) {
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/* Adjust byte count of the descriptor */
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desc->bcount += sg_dma_len(sg);
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goto entry_done;
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}
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/*
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* Finalize this descriptor using total
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* byte count value.
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*/
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tsi721_desc_fill_end(desc);
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dev_dbg(dchan->device->dev, "%s: desc final len: %d\n",
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__func__, desc->bcount);
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}
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/*
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* Obtain and initialize a new descriptor
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*/
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desc = tsi721_desc_get(bdma_chan);
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if (!desc) {
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dev_err(dchan->device->dev,
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"Not enough descriptors available\n");
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goto err_desc_get;
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"%s: Failed to get new descriptor for SG %d\n",
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__func__, i);
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goto err_desc_put;
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}
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if (sg_is_last(sg))
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desc->interrupt = (flags & DMA_PREP_INTERRUPT) != 0;
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else
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desc->interrupt = false;
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desc->destid = rext->destid;
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desc->rio_addr = rio_addr;
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desc->rio_addr_u = 0;
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desc->bcount = sg_dma_len(sg);
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err = tsi721_fill_desc(bdma_chan, desc, sg, rtype, sys_size);
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dev_dbg(dchan->device->dev,
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"sg%d desc: 0x%llx, addr: 0x%llx len: %d\n",
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i, (u64)desc->txd.phys,
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(unsigned long long)sg_dma_address(sg),
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sg_dma_len(sg));
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dev_dbg(dchan->device->dev,
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"bd_ptr = %p did=%d raddr=0x%llx\n",
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desc->hw_desc, desc->destid, desc->rio_addr);
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err = tsi721_desc_fill_init(desc, sg, rtype, sys_size);
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if (err) {
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dev_err(dchan->device->dev,
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"Failed to build desc: %d\n", err);
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goto err_desc_get;
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goto err_desc_put;
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}
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rio_addr += sg_dma_len(sg);
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next_addr = sg_dma_address(sg);
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if (!first)
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first = desc;
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else
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list_add_tail(&desc->desc_node, &first->tx_list);
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entry_done:
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if (sg_is_last(sg)) {
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desc->interrupt = (flags & DMA_PREP_INTERRUPT) != 0;
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tsi721_desc_fill_end(desc);
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dev_dbg(dchan->device->dev, "%s: desc final len: %d\n",
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__func__, desc->bcount);
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} else {
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rio_addr += sg_dma_len(sg);
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next_addr += sg_dma_len(sg);
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}
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}
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first->txd.cookie = -EBUSY;
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@ -741,7 +786,7 @@ struct dma_async_tx_descriptor *tsi721_prep_rio_sg(struct dma_chan *dchan,
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return &first->txd;
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err_desc_get:
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err_desc_put:
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tsi721_desc_put(bdma_chan, first);
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return NULL;
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}
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@ -792,7 +837,7 @@ int tsi721_register_dma(struct tsi721_device *priv)
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if (i == TSI721_DMACH_MAINT)
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continue;
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bdma_chan->bd_num = 64;
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bdma_chan->bd_num = TSI721_BDMA_BD_RING_SZ;
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bdma_chan->regs = priv->regs + TSI721_DMAC_BASE(i);
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bdma_chan->dchan.device = &mport->dma;
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