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x86: convert TSC disabling to generic cpuid disable bitmap

Browse Source 
Fix from: Ian Campbell <ijc@hellion.org.uk>

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Andi Kleen 2008-01-30 13:33:20 +01:00 committed by Ingo Molnar
parent 8424950b5e
commit 404ee5b14b
8 changed files with 11 additions and 26 deletions
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2
arch/x86/kernel/cpu/bugs.c
View File

@ -154,7 +154,7 @@ static void __init check_config(void)
* If we configured ourselves for a TSC, we'd better have one!
*/
#ifdef CONFIG_X86_TSC
if (!cpu_has_tsc && !tsc_disable)
if (!cpu_has_tsc)
panic("Kernel compiled for Pentium+, requires TSC feature!");
#endif

9
arch/x86/kernel/cpu/common.c
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@ -446,10 +446,6 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
* we do "generic changes."
*/
/* TSC disabled? */
if ( tsc_disable )
clear_bit(X86_FEATURE_TSC, c->x86_capability);
/* If the model name is still unset, do table lookup. */
if ( !c->x86_model_id[0] ) {
char *p;
@ -650,11 +646,6 @@ void __cpuinit cpu_init(void)
if (cpu_has_vme || cpu_has_tsc || cpu_has_de)
clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
if (tsc_disable && cpu_has_tsc) {
printk(KERN_NOTICE "Disabling TSC...\n");
/**** FIX-HPA: DOES THIS REALLY BELONG HERE? ****/
clear_bit(X86_FEATURE_TSC, boot_cpu_data.x86_capability);
}
load_idt(&idt_descr);
switch_to_new_gdt();

2
arch/x86/kernel/numaq_32.c
View File

@ -82,7 +82,7 @@ static int __init numaq_tsc_disable(void)
{
if (num_online_nodes() > 1) {
printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
tsc_disable = 1;
setup_clear_cpu_cap(X86_FEATURE_TSC);
}
return 0;
}

14
arch/x86/kernel/tsc_32.c
View File

@ -24,8 +24,6 @@ static int tsc_enabled;
unsigned int tsc_khz;
EXPORT_SYMBOL_GPL(tsc_khz);
int tsc_disable;
#ifdef CONFIG_X86_TSC
static int __init tsc_setup(char *str)
{
@ -40,8 +38,7 @@ static int __init tsc_setup(char *str)
*/
static int __init tsc_setup(char *str)
{
tsc_disable = 1;
setup_clear_cpu_cap(X86_FEATURE_TSC);
return 1;
}
#endif
@ -395,7 +392,7 @@ void __init tsc_init(void)
{
int cpu;
if (!cpu_has_tsc || tsc_disable)
if (!cpu_has_tsc)
goto out_no_tsc;
cpu_khz = calculate_cpu_khz();
@ -439,10 +436,5 @@ void __init tsc_init(void)
return;
out_no_tsc:
/*
* Set the tsc_disable flag if there's no TSC support, this
* makes it a fast flag for the kernel to see whether it
* should be using the TSC.
*/
tsc_disable = 1;
setup_clear_cpu_cap(X86_FEATURE_TSC);
}

2
arch/x86/mach-voyager/setup.c
View File

@ -37,7 +37,7 @@ void __init pre_setup_arch_hook(void)
{
/* Voyagers run their CPUs from independent clocks, so disable
* the TSC code because we can't sync them */
tsc_disable = 1;
setup_clear_cpu_cap(X86_FEATURE_TSC);
}
void __init trap_init_hook(void)

2
arch/x86/xen/time.c
View File

@ -592,7 +592,7 @@ __init void xen_time_init(void)
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
tsc_disable = 0;
setup_force_cpu_cap(X86_FEATURE_TSC);
xen_setup_timer(cpu);
xen_setup_cpu_clockevents();

4
include/asm-x86/cpufeature.h
View File

@ -135,6 +135,10 @@
clear_cpu_cap(&boot_cpu_data, bit); \
set_bit(bit, cleared_cpu_caps); \
} while (0)
#define setup_force_cpu_cap(bit) do { \
set_cpu_cap(&boot_cpu_data, bit); \
clear_bit(bit, cleared_cpu_caps); \
} while (0)
#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
#define cpu_has_vme boot_cpu_has(X86_FEATURE_VME)

2
include/asm-x86/tsc.h
View File

@ -16,8 +16,6 @@ typedef unsigned long long cycles_t;
extern unsigned int cpu_khz;
extern unsigned int tsc_khz;
/* flag for disabling the tsc */
extern int tsc_disable;
extern void disable_TSC(void);