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ice: prefix clock timer command enumeration values with ICE_PTP
The ice driver has an enumeration for the various commands that can be programmed to the MAC and PHY for setting up hardware clock operations. Prefix these with ICE_PTP so that they are clearly namespaced to the ice driver. Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Sergey Temerkhanov
Tony Nguyen
parent
a5ea26536e
commit
40326b2b42
@ -242,19 +242,19 @@ static void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
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cmd_val = tmr_idx << SEL_CPK_SRC;
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switch (cmd) {
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case INIT_TIME:
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case ICE_PTP_INIT_TIME:
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cmd_val |= GLTSYN_CMD_INIT_TIME;
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break;
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case INIT_INCVAL:
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case ICE_PTP_INIT_INCVAL:
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cmd_val |= GLTSYN_CMD_INIT_INCVAL;
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break;
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case ADJ_TIME:
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case ICE_PTP_ADJ_TIME:
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cmd_val |= GLTSYN_CMD_ADJ_TIME;
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break;
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case ADJ_TIME_AT_TIME:
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case ICE_PTP_ADJ_TIME_AT_TIME:
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cmd_val |= GLTSYN_CMD_ADJ_INIT_TIME;
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break;
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case READ_TIME:
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case ICE_PTP_READ_TIME:
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cmd_val |= GLTSYN_CMD_READ_TIME;
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break;
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case ICE_PTP_NOP:
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@ -1151,7 +1151,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw)
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* @time: Time to initialize the PHY port clocks to
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*
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* Program the PHY port registers with a new initial time value. The port
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* clock will be initialized once the driver issues an INIT_TIME sync
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* clock will be initialized once the driver issues an ICE_PTP_INIT_TIME sync
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* command. The time value is the upper 32 bits of the PHY timer, usually in
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* units of nominal nanoseconds.
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*/
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@ -1200,7 +1200,7 @@ exit_err:
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*
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* Program the port for an atomic adjustment by writing the Tx and Rx timer
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* registers. The atomic adjustment won't be completed until the driver issues
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* an ADJ_TIME command.
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* an ICE_PTP_ADJ_TIME command.
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*
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* Note that time is not in units of nanoseconds. It is in clock time
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* including the lower sub-nanosecond portion of the port timer.
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@ -1253,7 +1253,7 @@ exit_err:
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*
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* Prepare the PHY ports for an atomic time adjustment by programming the PHY
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* Tx and Rx port registers. The actual adjustment is completed by issuing an
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* ADJ_TIME or ADJ_TIME_AT_TIME sync command.
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* ICE_PTP_ADJ_TIME or ICE_PTP_ADJ_TIME_AT_TIME sync command.
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*/
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static int
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ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj)
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@ -1288,7 +1288,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj)
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*
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* Prepare each of the PHY ports for a new increment value by programming the
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* port's TIMETUS registers. The new increment value will be updated after
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* issuing an INIT_INCVAL command.
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* issuing an ICE_PTP_INIT_INCVAL command.
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*/
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static int
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ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval)
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@ -1374,19 +1374,19 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd
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tmr_idx = ice_get_ptp_src_clock_index(hw);
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cmd_val = tmr_idx << SEL_PHY_SRC;
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switch (cmd) {
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case INIT_TIME:
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case ICE_PTP_INIT_TIME:
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cmd_val |= PHY_CMD_INIT_TIME;
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break;
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case INIT_INCVAL:
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case ICE_PTP_INIT_INCVAL:
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cmd_val |= PHY_CMD_INIT_INCVAL;
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break;
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case ADJ_TIME:
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case ICE_PTP_ADJ_TIME:
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cmd_val |= PHY_CMD_ADJ_TIME;
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break;
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case READ_TIME:
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case ICE_PTP_READ_TIME:
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cmd_val |= PHY_CMD_READ_TIME;
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break;
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case ADJ_TIME_AT_TIME:
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case ICE_PTP_ADJ_TIME_AT_TIME:
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cmd_val |= PHY_CMD_ADJ_TIME_AT_TIME;
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break;
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case ICE_PTP_NOP:
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@ -2322,8 +2322,8 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port)
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* @phy_time: on return, the 64bit PHY timer value
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* @phc_time: on return, the lower 64bits of PHC time
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*
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* Issue a READ_TIME timer command to simultaneously capture the PHY and PHC
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* timer values.
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* Issue a ICE_PTP_READ_TIME timer command to simultaneously capture the PHY
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* and PHC timer values.
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*/
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static int
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ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
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@ -2336,15 +2336,15 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
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tmr_idx = ice_get_ptp_src_clock_index(hw);
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/* Prepare the PHC timer for a READ_TIME capture command */
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ice_ptp_src_cmd(hw, READ_TIME);
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/* Prepare the PHC timer for a ICE_PTP_READ_TIME capture command */
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ice_ptp_src_cmd(hw, ICE_PTP_READ_TIME);
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/* Prepare the PHY timer for a READ_TIME capture command */
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err = ice_ptp_one_port_cmd(hw, port, READ_TIME);
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/* Prepare the PHY timer for a ICE_PTP_READ_TIME capture command */
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err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_READ_TIME);
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if (err)
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return err;
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/* Issue the sync to start the READ_TIME capture */
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/* Issue the sync to start the ICE_PTP_READ_TIME capture */
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ice_ptp_exec_tmr_cmd(hw);
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/* Read the captured PHC time from the shadow time registers */
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@ -2378,10 +2378,11 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
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* @port: the PHY port to synchronize
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*
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* Perform an adjustment to ensure that the PHY and PHC timers are in sync.
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* This is done by issuing a READ_TIME command which triggers a simultaneous
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* read of the PHY timer and PHC timer. Then we use the difference to
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* calculate an appropriate 2s complement addition to add to the PHY timer in
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* order to ensure it reads the same value as the primary PHC timer.
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* This is done by issuing a ICE_PTP_READ_TIME command which triggers a
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* simultaneous read of the PHY timer and PHC timer. Then we use the
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* difference to calculate an appropriate 2s complement addition to add
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* to the PHY timer in order to ensure it reads the same value as the
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* primary PHC timer.
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*/
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static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
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{
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@ -2411,7 +2412,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
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if (err)
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goto err_unlock;
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err = ice_ptp_one_port_cmd(hw, port, ADJ_TIME);
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err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_ADJ_TIME);
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if (err)
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goto err_unlock;
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@ -2534,7 +2535,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port)
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if (err)
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return err;
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err = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL);
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err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_INIT_INCVAL);
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if (err)
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return err;
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@ -2562,7 +2563,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port)
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if (err)
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return err;
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err = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL);
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err = ice_ptp_one_port_cmd(hw, port, ICE_PTP_INIT_INCVAL);
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if (err)
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return err;
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@ -2883,7 +2884,7 @@ static int ice_ptp_init_phc_e810(struct ice_hw *hw)
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*
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* Program the PHY port ETH_GLTSYN_SHTIME registers in preparation setting the
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* initial clock time. The time will not actually be programmed until the
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* driver issues an INIT_TIME command.
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* driver issues an ICE_PTP_INIT_TIME command.
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*
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* The time value is the upper 32 bits of the PHY timer, usually in units of
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* nominal nanoseconds.
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@ -2918,7 +2919,7 @@ static int ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)
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*
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* Prepare the PHY port for an atomic adjustment by programming the PHY
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* ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual adjustment
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* is completed by issuing an ADJ_TIME sync command.
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* is completed by issuing an ICE_PTP_ADJ_TIME sync command.
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*
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* The adjustment value only contains the portion used for the upper 32bits of
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* the PHY timer, usually in units of nominal nanoseconds. Negative
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@ -2958,7 +2959,7 @@ static int ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj)
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*
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* Prepare the PHY port for a new increment value by programming the PHY
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* ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual change is
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* completed by issuing an INIT_INCVAL command.
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* completed by issuing an ICE_PTP_INIT_INCVAL command.
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*/
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static int ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval)
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{
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@ -3001,19 +3002,19 @@ static int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
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int err;
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switch (cmd) {
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case INIT_TIME:
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case ICE_PTP_INIT_TIME:
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cmd_val = GLTSYN_CMD_INIT_TIME;
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break;
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case INIT_INCVAL:
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case ICE_PTP_INIT_INCVAL:
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cmd_val = GLTSYN_CMD_INIT_INCVAL;
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break;
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case ADJ_TIME:
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case ICE_PTP_ADJ_TIME:
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cmd_val = GLTSYN_CMD_ADJ_TIME;
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break;
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case READ_TIME:
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case ICE_PTP_READ_TIME:
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cmd_val = GLTSYN_CMD_READ_TIME;
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break;
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case ADJ_TIME_AT_TIME:
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case ICE_PTP_ADJ_TIME_AT_TIME:
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cmd_val = GLTSYN_CMD_ADJ_INIT_TIME;
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break;
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case ICE_PTP_NOP:
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@ -3345,7 +3346,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
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if (err)
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return err;
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return ice_ptp_tmr_cmd(hw, INIT_TIME);
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return ice_ptp_tmr_cmd(hw, ICE_PTP_INIT_TIME);
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}
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/**
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@ -3358,8 +3359,8 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
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*
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* 1) Write the increment value to the source timer shadow registers
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* 2) Write the increment value to the PHY timer shadow registers
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* 3) Issue an INIT_INCVAL timer command to synchronously switch both the
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* source and port timers to the new increment value at the next clock
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* 3) Issue an ICE_PTP_INIT_INCVAL timer command to synchronously switch both
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* the source and port timers to the new increment value at the next clock
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* cycle.
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*/
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int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
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@ -3380,7 +3381,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
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if (err)
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return err;
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return ice_ptp_tmr_cmd(hw, INIT_INCVAL);
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return ice_ptp_tmr_cmd(hw, ICE_PTP_INIT_INCVAL);
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}
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/**
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@ -3414,8 +3415,8 @@ int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
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*
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* 1) Write the adjustment to the source timer shadow registers
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* 2) Write the adjustment to the PHY timer shadow registers
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* 3) Issue an ADJ_TIME timer command to synchronously apply the adjustment to
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* both the source and port timers at the next clock cycle.
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* 3) Issue an ICE_PTP_ADJ_TIME timer command to synchronously apply the
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* adjustment to both the source and port timers at the next clock cycle.
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*/
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int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
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{
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@ -3425,9 +3426,9 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
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tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
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/* Write the desired clock adjustment into the GLTSYN_SHADJ register.
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* For an ADJ_TIME command, this set of registers represents the value
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* to add to the clock time. It supports subtraction by interpreting
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* the value as a 2's complement integer.
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* For an ICE_PTP_ADJ_TIME command, this set of registers represents
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* the value to add to the clock time. It supports subtraction by
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* interpreting the value as a 2's complement integer.
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*/
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wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);
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wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);
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@ -3439,7 +3440,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
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if (err)
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return err;
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return ice_ptp_tmr_cmd(hw, ADJ_TIME);
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return ice_ptp_tmr_cmd(hw, ICE_PTP_ADJ_TIME);
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}
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/**
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@ -6,11 +6,11 @@
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#include <linux/dpll.h>
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enum ice_ptp_tmr_cmd {
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INIT_TIME,
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INIT_INCVAL,
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ADJ_TIME,
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ADJ_TIME_AT_TIME,
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READ_TIME,
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ICE_PTP_INIT_TIME,
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ICE_PTP_INIT_INCVAL,
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ICE_PTP_ADJ_TIME,
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ICE_PTP_ADJ_TIME_AT_TIME,
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ICE_PTP_READ_TIME,
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ICE_PTP_NOP,
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};
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