x86/insn: perf tools: Add new SHA instructions

Intel SHA Extensions are explained in the Intel Architecture
Instruction Set Extensions Programing Reference (Oct 2014).
There are 7 new instructions.  Add them to the op code map
and the perf tools new instructions test. e.g.

  $ tools/perf/perf test "x86 ins"
  39: Test x86 instruction decoder - new instructions          : Ok

Or to see the details:

  $ tools/perf/perf test -v "x86 ins" 2>&1 | grep sha

Committer note:

3 lines of details, for the curious:

  $ perf test -v "x86 ins" 2>&1 | grep sha256msg1 | tail -3
  Decoded ok: 0f 38 cc 84 08 78 56 34 12 	sha256msg1 0x12345678(%rax,%rcx,1),%xmm0
  Decoded ok: 0f 38 cc 84 c8 78 56 34 12 	sha256msg1 0x12345678(%rax,%rcx,8),%xmm0
  Decoded ok: 44 0f 38 cc bc c8 78 56 34 12 	sha256msg1 0x12345678(%rax,%rcx,8),%xmm15
  $

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1441196131-20632-5-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Adrian Hunter 2015-09-02 15:15:28 +03:00 committed by Arnaldo Carvalho de Melo
parent 78173ec631
commit 3fe78d6af9
5 changed files with 1045 additions and 0 deletions

View File

@ -736,6 +736,12 @@ bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
# 0x0f 0x38 0xc0-0xff
c8: sha1nexte Vdq,Wdq
c9: sha1msg1 Vdq,Wdq
ca: sha1msg2 Vdq,Wdq
cb: sha256rnds2 Vdq,Wdq
cc: sha256msg1 Vdq,Wdq
cd: sha256msg2 Vdq,Wdq
db: VAESIMC Vdq,Wdq (66),(v1)
dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
@ -794,6 +800,7 @@ AVXcode: 3
61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
cc: sha1rnds4 Vdq,Wdq,Ib
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
f0: RORX Gy,Ey,Ib (F2),(v)
EndTable

View File

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View File

@ -338,3 +338,367 @@
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View File

@ -217,6 +217,210 @@ int main(void)
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0 */
/* sha1rnds4 imm8, xmm2/m128, xmm1 */
asm volatile("sha1rnds4 $0x0, %xmm1, %xmm0");
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm2");
asm volatile("sha1rnds4 $0x91, %xmm8, %xmm0");
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm8");
asm volatile("sha1rnds4 $0x91, %xmm15, %xmm8");
asm volatile("sha1rnds4 $0x91, (%rax), %xmm0");
asm volatile("sha1rnds4 $0x91, (%r8), %xmm0");
asm volatile("sha1rnds4 $0x91, (0x12345678), %xmm0");
asm volatile("sha1rnds4 $0x91, (%rax), %xmm3");
asm volatile("sha1rnds4 $0x91, (%rcx,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, (%rax,%rcx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, (%rax,%rcx,8), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rax), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rbp), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rbp), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%rax,%rcx,8), %xmm15");
/* sha1nexte xmm2/m128, xmm1 */
asm volatile("sha1nexte %xmm1, %xmm0");
asm volatile("sha1nexte %xmm7, %xmm2");
asm volatile("sha1nexte %xmm8, %xmm0");
asm volatile("sha1nexte %xmm7, %xmm8");
asm volatile("sha1nexte %xmm15, %xmm8");
asm volatile("sha1nexte (%rax), %xmm0");
asm volatile("sha1nexte (%r8), %xmm0");
asm volatile("sha1nexte (0x12345678), %xmm0");
asm volatile("sha1nexte (%rax), %xmm3");
asm volatile("sha1nexte (%rcx,%rax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(,%rax,1), %xmm0");
asm volatile("sha1nexte (%rax,%rcx,1), %xmm0");
asm volatile("sha1nexte (%rax,%rcx,8), %xmm0");
asm volatile("sha1nexte 0x12(%rax), %xmm0");
asm volatile("sha1nexte 0x12(%rbp), %xmm0");
asm volatile("sha1nexte 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha1nexte 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha1nexte 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha1nexte 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha1nexte 0x12345678(%rax), %xmm0");
asm volatile("sha1nexte 0x12345678(%rbp), %xmm0");
asm volatile("sha1nexte 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha1nexte 0x12345678(%rax,%rcx,8), %xmm15");
/* sha1msg1 xmm2/m128, xmm1 */
asm volatile("sha1msg1 %xmm1, %xmm0");
asm volatile("sha1msg1 %xmm7, %xmm2");
asm volatile("sha1msg1 %xmm8, %xmm0");
asm volatile("sha1msg1 %xmm7, %xmm8");
asm volatile("sha1msg1 %xmm15, %xmm8");
asm volatile("sha1msg1 (%rax), %xmm0");
asm volatile("sha1msg1 (%r8), %xmm0");
asm volatile("sha1msg1 (0x12345678), %xmm0");
asm volatile("sha1msg1 (%rax), %xmm3");
asm volatile("sha1msg1 (%rcx,%rax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(,%rax,1), %xmm0");
asm volatile("sha1msg1 (%rax,%rcx,1), %xmm0");
asm volatile("sha1msg1 (%rax,%rcx,8), %xmm0");
asm volatile("sha1msg1 0x12(%rax), %xmm0");
asm volatile("sha1msg1 0x12(%rbp), %xmm0");
asm volatile("sha1msg1 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha1msg1 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha1msg1 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha1msg1 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha1msg1 0x12345678(%rax), %xmm0");
asm volatile("sha1msg1 0x12345678(%rbp), %xmm0");
asm volatile("sha1msg1 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha1msg1 0x12345678(%rax,%rcx,8), %xmm15");
/* sha1msg2 xmm2/m128, xmm1 */
asm volatile("sha1msg2 %xmm1, %xmm0");
asm volatile("sha1msg2 %xmm7, %xmm2");
asm volatile("sha1msg2 %xmm8, %xmm0");
asm volatile("sha1msg2 %xmm7, %xmm8");
asm volatile("sha1msg2 %xmm15, %xmm8");
asm volatile("sha1msg2 (%rax), %xmm0");
asm volatile("sha1msg2 (%r8), %xmm0");
asm volatile("sha1msg2 (0x12345678), %xmm0");
asm volatile("sha1msg2 (%rax), %xmm3");
asm volatile("sha1msg2 (%rcx,%rax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(,%rax,1), %xmm0");
asm volatile("sha1msg2 (%rax,%rcx,1), %xmm0");
asm volatile("sha1msg2 (%rax,%rcx,8), %xmm0");
asm volatile("sha1msg2 0x12(%rax), %xmm0");
asm volatile("sha1msg2 0x12(%rbp), %xmm0");
asm volatile("sha1msg2 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha1msg2 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha1msg2 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha1msg2 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha1msg2 0x12345678(%rax), %xmm0");
asm volatile("sha1msg2 0x12345678(%rbp), %xmm0");
asm volatile("sha1msg2 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha1msg2 0x12345678(%rax,%rcx,8), %xmm15");
/* sha256rnds2 <XMM0>, xmm2/m128, xmm1 */
/* Note sha256rnds2 has an implicit operand 'xmm0' */
asm volatile("sha256rnds2 %xmm4, %xmm1");
asm volatile("sha256rnds2 %xmm7, %xmm2");
asm volatile("sha256rnds2 %xmm8, %xmm1");
asm volatile("sha256rnds2 %xmm7, %xmm8");
asm volatile("sha256rnds2 %xmm15, %xmm8");
asm volatile("sha256rnds2 (%rax), %xmm1");
asm volatile("sha256rnds2 (%r8), %xmm1");
asm volatile("sha256rnds2 (0x12345678), %xmm1");
asm volatile("sha256rnds2 (%rax), %xmm3");
asm volatile("sha256rnds2 (%rcx,%rax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(,%rax,1), %xmm1");
asm volatile("sha256rnds2 (%rax,%rcx,1), %xmm1");
asm volatile("sha256rnds2 (%rax,%rcx,8), %xmm1");
asm volatile("sha256rnds2 0x12(%rax), %xmm1");
asm volatile("sha256rnds2 0x12(%rbp), %xmm1");
asm volatile("sha256rnds2 0x12(%rcx,%rax,1), %xmm1");
asm volatile("sha256rnds2 0x12(%rbp,%rax,1), %xmm1");
asm volatile("sha256rnds2 0x12(%rax,%rcx,1), %xmm1");
asm volatile("sha256rnds2 0x12(%rax,%rcx,8), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rax), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rbp), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rcx,%rax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rbp,%rax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,8), %xmm1");
asm volatile("sha256rnds2 0x12345678(%rax,%rcx,8), %xmm15");
/* sha256msg1 xmm2/m128, xmm1 */
asm volatile("sha256msg1 %xmm1, %xmm0");
asm volatile("sha256msg1 %xmm7, %xmm2");
asm volatile("sha256msg1 %xmm8, %xmm0");
asm volatile("sha256msg1 %xmm7, %xmm8");
asm volatile("sha256msg1 %xmm15, %xmm8");
asm volatile("sha256msg1 (%rax), %xmm0");
asm volatile("sha256msg1 (%r8), %xmm0");
asm volatile("sha256msg1 (0x12345678), %xmm0");
asm volatile("sha256msg1 (%rax), %xmm3");
asm volatile("sha256msg1 (%rcx,%rax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(,%rax,1), %xmm0");
asm volatile("sha256msg1 (%rax,%rcx,1), %xmm0");
asm volatile("sha256msg1 (%rax,%rcx,8), %xmm0");
asm volatile("sha256msg1 0x12(%rax), %xmm0");
asm volatile("sha256msg1 0x12(%rbp), %xmm0");
asm volatile("sha256msg1 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha256msg1 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha256msg1 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha256msg1 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha256msg1 0x12345678(%rax), %xmm0");
asm volatile("sha256msg1 0x12345678(%rbp), %xmm0");
asm volatile("sha256msg1 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha256msg1 0x12345678(%rax,%rcx,8), %xmm15");
/* sha256msg2 xmm2/m128, xmm1 */
asm volatile("sha256msg2 %xmm1, %xmm0");
asm volatile("sha256msg2 %xmm7, %xmm2");
asm volatile("sha256msg2 %xmm8, %xmm0");
asm volatile("sha256msg2 %xmm7, %xmm8");
asm volatile("sha256msg2 %xmm15, %xmm8");
asm volatile("sha256msg2 (%rax), %xmm0");
asm volatile("sha256msg2 (%r8), %xmm0");
asm volatile("sha256msg2 (0x12345678), %xmm0");
asm volatile("sha256msg2 (%rax), %xmm3");
asm volatile("sha256msg2 (%rcx,%rax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(,%rax,1), %xmm0");
asm volatile("sha256msg2 (%rax,%rcx,1), %xmm0");
asm volatile("sha256msg2 (%rax,%rcx,8), %xmm0");
asm volatile("sha256msg2 0x12(%rax), %xmm0");
asm volatile("sha256msg2 0x12(%rbp), %xmm0");
asm volatile("sha256msg2 0x12(%rcx,%rax,1), %xmm0");
asm volatile("sha256msg2 0x12(%rbp,%rax,1), %xmm0");
asm volatile("sha256msg2 0x12(%rax,%rcx,1), %xmm0");
asm volatile("sha256msg2 0x12(%rax,%rcx,8), %xmm0");
asm volatile("sha256msg2 0x12345678(%rax), %xmm0");
asm volatile("sha256msg2 0x12345678(%rbp), %xmm0");
asm volatile("sha256msg2 0x12345678(%rcx,%rax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%rbp,%rax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%rax,%rcx,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm0");
asm volatile("sha256msg2 0x12345678(%rax,%rcx,8), %xmm15");
#else /* #ifdef __x86_64__ */
/* bndmk m32, bnd */
@ -407,6 +611,175 @@ int main(void)
asm volatile("bnd jmp *(%ecx)"); /* Expecting: jmp indirect 0 */
asm volatile("bnd jne label1"); /* Expecting: jcc conditional 0xfffffffc */
/* sha1rnds4 imm8, xmm2/m128, xmm1 */
asm volatile("sha1rnds4 $0x0, %xmm1, %xmm0");
asm volatile("sha1rnds4 $0x91, %xmm7, %xmm2");
asm volatile("sha1rnds4 $0x91, (%eax), %xmm0");
asm volatile("sha1rnds4 $0x91, (0x12345678), %xmm0");
asm volatile("sha1rnds4 $0x91, (%eax), %xmm3");
asm volatile("sha1rnds4 $0x91, (%ecx,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, (%eax,%ecx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, (%eax,%ecx,8), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%eax), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%ebp), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%ebp), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha1rnds4 $0x91, 0x12345678(%eax,%ecx,8), %xmm0");
/* sha1nexte xmm2/m128, xmm1 */
asm volatile("sha1nexte %xmm1, %xmm0");
asm volatile("sha1nexte %xmm7, %xmm2");
asm volatile("sha1nexte (%eax), %xmm0");
asm volatile("sha1nexte (0x12345678), %xmm0");
asm volatile("sha1nexte (%eax), %xmm3");
asm volatile("sha1nexte (%ecx,%eax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(,%eax,1), %xmm0");
asm volatile("sha1nexte (%eax,%ecx,1), %xmm0");
asm volatile("sha1nexte (%eax,%ecx,8), %xmm0");
asm volatile("sha1nexte 0x12(%eax), %xmm0");
asm volatile("sha1nexte 0x12(%ebp), %xmm0");
asm volatile("sha1nexte 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha1nexte 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha1nexte 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha1nexte 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha1nexte 0x12345678(%eax), %xmm0");
asm volatile("sha1nexte 0x12345678(%ebp), %xmm0");
asm volatile("sha1nexte 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha1nexte 0x12345678(%eax,%ecx,8), %xmm0");
/* sha1msg1 xmm2/m128, xmm1 */
asm volatile("sha1msg1 %xmm1, %xmm0");
asm volatile("sha1msg1 %xmm7, %xmm2");
asm volatile("sha1msg1 (%eax), %xmm0");
asm volatile("sha1msg1 (0x12345678), %xmm0");
asm volatile("sha1msg1 (%eax), %xmm3");
asm volatile("sha1msg1 (%ecx,%eax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(,%eax,1), %xmm0");
asm volatile("sha1msg1 (%eax,%ecx,1), %xmm0");
asm volatile("sha1msg1 (%eax,%ecx,8), %xmm0");
asm volatile("sha1msg1 0x12(%eax), %xmm0");
asm volatile("sha1msg1 0x12(%ebp), %xmm0");
asm volatile("sha1msg1 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha1msg1 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha1msg1 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha1msg1 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha1msg1 0x12345678(%eax), %xmm0");
asm volatile("sha1msg1 0x12345678(%ebp), %xmm0");
asm volatile("sha1msg1 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha1msg1 0x12345678(%eax,%ecx,8), %xmm0");
/* sha1msg2 xmm2/m128, xmm1 */
asm volatile("sha1msg2 %xmm1, %xmm0");
asm volatile("sha1msg2 %xmm7, %xmm2");
asm volatile("sha1msg2 (%eax), %xmm0");
asm volatile("sha1msg2 (0x12345678), %xmm0");
asm volatile("sha1msg2 (%eax), %xmm3");
asm volatile("sha1msg2 (%ecx,%eax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(,%eax,1), %xmm0");
asm volatile("sha1msg2 (%eax,%ecx,1), %xmm0");
asm volatile("sha1msg2 (%eax,%ecx,8), %xmm0");
asm volatile("sha1msg2 0x12(%eax), %xmm0");
asm volatile("sha1msg2 0x12(%ebp), %xmm0");
asm volatile("sha1msg2 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha1msg2 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha1msg2 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha1msg2 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha1msg2 0x12345678(%eax), %xmm0");
asm volatile("sha1msg2 0x12345678(%ebp), %xmm0");
asm volatile("sha1msg2 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha1msg2 0x12345678(%eax,%ecx,8), %xmm0");
/* sha256rnds2 <XMM0>, xmm2/m128, xmm1 */
/* Note sha256rnds2 has an implicit operand 'xmm0' */
asm volatile("sha256rnds2 %xmm4, %xmm1");
asm volatile("sha256rnds2 %xmm7, %xmm2");
asm volatile("sha256rnds2 (%eax), %xmm1");
asm volatile("sha256rnds2 (0x12345678), %xmm1");
asm volatile("sha256rnds2 (%eax), %xmm3");
asm volatile("sha256rnds2 (%ecx,%eax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(,%eax,1), %xmm1");
asm volatile("sha256rnds2 (%eax,%ecx,1), %xmm1");
asm volatile("sha256rnds2 (%eax,%ecx,8), %xmm1");
asm volatile("sha256rnds2 0x12(%eax), %xmm1");
asm volatile("sha256rnds2 0x12(%ebp), %xmm1");
asm volatile("sha256rnds2 0x12(%ecx,%eax,1), %xmm1");
asm volatile("sha256rnds2 0x12(%ebp,%eax,1), %xmm1");
asm volatile("sha256rnds2 0x12(%eax,%ecx,1), %xmm1");
asm volatile("sha256rnds2 0x12(%eax,%ecx,8), %xmm1");
asm volatile("sha256rnds2 0x12345678(%eax), %xmm1");
asm volatile("sha256rnds2 0x12345678(%ebp), %xmm1");
asm volatile("sha256rnds2 0x12345678(%ecx,%eax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%ebp,%eax,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%eax,%ecx,1), %xmm1");
asm volatile("sha256rnds2 0x12345678(%eax,%ecx,8), %xmm1");
/* sha256msg1 xmm2/m128, xmm1 */
asm volatile("sha256msg1 %xmm1, %xmm0");
asm volatile("sha256msg1 %xmm7, %xmm2");
asm volatile("sha256msg1 (%eax), %xmm0");
asm volatile("sha256msg1 (0x12345678), %xmm0");
asm volatile("sha256msg1 (%eax), %xmm3");
asm volatile("sha256msg1 (%ecx,%eax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(,%eax,1), %xmm0");
asm volatile("sha256msg1 (%eax,%ecx,1), %xmm0");
asm volatile("sha256msg1 (%eax,%ecx,8), %xmm0");
asm volatile("sha256msg1 0x12(%eax), %xmm0");
asm volatile("sha256msg1 0x12(%ebp), %xmm0");
asm volatile("sha256msg1 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha256msg1 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha256msg1 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha256msg1 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha256msg1 0x12345678(%eax), %xmm0");
asm volatile("sha256msg1 0x12345678(%ebp), %xmm0");
asm volatile("sha256msg1 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha256msg1 0x12345678(%eax,%ecx,8), %xmm0");
/* sha256msg2 xmm2/m128, xmm1 */
asm volatile("sha256msg2 %xmm1, %xmm0");
asm volatile("sha256msg2 %xmm7, %xmm2");
asm volatile("sha256msg2 (%eax), %xmm0");
asm volatile("sha256msg2 (0x12345678), %xmm0");
asm volatile("sha256msg2 (%eax), %xmm3");
asm volatile("sha256msg2 (%ecx,%eax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(,%eax,1), %xmm0");
asm volatile("sha256msg2 (%eax,%ecx,1), %xmm0");
asm volatile("sha256msg2 (%eax,%ecx,8), %xmm0");
asm volatile("sha256msg2 0x12(%eax), %xmm0");
asm volatile("sha256msg2 0x12(%ebp), %xmm0");
asm volatile("sha256msg2 0x12(%ecx,%eax,1), %xmm0");
asm volatile("sha256msg2 0x12(%ebp,%eax,1), %xmm0");
asm volatile("sha256msg2 0x12(%eax,%ecx,1), %xmm0");
asm volatile("sha256msg2 0x12(%eax,%ecx,8), %xmm0");
asm volatile("sha256msg2 0x12345678(%eax), %xmm0");
asm volatile("sha256msg2 0x12345678(%ebp), %xmm0");
asm volatile("sha256msg2 0x12345678(%ecx,%eax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%ebp,%eax,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%eax,%ecx,1), %xmm0");
asm volatile("sha256msg2 0x12345678(%eax,%ecx,8), %xmm0");
#endif /* #ifndef __x86_64__ */
/* Following line is a marker for the awk script - do not change */

View File

@ -736,6 +736,12 @@ bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
# 0x0f 0x38 0xc0-0xff
c8: sha1nexte Vdq,Wdq
c9: sha1msg1 Vdq,Wdq
ca: sha1msg2 Vdq,Wdq
cb: sha256rnds2 Vdq,Wdq
cc: sha256msg1 Vdq,Wdq
cd: sha256msg2 Vdq,Wdq
db: VAESIMC Vdq,Wdq (66),(v1)
dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
@ -794,6 +800,7 @@ AVXcode: 3
61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
cc: sha1rnds4 Vdq,Wdq,Ib
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
f0: RORX Gy,Ey,Ib (F2),(v)
EndTable