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powerpc/64s/exception: Clean up SRR specifiers
Remove more magic numbers and replace with nicely named bools. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200225173541.1549955-19-npiggin@gmail.com
This commit is contained in:
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689e732262
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@ -105,11 +105,6 @@ name:
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ori reg,reg,(ABS_ADDR(label))@l; \
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ori reg,reg,(ABS_ADDR(label))@l; \
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addis reg,reg,(ABS_ADDR(label))@h
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addis reg,reg,(ABS_ADDR(label))@h
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/* Exception register prefixes */
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#define EXC_HV_OR_STD 2 /* depends on HVMODE */
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#define EXC_HV 1
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#define EXC_STD 0
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/*
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/*
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* Branch to label using its 0xC000 address. This results in instruction
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* Branch to label using its 0xC000 address. This results in instruction
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* address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
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* address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
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@ -128,6 +123,7 @@ name:
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*/
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*/
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#define IVEC .L_IVEC_\name\()
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#define IVEC .L_IVEC_\name\()
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#define IHSRR .L_IHSRR_\name\()
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#define IHSRR .L_IHSRR_\name\()
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#define IHSRR_IF_HVMODE .L_IHSRR_IF_HVMODE_\name\()
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#define IAREA .L_IAREA_\name\()
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#define IAREA .L_IAREA_\name\()
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#define IVIRT .L_IVIRT_\name\()
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#define IVIRT .L_IVIRT_\name\()
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#define IISIDE .L_IISIDE_\name\()
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#define IISIDE .L_IISIDE_\name\()
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@ -159,7 +155,10 @@ do_define_int n
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.error "IVEC not defined"
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.error "IVEC not defined"
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.endif
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.endif
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.ifndef IHSRR
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.ifndef IHSRR
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IHSRR=EXC_STD
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IHSRR=0
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.endif
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.ifndef IHSRR_IF_HVMODE
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IHSRR_IF_HVMODE=0
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.endif
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.endif
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.ifndef IAREA
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.ifndef IAREA
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IAREA=PACA_EXGEN
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IAREA=PACA_EXGEN
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@ -257,7 +256,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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ld r9,IAREA+EX_R9(r13)
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ld r9,IAREA+EX_R9(r13)
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ld r10,IAREA+EX_R10(r13)
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ld r10,IAREA+EX_R10(r13)
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/* HSRR variants have the 0x2 bit added to their trap number */
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/* HSRR variants have the 0x2 bit added to their trap number */
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.if IHSRR == EXC_HV_OR_STD
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.if IHSRR_IF_HVMODE
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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ori r12,r12,(IVEC + 0x2)
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ori r12,r12,(IVEC + 0x2)
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FTR_SECTION_ELSE
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FTR_SECTION_ELSE
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@ -278,7 +277,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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ld r10,IAREA+EX_R10(r13)
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ld r10,IAREA+EX_R10(r13)
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ld r11,IAREA+EX_R11(r13)
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ld r11,IAREA+EX_R11(r13)
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ld r12,IAREA+EX_R12(r13)
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ld r12,IAREA+EX_R12(r13)
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.if IHSRR == EXC_HV_OR_STD
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.if IHSRR_IF_HVMODE
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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b kvmppc_skip_Hinterrupt
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b kvmppc_skip_Hinterrupt
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FTR_SECTION_ELSE
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FTR_SECTION_ELSE
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@ -403,7 +402,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
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stw r10,IAREA+EX_DSISR(r13)
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stw r10,IAREA+EX_DSISR(r13)
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.endif
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.endif
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.if IHSRR == EXC_HV_OR_STD
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.if IHSRR_IF_HVMODE
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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mfspr r11,SPRN_HSRR0 /* save HSRR0 */
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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mfspr r12,SPRN_HSRR1 /* and HSRR1 */
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@ -499,7 +498,7 @@ DEFINE_FIXED_SYMBOL(\name\()_common_real)
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.abort "Bad maskable vector"
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.abort "Bad maskable vector"
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.endif
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.endif
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.if IHSRR == EXC_HV_OR_STD
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.if IHSRR_IF_HVMODE
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BEGIN_FTR_SECTION
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BEGIN_FTR_SECTION
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bne masked_Hinterrupt
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bne masked_Hinterrupt
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FTR_SECTION_ELSE
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FTR_SECTION_ELSE
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@ -632,12 +631,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
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* Restore all registers including H/SRR0/1 saved in a stack frame of a
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* Restore all registers including H/SRR0/1 saved in a stack frame of a
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* standard exception.
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* standard exception.
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*/
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*/
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.macro EXCEPTION_RESTORE_REGS hsrr
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.macro EXCEPTION_RESTORE_REGS hsrr=0
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/* Move original SRR0 and SRR1 into the respective regs */
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/* Move original SRR0 and SRR1 into the respective regs */
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ld r9,_MSR(r1)
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ld r9,_MSR(r1)
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.if \hsrr == EXC_HV_OR_STD
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.error "EXC_HV_OR_STD Not implemented for EXCEPTION_RESTORE_REGS"
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.endif
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.if \hsrr
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.if \hsrr
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mtspr SPRN_HSRR1,r9
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mtspr SPRN_HSRR1,r9
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.else
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.else
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@ -912,7 +908,7 @@ EXC_COMMON_BEGIN(system_reset_common)
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ld r10,SOFTE(r1)
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ld r10,SOFTE(r1)
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stb r10,PACAIRQSOFTMASK(r13)
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stb r10,PACAIRQSOFTMASK(r13)
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EXCEPTION_RESTORE_REGS EXC_STD
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EXCEPTION_RESTORE_REGS
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RFI_TO_USER_OR_KERNEL
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RFI_TO_USER_OR_KERNEL
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GEN_KVM system_reset
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GEN_KVM system_reset
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@ -966,7 +962,7 @@ TRAMP_REAL_BEGIN(machine_check_fwnmi)
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lhz r12,PACA_IN_MCE(r13); \
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lhz r12,PACA_IN_MCE(r13); \
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subi r12,r12,1; \
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subi r12,r12,1; \
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sth r12,PACA_IN_MCE(r13); \
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sth r12,PACA_IN_MCE(r13); \
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EXCEPTION_RESTORE_REGS EXC_STD
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EXCEPTION_RESTORE_REGS
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EXC_COMMON_BEGIN(machine_check_early_common)
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EXC_COMMON_BEGIN(machine_check_early_common)
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__GEN_REALMODE_COMMON_ENTRY machine_check_early
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__GEN_REALMODE_COMMON_ENTRY machine_check_early
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@ -1337,7 +1333,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
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INT_DEFINE_BEGIN(hardware_interrupt)
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INT_DEFINE_BEGIN(hardware_interrupt)
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IVEC=0x500
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IVEC=0x500
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IHSRR=EXC_HV_OR_STD
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IHSRR_IF_HVMODE=1
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IMASK=IRQS_DISABLED
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IMASK=IRQS_DISABLED
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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@ -1506,7 +1502,7 @@ EXC_COMMON_BEGIN(decrementer_common)
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INT_DEFINE_BEGIN(hdecrementer)
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INT_DEFINE_BEGIN(hdecrementer)
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IVEC=0x980
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IVEC=0x980
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IHSRR=EXC_HV
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IHSRR=1
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ISTACK=0
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ISTACK=0
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IRECONCILE=0
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IRECONCILE=0
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IKVM_REAL=1
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IKVM_REAL=1
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@ -1735,7 +1731,7 @@ EXC_COMMON_BEGIN(single_step_common)
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INT_DEFINE_BEGIN(h_data_storage)
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INT_DEFINE_BEGIN(h_data_storage)
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IVEC=0xe00
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IVEC=0xe00
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IHSRR=EXC_HV
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IHSRR=1
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IDAR=1
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IDAR=1
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IDSISR=1
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IDSISR=1
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IKVM_SKIP=1
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IKVM_SKIP=1
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@ -1767,7 +1763,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_TYPE_RADIX)
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INT_DEFINE_BEGIN(h_instr_storage)
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INT_DEFINE_BEGIN(h_instr_storage)
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IVEC=0xe20
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IVEC=0xe20
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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INT_DEFINE_END(h_instr_storage)
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INT_DEFINE_END(h_instr_storage)
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@ -1790,7 +1786,7 @@ EXC_COMMON_BEGIN(h_instr_storage_common)
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INT_DEFINE_BEGIN(emulation_assist)
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INT_DEFINE_BEGIN(emulation_assist)
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IVEC=0xe40
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IVEC=0xe40
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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INT_DEFINE_END(emulation_assist)
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INT_DEFINE_END(emulation_assist)
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@ -1818,7 +1814,7 @@ EXC_COMMON_BEGIN(emulation_assist_common)
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*/
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*/
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INT_DEFINE_BEGIN(hmi_exception_early)
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INT_DEFINE_BEGIN(hmi_exception_early)
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IVEC=0xe60
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IVEC=0xe60
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IHSRR=EXC_HV
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IHSRR=1
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IREALMODE_COMMON=1
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IREALMODE_COMMON=1
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ISTACK=0
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ISTACK=0
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IRECONCILE=0
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IRECONCILE=0
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@ -1828,7 +1824,7 @@ INT_DEFINE_END(hmi_exception_early)
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INT_DEFINE_BEGIN(hmi_exception)
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INT_DEFINE_BEGIN(hmi_exception)
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IVEC=0xe60
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IVEC=0xe60
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IHSRR=EXC_HV
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IHSRR=1
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IMASK=IRQS_DISABLED
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IMASK=IRQS_DISABLED
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IKVM_REAL=1
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IKVM_REAL=1
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INT_DEFINE_END(hmi_exception)
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INT_DEFINE_END(hmi_exception)
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@ -1852,7 +1848,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
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cmpdi cr0,r3,0
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cmpdi cr0,r3,0
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bne 1f
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bne 1f
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EXCEPTION_RESTORE_REGS EXC_HV
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EXCEPTION_RESTORE_REGS hsrr=1
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HRFI_TO_USER_OR_KERNEL
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HRFI_TO_USER_OR_KERNEL
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1:
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1:
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@ -1860,7 +1856,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
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* Go to virtual mode and pull the HMI event information from
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* Go to virtual mode and pull the HMI event information from
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* firmware.
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* firmware.
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*/
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*/
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EXCEPTION_RESTORE_REGS EXC_HV
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EXCEPTION_RESTORE_REGS hsrr=1
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GEN_INT_ENTRY hmi_exception, virt=0
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GEN_INT_ENTRY hmi_exception, virt=0
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GEN_KVM hmi_exception_early
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GEN_KVM hmi_exception_early
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@ -1879,7 +1875,7 @@ EXC_COMMON_BEGIN(hmi_exception_common)
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INT_DEFINE_BEGIN(h_doorbell)
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INT_DEFINE_BEGIN(h_doorbell)
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IVEC=0xe80
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IVEC=0xe80
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IHSRR=EXC_HV
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IHSRR=1
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IMASK=IRQS_DISABLED
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IMASK=IRQS_DISABLED
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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@ -1908,7 +1904,7 @@ EXC_COMMON_BEGIN(h_doorbell_common)
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INT_DEFINE_BEGIN(h_virt_irq)
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INT_DEFINE_BEGIN(h_virt_irq)
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IVEC=0xea0
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IVEC=0xea0
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IHSRR=EXC_HV
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IHSRR=1
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IMASK=IRQS_DISABLED
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IMASK=IRQS_DISABLED
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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@ -2078,7 +2074,7 @@ EXC_COMMON_BEGIN(facility_unavailable_common)
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INT_DEFINE_BEGIN(h_facility_unavailable)
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INT_DEFINE_BEGIN(h_facility_unavailable)
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IVEC=0xf80
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IVEC=0xf80
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_REAL=1
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IKVM_REAL=1
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IKVM_VIRT=1
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IKVM_VIRT=1
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INT_DEFINE_END(h_facility_unavailable)
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INT_DEFINE_END(h_facility_unavailable)
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@ -2114,7 +2110,7 @@ EXC_VIRT_NONE(0x5100, 0x100)
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#ifdef CONFIG_CBE_RAS
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#ifdef CONFIG_CBE_RAS
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INT_DEFINE_BEGIN(cbe_system_error)
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INT_DEFINE_BEGIN(cbe_system_error)
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IVEC=0x1200
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IVEC=0x1200
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_SKIP=1
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IKVM_SKIP=1
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IKVM_REAL=1
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IKVM_REAL=1
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INT_DEFINE_END(cbe_system_error)
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INT_DEFINE_END(cbe_system_error)
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@ -2165,8 +2161,8 @@ EXC_VIRT_NONE(0x5400, 0x100)
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INT_DEFINE_BEGIN(denorm_exception)
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INT_DEFINE_BEGIN(denorm_exception)
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IVEC=0x1500
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IVEC=0x1500
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IHSRR=EXC_HV
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IHSRR=1
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IBRANCH_TO_COMMON=0
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IBRANCH_COMMON=0
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IKVM_REAL=1
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IKVM_REAL=1
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INT_DEFINE_END(denorm_exception)
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INT_DEFINE_END(denorm_exception)
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@ -2274,7 +2270,7 @@ EXC_COMMON_BEGIN(denorm_exception_common)
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#ifdef CONFIG_CBE_RAS
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#ifdef CONFIG_CBE_RAS
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INT_DEFINE_BEGIN(cbe_maintenance)
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INT_DEFINE_BEGIN(cbe_maintenance)
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IVEC=0x1600
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IVEC=0x1600
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_SKIP=1
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IKVM_SKIP=1
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IKVM_REAL=1
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IKVM_REAL=1
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INT_DEFINE_END(cbe_maintenance)
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INT_DEFINE_END(cbe_maintenance)
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@ -2326,7 +2322,7 @@ EXC_COMMON_BEGIN(altivec_assist_common)
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#ifdef CONFIG_CBE_RAS
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#ifdef CONFIG_CBE_RAS
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INT_DEFINE_BEGIN(cbe_thermal)
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INT_DEFINE_BEGIN(cbe_thermal)
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IVEC=0x1800
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IVEC=0x1800
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IHSRR=EXC_HV
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IHSRR=1
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IKVM_SKIP=1
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IKVM_SKIP=1
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IKVM_REAL=1
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IKVM_REAL=1
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INT_DEFINE_END(cbe_thermal)
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INT_DEFINE_END(cbe_thermal)
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@ -2389,7 +2385,7 @@ EXC_COMMON_BEGIN(soft_nmi_common)
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* - Else it is one of PACA_IRQ_MUST_HARD_MASK, so hard disable and return.
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* - Else it is one of PACA_IRQ_MUST_HARD_MASK, so hard disable and return.
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* This is called with r10 containing the value to OR to the paca field.
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* This is called with r10 containing the value to OR to the paca field.
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*/
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*/
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.macro MASKED_INTERRUPT hsrr
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.macro MASKED_INTERRUPT hsrr=0
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.if \hsrr
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.if \hsrr
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masked_Hinterrupt:
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masked_Hinterrupt:
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.else
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.else
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@ -2536,8 +2532,8 @@ TRAMP_REAL_BEGIN(hrfi_flush_fallback)
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hrfid
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hrfid
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USE_TEXT_SECTION()
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USE_TEXT_SECTION()
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MASKED_INTERRUPT EXC_STD
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MASKED_INTERRUPT
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MASKED_INTERRUPT EXC_HV
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MASKED_INTERRUPT hsrr=1
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
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kvmppc_skip_interrupt:
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kvmppc_skip_interrupt:
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