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s390/bpf: Implement BPF_MOV | BPF_X with sign-extension
Implement the cpuv4 register-to-register move with sign extension. It is distinguished from the normal moves by non-zero values in insn->off, which determine the source size. s390x has instructions to deal with all of them: lbr, lhr, lgbr, lghr and lgfr. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Link: https://lore.kernel.org/r/20230919101336.2223655-5-iii@linux.ibm.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -795,15 +795,47 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp,
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/*
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* BPF_MOV
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*/
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case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
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/* llgfr %dst,%src */
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EMIT4(0xb9160000, dst_reg, src_reg);
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if (insn_is_zext(&insn[1]))
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insn_count = 2;
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case BPF_ALU | BPF_MOV | BPF_X:
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switch (insn->off) {
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case 0: /* DST = (u32) SRC */
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/* llgfr %dst,%src */
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EMIT4(0xb9160000, dst_reg, src_reg);
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if (insn_is_zext(&insn[1]))
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insn_count = 2;
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break;
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case 8: /* DST = (u32)(s8) SRC */
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/* lbr %dst,%src */
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EMIT4(0xb9260000, dst_reg, src_reg);
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/* llgfr %dst,%dst */
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EMIT4(0xb9160000, dst_reg, dst_reg);
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break;
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case 16: /* DST = (u32)(s16) SRC */
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/* lhr %dst,%src */
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EMIT4(0xb9270000, dst_reg, src_reg);
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/* llgfr %dst,%dst */
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EMIT4(0xb9160000, dst_reg, dst_reg);
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break;
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}
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break;
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case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
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/* lgr %dst,%src */
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EMIT4(0xb9040000, dst_reg, src_reg);
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case BPF_ALU64 | BPF_MOV | BPF_X:
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switch (insn->off) {
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case 0: /* DST = SRC */
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/* lgr %dst,%src */
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EMIT4(0xb9040000, dst_reg, src_reg);
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break;
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case 8: /* DST = (s8) SRC */
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/* lgbr %dst,%src */
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EMIT4(0xb9060000, dst_reg, src_reg);
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break;
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case 16: /* DST = (s16) SRC */
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/* lghr %dst,%src */
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EMIT4(0xb9070000, dst_reg, src_reg);
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break;
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case 32: /* DST = (s32) SRC */
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/* lgfr %dst,%src */
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EMIT4(0xb9140000, dst_reg, src_reg);
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break;
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}
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break;
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case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
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/* llilf %dst,imm */
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