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KVM: arm64: Abstract the size of the HYP vectors pre-amble
The EL2 vector hardening feature causes KVM to generate vectors for each type of CPU present in the system. The generated sequences already do some of the early guest-exit work (i.e. saving registers). To avoid duplication the generated vectors branch to the original vector just after the preamble. This size is hard coded. Adding new instructions to the HYP vector causes strange side effects, which are difficult to debug as the affected code is patched in at runtime. Add KVM_VECTOR_PREAMBLE to tell kvm_patch_vector_branch() how big the preamble is. The valid_vect macro can then validate this at build time. Reviewed-by: Julien Thierry <julien.thierry@arm.com> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -30,6 +30,12 @@
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{ARM_EXCEPTION_TRAP, "TRAP" }, \
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{ARM_EXCEPTION_HYP_GONE, "HYP_GONE" }
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/*
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* Size of the HYP vectors preamble. kvm_patch_vector_branch() generates code
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* that jumps over this.
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*/
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#define KVM_VECTOR_PREAMBLE (1 * AARCH64_INSN_SIZE)
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#ifndef __ASSEMBLY__
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#include <linux/mm.h>
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@ -216,17 +216,32 @@ ENDPROC(\label)
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.align 11
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.macro check_preamble_length start, end
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/* kvm_patch_vector_branch() generates code that jumps over the preamble. */
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.if ((\end-\start) != KVM_VECTOR_PREAMBLE)
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.error "KVM vector preamble length mismatch"
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.endif
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.endm
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.macro valid_vect target
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.align 7
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661:
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stp x0, x1, [sp, #-16]!
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662:
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b \target
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check_preamble_length 661b, 662b
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.endm
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.macro invalid_vect target
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.align 7
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661:
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b \target
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662:
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ldp x0, x1, [sp], #16
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b \target
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check_preamble_length 661b, 662b
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.endm
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ENTRY(__kvm_hyp_vector)
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@ -271,7 +286,8 @@ ENDPROC(__kvm_hyp_vector)
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* movk x0, #((addr >> 32) & 0xffff), lsl #32
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* br x0
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*
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* Where addr = kern_hyp_va(__kvm_hyp_vector) + vector-offset + 4.
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* Where:
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* addr = kern_hyp_va(__kvm_hyp_vector) + vector-offset + KVM_VECTOR_PREAMBLE.
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* See kvm_patch_vector_branch for details.
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*/
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alternative_cb kvm_patch_vector_branch
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@ -170,11 +170,10 @@ void kvm_patch_vector_branch(struct alt_instr *alt,
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addr |= ((u64)origptr & GENMASK_ULL(10, 7));
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/*
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* Branch to the second instruction in the vectors in order to
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* avoid the initial store on the stack (which we already
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* perform in the hardening vectors).
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* Branch over the preamble in order to avoid the initial store on
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* the stack (which we already perform in the hardening vectors).
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*/
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addr += AARCH64_INSN_SIZE;
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addr += KVM_VECTOR_PREAMBLE;
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/* stp x0, x1, [sp, #-16]! */
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insn = aarch64_insn_gen_load_store_pair(AARCH64_INSN_REG_0,
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