IB/mlx5: Move mlx5_port_caps from mlx5_core_dev to mlx5_ib_dev

mlx5_port_caps are RDMA specific capabilities. These are not used by the
mlx5_core_device at all. Move them to mlx5_ib_dev where it is used and
reduce the scope of it to multiple drivers.

Link: https://lore.kernel.org/r/20210203130133.4057329-2-leon@kernel.org
Signed-off-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Parav Pandit 2021-02-03 15:01:29 +02:00 committed by Jason Gunthorpe
parent b53005d66b
commit 3ce60f443b
6 changed files with 22 additions and 24 deletions

View File

@ -48,7 +48,7 @@ static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED && if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
return true; return true;
return dev->mdev->port_caps[port_num - 1].has_smi; return dev->port_caps[port_num - 1].has_smi;
} }
static int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, static int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey,
@ -299,7 +299,7 @@ int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
packet_error = be16_to_cpu(out_mad->status); packet_error = be16_to_cpu(out_mad->status);
dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ? dev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0; MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
out: out:
@ -549,7 +549,7 @@ int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
props->gid_tbl_len = out_mad->data[50]; props->gid_tbl_len = out_mad->data[50];
props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len; props->pkey_tbl_len = dev->port_caps[port - 1].pkey_table_len;
props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
props->active_width = out_mad->data[31] & 0xf; props->active_width = out_mad->data[31] & 0xf;
@ -589,7 +589,7 @@ int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
/* If reported active speed is QDR, check if is FDR-10 */ /* If reported active speed is QDR, check if is FDR-10 */
if (props->active_speed == 4) { if (props->active_speed == 4) {
if (mdev->port_caps[port - 1].ext_port_cap & if (dev->port_caps[port - 1].ext_port_cap &
MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
init_query_mad(in_mad); init_query_mad(in_mad);
in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;

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@ -2946,8 +2946,8 @@ static int set_has_smi_cap(struct mlx5_ib_dev *dev)
int err; int err;
int port; int port;
for (port = 1; port <= ARRAY_SIZE(dev->mdev->port_caps); port++) { for (port = 1; port <= ARRAY_SIZE(dev->port_caps); port++) {
dev->mdev->port_caps[port - 1].has_smi = false; dev->port_caps[port - 1].has_smi = false;
if (MLX5_CAP_GEN(dev->mdev, port_type) == if (MLX5_CAP_GEN(dev->mdev, port_type) ==
MLX5_CAP_PORT_TYPE_IB) { MLX5_CAP_PORT_TYPE_IB) {
if (MLX5_CAP_GEN(dev->mdev, ib_virt)) { if (MLX5_CAP_GEN(dev->mdev, ib_virt)) {
@ -2959,10 +2959,10 @@ static int set_has_smi_cap(struct mlx5_ib_dev *dev)
port, err); port, err);
return err; return err;
} }
dev->mdev->port_caps[port - 1].has_smi = dev->port_caps[port - 1].has_smi =
vport_ctx.has_smi; vport_ctx.has_smi;
} else { } else {
dev->mdev->port_caps[port - 1].has_smi = true; dev->port_caps[port - 1].has_smi = true;
} }
} }
} }
@ -3004,10 +3004,8 @@ static int __get_port_caps(struct mlx5_ib_dev *dev, u8 port)
goto out; goto out;
} }
dev->mdev->port_caps[port - 1].pkey_table_len = dev->port_caps[port - 1].pkey_table_len = dprops->max_pkeys;
dprops->max_pkeys; dev->port_caps[port - 1].gid_table_len = pprops->gid_tbl_len;
dev->mdev->port_caps[port - 1].gid_table_len =
pprops->gid_tbl_len;
mlx5_ib_dbg(dev, "port %d: pkey_table_len %d, gid_table_len %d\n", mlx5_ib_dbg(dev, "port %d: pkey_table_len %d, gid_table_len %d\n",
port, dprops->max_pkeys, pprops->gid_tbl_len); port, dprops->max_pkeys, pprops->gid_tbl_len);

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@ -1036,6 +1036,13 @@ struct mlx5_var_table {
u64 num_var_hw_entries; u64 num_var_hw_entries;
}; };
struct mlx5_port_caps {
int gid_table_len;
int pkey_table_len;
bool has_smi;
u8 ext_port_cap;
};
struct mlx5_ib_dev { struct mlx5_ib_dev {
struct ib_device ib_dev; struct ib_device ib_dev;
struct mlx5_core_dev *mdev; struct mlx5_core_dev *mdev;
@ -1096,6 +1103,7 @@ struct mlx5_ib_dev {
struct mlx5_var_table var_table; struct mlx5_var_table var_table;
struct xarray sig_mrs; struct xarray sig_mrs;
struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
}; };
static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq) static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq)

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@ -3177,10 +3177,10 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
if (ah_flags & IB_AH_GRH) { if (ah_flags & IB_AH_GRH) {
if (grh->sgid_index >= if (grh->sgid_index >=
dev->mdev->port_caps[port - 1].gid_table_len) { dev->port_caps[port - 1].gid_table_len) {
pr_err("sgid_index (%u) too large. max is %d\n", pr_err("sgid_index (%u) too large. max is %d\n",
grh->sgid_index, grh->sgid_index,
dev->mdev->port_caps[port - 1].gid_table_len); dev->port_caps[port - 1].gid_table_len);
return -EINVAL; return -EINVAL;
} }
} }
@ -4311,7 +4311,7 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
if (attr_mask & IB_QP_PKEY_INDEX) { if (attr_mask & IB_QP_PKEY_INDEX) {
port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
if (attr->pkey_index >= if (attr->pkey_index >=
dev->mdev->port_caps[port - 1].pkey_table_len) { dev->port_caps[port - 1].pkey_table_len) {
mlx5_ib_dbg(dev, "invalid pkey index %d\n", mlx5_ib_dbg(dev, "invalid pkey index %d\n",
attr->pkey_index); attr->pkey_index);
goto out; goto out;

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@ -1369,7 +1369,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
handle_qpt_uc(wr, &seg, &size); handle_qpt_uc(wr, &seg, &size);
break; break;
case IB_QPT_SMI: case IB_QPT_SMI:
if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { if (unlikely(!dev->port_caps[qp->port - 1].has_smi)) {
mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
err = -EPERM; err = -EPERM;
*bad_wr = wr; *bad_wr = wr;

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@ -305,13 +305,6 @@ struct mlx5_cmd {
struct mlx5_cmd_stats *stats; struct mlx5_cmd_stats *stats;
}; };
struct mlx5_port_caps {
int gid_table_len;
int pkey_table_len;
u8 ext_port_cap;
bool has_smi;
};
struct mlx5_cmd_mailbox { struct mlx5_cmd_mailbox {
void *buf; void *buf;
dma_addr_t dma; dma_addr_t dma;
@ -694,7 +687,6 @@ struct mlx5_core_dev {
u8 rev_id; u8 rev_id;
char board_id[MLX5_BOARD_ID_LEN]; char board_id[MLX5_BOARD_ID_LEN];
struct mlx5_cmd cmd; struct mlx5_cmd cmd;
struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
struct { struct {
u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)]; u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];