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IB/mlx5: Move mlx5_port_caps from mlx5_core_dev to mlx5_ib_dev
mlx5_port_caps are RDMA specific capabilities. These are not used by the mlx5_core_device at all. Move them to mlx5_ib_dev where it is used and reduce the scope of it to multiple drivers. Link: https://lore.kernel.org/r/20210203130133.4057329-2-leon@kernel.org Signed-off-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -48,7 +48,7 @@ static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
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if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
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if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
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in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
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in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
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return true;
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return true;
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return dev->mdev->port_caps[port_num - 1].has_smi;
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return dev->port_caps[port_num - 1].has_smi;
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}
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}
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static int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey,
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static int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey,
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@ -299,7 +299,7 @@ int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
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packet_error = be16_to_cpu(out_mad->status);
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packet_error = be16_to_cpu(out_mad->status);
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dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
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dev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
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MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
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MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
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out:
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out:
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@ -549,7 +549,7 @@ int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
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props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
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props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
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props->gid_tbl_len = out_mad->data[50];
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props->gid_tbl_len = out_mad->data[50];
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props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
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props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
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props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
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props->pkey_tbl_len = dev->port_caps[port - 1].pkey_table_len;
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props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
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props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
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props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
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props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
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props->active_width = out_mad->data[31] & 0xf;
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props->active_width = out_mad->data[31] & 0xf;
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@ -589,7 +589,7 @@ int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
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/* If reported active speed is QDR, check if is FDR-10 */
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/* If reported active speed is QDR, check if is FDR-10 */
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if (props->active_speed == 4) {
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if (props->active_speed == 4) {
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if (mdev->port_caps[port - 1].ext_port_cap &
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if (dev->port_caps[port - 1].ext_port_cap &
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MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
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MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
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init_query_mad(in_mad);
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init_query_mad(in_mad);
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in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
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in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
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@ -2946,8 +2946,8 @@ static int set_has_smi_cap(struct mlx5_ib_dev *dev)
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int err;
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int err;
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int port;
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int port;
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for (port = 1; port <= ARRAY_SIZE(dev->mdev->port_caps); port++) {
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for (port = 1; port <= ARRAY_SIZE(dev->port_caps); port++) {
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dev->mdev->port_caps[port - 1].has_smi = false;
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dev->port_caps[port - 1].has_smi = false;
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if (MLX5_CAP_GEN(dev->mdev, port_type) ==
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if (MLX5_CAP_GEN(dev->mdev, port_type) ==
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MLX5_CAP_PORT_TYPE_IB) {
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MLX5_CAP_PORT_TYPE_IB) {
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if (MLX5_CAP_GEN(dev->mdev, ib_virt)) {
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if (MLX5_CAP_GEN(dev->mdev, ib_virt)) {
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@ -2959,10 +2959,10 @@ static int set_has_smi_cap(struct mlx5_ib_dev *dev)
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port, err);
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port, err);
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return err;
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return err;
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}
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}
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dev->mdev->port_caps[port - 1].has_smi =
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dev->port_caps[port - 1].has_smi =
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vport_ctx.has_smi;
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vport_ctx.has_smi;
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} else {
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} else {
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dev->mdev->port_caps[port - 1].has_smi = true;
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dev->port_caps[port - 1].has_smi = true;
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}
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}
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}
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}
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}
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}
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@ -3004,10 +3004,8 @@ static int __get_port_caps(struct mlx5_ib_dev *dev, u8 port)
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goto out;
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goto out;
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}
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}
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dev->mdev->port_caps[port - 1].pkey_table_len =
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dev->port_caps[port - 1].pkey_table_len = dprops->max_pkeys;
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dprops->max_pkeys;
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dev->port_caps[port - 1].gid_table_len = pprops->gid_tbl_len;
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dev->mdev->port_caps[port - 1].gid_table_len =
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pprops->gid_tbl_len;
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mlx5_ib_dbg(dev, "port %d: pkey_table_len %d, gid_table_len %d\n",
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mlx5_ib_dbg(dev, "port %d: pkey_table_len %d, gid_table_len %d\n",
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port, dprops->max_pkeys, pprops->gid_tbl_len);
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port, dprops->max_pkeys, pprops->gid_tbl_len);
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@ -1036,6 +1036,13 @@ struct mlx5_var_table {
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u64 num_var_hw_entries;
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u64 num_var_hw_entries;
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};
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};
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struct mlx5_port_caps {
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int gid_table_len;
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int pkey_table_len;
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bool has_smi;
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u8 ext_port_cap;
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};
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struct mlx5_ib_dev {
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struct mlx5_ib_dev {
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struct ib_device ib_dev;
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struct ib_device ib_dev;
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struct mlx5_core_dev *mdev;
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struct mlx5_core_dev *mdev;
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@ -1096,6 +1103,7 @@ struct mlx5_ib_dev {
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struct mlx5_var_table var_table;
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struct mlx5_var_table var_table;
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struct xarray sig_mrs;
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struct xarray sig_mrs;
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struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
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};
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};
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static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq)
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static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq)
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@ -3177,10 +3177,10 @@ static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
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if (ah_flags & IB_AH_GRH) {
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if (ah_flags & IB_AH_GRH) {
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if (grh->sgid_index >=
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if (grh->sgid_index >=
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dev->mdev->port_caps[port - 1].gid_table_len) {
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dev->port_caps[port - 1].gid_table_len) {
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pr_err("sgid_index (%u) too large. max is %d\n",
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pr_err("sgid_index (%u) too large. max is %d\n",
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grh->sgid_index,
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grh->sgid_index,
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dev->mdev->port_caps[port - 1].gid_table_len);
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dev->port_caps[port - 1].gid_table_len);
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return -EINVAL;
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return -EINVAL;
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}
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}
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}
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}
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@ -4311,7 +4311,7 @@ int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
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if (attr_mask & IB_QP_PKEY_INDEX) {
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if (attr_mask & IB_QP_PKEY_INDEX) {
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port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
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port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
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if (attr->pkey_index >=
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if (attr->pkey_index >=
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dev->mdev->port_caps[port - 1].pkey_table_len) {
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dev->port_caps[port - 1].pkey_table_len) {
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mlx5_ib_dbg(dev, "invalid pkey index %d\n",
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mlx5_ib_dbg(dev, "invalid pkey index %d\n",
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attr->pkey_index);
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attr->pkey_index);
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goto out;
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goto out;
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@ -1369,7 +1369,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
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handle_qpt_uc(wr, &seg, &size);
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handle_qpt_uc(wr, &seg, &size);
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break;
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break;
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case IB_QPT_SMI:
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case IB_QPT_SMI:
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if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) {
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if (unlikely(!dev->port_caps[qp->port - 1].has_smi)) {
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mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
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mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
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err = -EPERM;
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err = -EPERM;
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*bad_wr = wr;
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*bad_wr = wr;
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@ -305,13 +305,6 @@ struct mlx5_cmd {
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struct mlx5_cmd_stats *stats;
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struct mlx5_cmd_stats *stats;
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};
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};
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struct mlx5_port_caps {
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int gid_table_len;
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int pkey_table_len;
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u8 ext_port_cap;
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bool has_smi;
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};
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struct mlx5_cmd_mailbox {
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struct mlx5_cmd_mailbox {
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void *buf;
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void *buf;
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dma_addr_t dma;
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dma_addr_t dma;
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@ -694,7 +687,6 @@ struct mlx5_core_dev {
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u8 rev_id;
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u8 rev_id;
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char board_id[MLX5_BOARD_ID_LEN];
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char board_id[MLX5_BOARD_ID_LEN];
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struct mlx5_cmd cmd;
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struct mlx5_cmd cmd;
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struct mlx5_port_caps port_caps[MLX5_MAX_PORTS];
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struct {
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struct {
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u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
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u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
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u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
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u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
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