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clk: qcom: camcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211228045415.20543-5-dmitry.baryshkov@linaro.org
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ba9b57dcac
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3ca9017121
@ -303,7 +303,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_bps_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -324,7 +324,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_cci_0_clk_src",
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.parent_data = cam_cc_parent_data_5,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -338,7 +338,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_cci_1_clk_src",
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.parent_data = cam_cc_parent_data_5,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -359,7 +359,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_cphy_rx_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -378,7 +378,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_csi0phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -392,7 +392,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_csi1phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -406,7 +406,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_csi2phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -420,7 +420,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_csi3phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -442,7 +442,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_fast_ahb_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -465,7 +465,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_icp_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -487,7 +487,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_0_clk_src",
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -509,7 +509,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_0_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -523,7 +523,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_1_clk_src",
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -537,7 +537,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_1_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -551,7 +551,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_lite_clk_src",
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_shared_ops,
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},
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@ -566,7 +566,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ife_lite_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -589,7 +589,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_ipe_0_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -612,7 +612,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_jpeg_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -634,7 +634,7 @@ static struct clk_rcg2 cam_cc_lrme_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_lrme_clk_src",
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.parent_data = cam_cc_parent_data_6,
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.num_parents = 5,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_6),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -655,7 +655,7 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_mclk0_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -669,7 +669,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_mclk1_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -683,7 +683,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_mclk2_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -697,7 +697,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_mclk3_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -711,7 +711,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_mclk4_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -730,7 +730,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = {
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.clkr.hw.init = &(struct clk_init_data){
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.name = "cam_cc_slow_ahb_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
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.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
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.ops = &clk_rcg2_shared_ops,
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},
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