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Merge branch 'for-6.11/trivial' into for-linus
Couple of trivial fixes: - extra semicolon (Chen Ni) - typo (Thorsten Blum)
This commit is contained in:
Benjamin Tissoires
commit
3c69140734
11
.mailmap
11
.mailmap
@ -337,10 +337,11 @@ Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org>
|
||||
Karthikeyan Periyasamy <quic_periyasa@quicinc.com> <periyasa@codeaurora.org>
|
||||
Kathiravan T <quic_kathirav@quicinc.com> <kathirav@codeaurora.org>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
|
||||
Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
|
||||
Kees Cook <keescook@chromium.org> <keescook@google.com>
|
||||
Kees Cook <keescook@chromium.org> <kees@outflux.net>
|
||||
Kees Cook <keescook@chromium.org> <kees@ubuntu.com>
|
||||
Kees Cook <kees@kernel.org> <kees.cook@canonical.com>
|
||||
Kees Cook <kees@kernel.org> <keescook@chromium.org>
|
||||
Kees Cook <kees@kernel.org> <keescook@google.com>
|
||||
Kees Cook <kees@kernel.org> <kees@outflux.net>
|
||||
Kees Cook <kees@kernel.org> <kees@ubuntu.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@intel.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
@ -572,7 +573,7 @@ Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>
|
||||
Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
|
||||
Satya Priya <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
|
||||
Satya Priya <quic_skakitap@quicinc.com> <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
|
||||
Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
|
||||
|
||||
@ -29,3 +29,16 @@ Description: Initiates a SoC reset on the MHI controller. A SoC reset is
|
||||
This can be useful as a method of recovery if the device is
|
||||
non-responsive, or as a means of loading new firmware as a
|
||||
system administration task.
|
||||
|
||||
What: /sys/bus/mhi/devices/.../trigger_edl
|
||||
Date: April 2024
|
||||
KernelVersion: 6.10
|
||||
Contact: mhi@lists.linux.dev
|
||||
Description: Writing a non-zero value to this file will force devices to
|
||||
enter EDL (Emergency Download) mode. This entry only exists for
|
||||
devices capable of entering the EDL mode using the standard EDL
|
||||
triggering mechanism defined in the MHI spec v1.2. Once in EDL
|
||||
mode, the flash programmer image can be downloaded to the
|
||||
device to enter the flash programmer execution environment.
|
||||
This can be useful if user wants to use QDL (Qualcomm Download,
|
||||
which is used to download firmware over EDL) to update firmware.
|
||||
|
||||
@ -22,7 +22,7 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (RW) Used in conjunction with @addr_idx. Specifies
|
||||
characteristics about the address comparator being configure,
|
||||
for example the access type, the kind of instruction to trace,
|
||||
processor contect ID to trigger on, etc. Individual fields in
|
||||
processor context ID to trigger on, etc. Individual fields in
|
||||
the access type register may vary on the version of the trace
|
||||
entity.
|
||||
|
||||
|
||||
@ -97,7 +97,7 @@ Date: August 2023
|
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KernelVersion: 6.7
|
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Contact: Anshuman Khandual <anshuman.khandual@arm.com>
|
||||
Description: (Read) Shows all supported Coresight TMC-ETR buffer modes available
|
||||
for the users to configure explicitly. This file is avaialble only
|
||||
for the users to configure explicitly. This file is available only
|
||||
for TMC ETR devices.
|
||||
|
||||
What: /sys/bus/coresight/devices/<memory_map>.tmc/buf_mode_preferred
|
||||
|
||||
@ -244,7 +244,7 @@ KernelVersion 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Description:
|
||||
(RW) Read or write the status of timestamp upon all interface.
|
||||
Only value 0 and 1 can be written to this node. Set this node to 1 to requeset
|
||||
Only value 0 and 1 can be written to this node. Set this node to 1 to request
|
||||
timestamp to all trace packet.
|
||||
Accepts only one of the 2 values - 0 or 1.
|
||||
0 : Disable the timestamp of all trace packets.
|
||||
|
||||
@ -37,6 +37,12 @@ Description: Per-pmu performance monitoring events specific to the running syste
|
||||
performance monitoring event supported by the <pmu>. The name
|
||||
of the file is the name of the event.
|
||||
|
||||
As performance monitoring event names are case
|
||||
insensitive in the perf tool, the perf tool only looks
|
||||
for lower or upper case event names in sysfs to avoid
|
||||
scanning the directory. It is therefore required the
|
||||
name of the event here is either lower or upper case.
|
||||
|
||||
File contents:
|
||||
|
||||
<term>[=<value>][,<term>[=<value>]]...
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -8,7 +8,7 @@ Description: This directory contains files for tuning the PCIe link
|
||||
|
||||
See Documentation/trace/hisi-ptt.rst for more information.
|
||||
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -18,7 +18,7 @@ Description: (RW) Controls the weight of Tx completion TLPs, which influence
|
||||
will return an error, and out of range values will be converted
|
||||
to 2. The value indicates a probable level of the event.
|
||||
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -28,7 +28,7 @@ Description: (RW) Controls the weight of Tx non-posted TLPs, which influence
|
||||
will return an error, and out of range values will be converted
|
||||
to 2. The value indicates a probable level of the event.
|
||||
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -38,7 +38,7 @@ Description: (RW) Controls the weight of Tx posted TLPs, which influence the
|
||||
will return an error, and out of range values will be converted
|
||||
to 2. The value indicates a probable level of the event.
|
||||
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -49,7 +49,7 @@ Description: (RW) Control the allocated buffer watermark for inbound packets.
|
||||
will return an error, and out of range values will be converted
|
||||
to 2. The value indicates a probable level of the event.
|
||||
|
||||
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level
|
||||
What: /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level
|
||||
Date: October 2022
|
||||
KernelVersion: 6.1
|
||||
Contact: Yicong Yang <yangyicong@hisilicon.com>
|
||||
@ -243,7 +243,8 @@ Description:
|
||||
less measurements. Units after application of scale and offset
|
||||
are milli degrees Celsius.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_tempX_input
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_tempY_input
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_temp_input
|
||||
KernelVersion: 2.6.38
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
|
||||
19
Documentation/ABI/testing/sysfs-bus-iio-ad9739a
Normal file
19
Documentation/ABI/testing/sysfs-bus-iio-ad9739a
Normal file
@ -0,0 +1,19 @@
|
||||
What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_operating_mode
|
||||
KernelVersion: 6.9
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
DAC operating mode. One of the following modes can be selected:
|
||||
|
||||
* normal: This is DAC normal mode.
|
||||
* mixed-mode: In this mode the output is effectively chopped at
|
||||
the DAC sample rate. This has the effect of
|
||||
reducing the power of the fundamental signal while
|
||||
increasing the power of the images centered around
|
||||
the DAC sample rate, thus improving the output
|
||||
power of these images.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_operating_mode_available
|
||||
KernelVersion: 6.9
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Available operating modes.
|
||||
@ -5,4 +5,5 @@ Contact: Matthias Kaehlcke <matthias@kaehlcke.net>
|
||||
linux-usb@vger.kernel.org
|
||||
Description:
|
||||
(RW) Controls whether the USB hub remains always powered
|
||||
during system suspend or not.
|
||||
during system suspend or not. This attribute is not
|
||||
available for non-hub devices.
|
||||
@ -12,6 +12,16 @@ Description:
|
||||
The exact format is described in:
|
||||
Documentation/devicetree/bindings/leds/leds-trigger-pattern.txt
|
||||
|
||||
What: /sys/class/leds/<led>/hr_pattern
|
||||
Date: April 2024
|
||||
Description:
|
||||
Specify a software pattern for the LED, that supports altering
|
||||
the brightness for the specified duration with one software
|
||||
timer. It can do gradual dimming and step change of brightness.
|
||||
|
||||
Unlike the /sys/class/leds/<led>/pattern, this attribute runs
|
||||
a pattern on high-resolution timer (hrtimer).
|
||||
|
||||
What: /sys/class/leds/<led>/hw_pattern
|
||||
Date: September 2018
|
||||
KernelVersion: 4.20
|
||||
|
||||
@ -103,7 +103,7 @@ min_vecs argument set to this limit, and the PCI core will return -ENOSPC
|
||||
if it can't meet the minimum number of vectors.
|
||||
|
||||
The flags argument is used to specify which type of interrupt can be used
|
||||
by the device and the driver (PCI_IRQ_LEGACY, PCI_IRQ_MSI, PCI_IRQ_MSIX).
|
||||
by the device and the driver (PCI_IRQ_INTX, PCI_IRQ_MSI, PCI_IRQ_MSIX).
|
||||
A convenient short-hand (PCI_IRQ_ALL_TYPES) is also available to ask for
|
||||
any possible kind of interrupt. If the PCI_IRQ_AFFINITY flag is set,
|
||||
pci_alloc_irq_vectors() will spread the interrupts around the available CPUs.
|
||||
|
||||
@ -335,7 +335,7 @@ causes the PCI support to program CPU vector data into the PCI device
|
||||
capability registers. Many architectures, chip-sets, or BIOSes do NOT
|
||||
support MSI or MSI-X and a call to pci_alloc_irq_vectors with just
|
||||
the PCI_IRQ_MSI and PCI_IRQ_MSIX flags will fail, so try to always
|
||||
specify PCI_IRQ_LEGACY as well.
|
||||
specify PCI_IRQ_INTX as well.
|
||||
|
||||
Drivers that have different interrupt handlers for MSI/MSI-X and
|
||||
legacy INTx should chose the right one based on the msi_enabled
|
||||
|
||||
@ -241,7 +241,7 @@ After reboot with new kernel or insert the module, a device file named
|
||||
Then, you need a user space tool named aer-inject, which can be gotten
|
||||
from:
|
||||
|
||||
https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
|
||||
https://github.com/intel/aer-inject.git
|
||||
|
||||
More information about aer-inject can be found in the document in
|
||||
its source code.
|
||||
|
||||
@ -9,8 +9,8 @@ TOMOYO is a name-based MAC extension (LSM module) for the Linux kernel.
|
||||
|
||||
LiveCD-based tutorials are available at
|
||||
|
||||
http://tomoyo.sourceforge.jp/1.8/ubuntu12.04-live.html
|
||||
http://tomoyo.sourceforge.jp/1.8/centos6-live.html
|
||||
https://tomoyo.sourceforge.net/1.8/ubuntu12.04-live.html
|
||||
https://tomoyo.sourceforge.net/1.8/centos6-live.html
|
||||
|
||||
Though these tutorials use non-LSM version of TOMOYO, they are useful for you
|
||||
to know what TOMOYO is.
|
||||
@ -21,45 +21,32 @@ How to enable TOMOYO?
|
||||
Build the kernel with ``CONFIG_SECURITY_TOMOYO=y`` and pass ``security=tomoyo`` on
|
||||
kernel's command line.
|
||||
|
||||
Please see http://tomoyo.osdn.jp/2.5/ for details.
|
||||
Please see https://tomoyo.sourceforge.net/2.6/ for details.
|
||||
|
||||
Where is documentation?
|
||||
=======================
|
||||
|
||||
User <-> Kernel interface documentation is available at
|
||||
https://tomoyo.osdn.jp/2.5/policy-specification/index.html .
|
||||
https://tomoyo.sourceforge.net/2.6/policy-specification/index.html .
|
||||
|
||||
Materials we prepared for seminars and symposiums are available at
|
||||
https://osdn.jp/projects/tomoyo/docs/?category_id=532&language_id=1 .
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/ .
|
||||
Below lists are chosen from three aspects.
|
||||
|
||||
What is TOMOYO?
|
||||
TOMOYO Linux Overview
|
||||
https://osdn.jp/projects/tomoyo/docs/lca2009-takeda.pdf
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/lca2009-takeda.pdf
|
||||
TOMOYO Linux: pragmatic and manageable security for Linux
|
||||
https://osdn.jp/projects/tomoyo/docs/freedomhectaipei-tomoyo.pdf
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/freedomhectaipei-tomoyo.pdf
|
||||
TOMOYO Linux: A Practical Method to Understand and Protect Your Own Linux Box
|
||||
https://osdn.jp/projects/tomoyo/docs/PacSec2007-en-no-demo.pdf
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/PacSec2007-en-no-demo.pdf
|
||||
|
||||
What can TOMOYO do?
|
||||
Deep inside TOMOYO Linux
|
||||
https://osdn.jp/projects/tomoyo/docs/lca2009-kumaneko.pdf
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/lca2009-kumaneko.pdf
|
||||
The role of "pathname based access control" in security.
|
||||
https://osdn.jp/projects/tomoyo/docs/lfj2008-bof.pdf
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/lfj2008-bof.pdf
|
||||
|
||||
History of TOMOYO?
|
||||
Realities of Mainlining
|
||||
https://osdn.jp/projects/tomoyo/docs/lfj2008.pdf
|
||||
|
||||
What is future plan?
|
||||
====================
|
||||
|
||||
We believe that inode based security and name based security are complementary
|
||||
and both should be used together. But unfortunately, so far, we cannot enable
|
||||
multiple LSM modules at the same time. We feel sorry that you have to give up
|
||||
SELinux/SMACK/AppArmor etc. when you want to use TOMOYO.
|
||||
|
||||
We hope that LSM becomes stackable in future. Meanwhile, you can use non-LSM
|
||||
version of TOMOYO, available at http://tomoyo.osdn.jp/1.8/ .
|
||||
LSM version of TOMOYO is a subset of non-LSM version of TOMOYO. We are planning
|
||||
to port non-LSM version's functionalities to LSM versions.
|
||||
https://sourceforge.net/projects/tomoyo/files/docs/lfj2008.pdf
|
||||
|
||||
@ -788,6 +788,25 @@
|
||||
Documentation/networking/netconsole.rst for an
|
||||
alternative.
|
||||
|
||||
<DEVNAME>:<n>.<n>[,options]
|
||||
Use the specified serial port on the serial core bus.
|
||||
The addressing uses DEVNAME of the physical serial port
|
||||
device, followed by the serial core controller instance,
|
||||
and the serial port instance. The options are the same
|
||||
as documented for the ttyS addressing above.
|
||||
|
||||
The mapping of the serial ports to the tty instances
|
||||
can be viewed with:
|
||||
|
||||
$ ls -d /sys/bus/serial-base/devices/*:*.*/tty/*
|
||||
/sys/bus/serial-base/devices/00:04:0.0/tty/ttyS0
|
||||
|
||||
In the above example, the console can be addressed with
|
||||
console=00:04:0.0. Note that a console addressed this
|
||||
way will only get added when the related device driver
|
||||
is ready. The use of an earlycon parameter in addition to
|
||||
the console may be desired for console output early on.
|
||||
|
||||
uart[8250],io,<addr>[,options]
|
||||
uart[8250],mmio,<addr>[,options]
|
||||
uart[8250],mmio16,<addr>[,options]
|
||||
@ -1902,6 +1921,28 @@
|
||||
Format:
|
||||
<bus_id>,<clkrate>
|
||||
|
||||
i2c_touchscreen_props= [HW,ACPI,X86]
|
||||
Set device-properties for ACPI-enumerated I2C-attached
|
||||
touchscreen, to e.g. fix coordinates of upside-down
|
||||
mounted touchscreens. If you need this option please
|
||||
submit a drivers/platform/x86/touchscreen_dmi.c patch
|
||||
adding a DMI quirk for this.
|
||||
|
||||
Format:
|
||||
<ACPI_HW_ID>:<prop_name>=<val>[:prop_name=val][:...]
|
||||
Where <val> is one of:
|
||||
Omit "=<val>" entirely Set a boolean device-property
|
||||
Unsigned number Set a u32 device-property
|
||||
Anything else Set a string device-property
|
||||
|
||||
Examples (split over multiple lines):
|
||||
i2c_touchscreen_props=GDIX1001:touchscreen-inverted-x:
|
||||
touchscreen-inverted-y
|
||||
|
||||
i2c_touchscreen_props=MSSL1680:touchscreen-size-x=1920:
|
||||
touchscreen-size-y=1080:touchscreen-inverted-y:
|
||||
firmware-name=gsl1680-vendor-model.fw:silead,home-button
|
||||
|
||||
i8042.debug [HW] Toggle i8042 debug mode
|
||||
i8042.unmask_kbd_data
|
||||
[HW] Enable printing of interrupt data from the KBD port
|
||||
|
||||
@ -467,11 +467,11 @@ anon_fault_fallback_charge
|
||||
instead falls back to using huge pages with lower orders or
|
||||
small pages even though the allocation was successful.
|
||||
|
||||
anon_swpout
|
||||
swpout
|
||||
is incremented every time a huge page is swapped out in one
|
||||
piece without splitting.
|
||||
|
||||
anon_swpout_fallback
|
||||
swpout_fallback
|
||||
is incremented if a huge page has to be split before swapout.
|
||||
Usually because failed to allocate some continuous swap space
|
||||
for the huge page.
|
||||
|
||||
@ -161,6 +161,8 @@ Command Function
|
||||
will be printed to your console. (``0``, for example would make
|
||||
it so that only emergency messages like PANICs or OOPSes would
|
||||
make it to your console.)
|
||||
|
||||
``R`` Replay the kernel log messages on consoles.
|
||||
=========== ===================================================================
|
||||
|
||||
Okay, so what can I use them for?
|
||||
@ -211,6 +213,13 @@ processes.
|
||||
"just thaw ``it(j)``" is useful if your system becomes unresponsive due to a
|
||||
frozen (probably root) filesystem via the FIFREEZE ioctl.
|
||||
|
||||
``Replay logs(R)`` is useful to view the kernel log messages when system is hung
|
||||
or you are not able to use dmesg command to view the messages in printk buffer.
|
||||
User may have to press the key combination multiple times if console system is
|
||||
busy. If it is completely locked up, then messages won't be printed. Output
|
||||
messages depend on current console loglevel, which can be modified using
|
||||
sysrq[0-9] (see above).
|
||||
|
||||
Sometimes SysRq seems to get 'stuck' after using it, what can I do?
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
|
||||
@ -140,6 +140,8 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N1 | #1349291 | N/A |
|
||||
@ -156,6 +158,8 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-V1 | #1619801 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3312417 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | MMU-500 | #841119,826419 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | MMU-600 | #1076982,1209401| N/A |
|
||||
|
||||
98
Documentation/arch/riscv/cmodx.rst
Normal file
98
Documentation/arch/riscv/cmodx.rst
Normal file
@ -0,0 +1,98 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
==============================================================================
|
||||
Concurrent Modification and Execution of Instructions (CMODX) for RISC-V Linux
|
||||
==============================================================================
|
||||
|
||||
CMODX is a programming technique where a program executes instructions that were
|
||||
modified by the program itself. Instruction storage and the instruction cache
|
||||
(icache) are not guaranteed to be synchronized on RISC-V hardware. Therefore, the
|
||||
program must enforce its own synchronization with the unprivileged fence.i
|
||||
instruction.
|
||||
|
||||
However, the default Linux ABI prohibits the use of fence.i in userspace
|
||||
applications. At any point the scheduler may migrate a task onto a new hart. If
|
||||
migration occurs after the userspace synchronized the icache and instruction
|
||||
storage with fence.i, the icache on the new hart will no longer be clean. This
|
||||
is due to the behavior of fence.i only affecting the hart that it is called on.
|
||||
Thus, the hart that the task has been migrated to may not have synchronized
|
||||
instruction storage and icache.
|
||||
|
||||
There are two ways to solve this problem: use the riscv_flush_icache() syscall,
|
||||
or use the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` prctl() and emit fence.i in
|
||||
userspace. The syscall performs a one-off icache flushing operation. The prctl
|
||||
changes the Linux ABI to allow userspace to emit icache flushing operations.
|
||||
|
||||
As an aside, "deferred" icache flushes can sometimes be triggered in the kernel.
|
||||
At the time of writing, this only occurs during the riscv_flush_icache() syscall
|
||||
and when the kernel uses copy_to_user_page(). These deferred flushes happen only
|
||||
when the memory map being used by a hart changes. If the prctl() context caused
|
||||
an icache flush, this deferred icache flush will be skipped as it is redundant.
|
||||
Therefore, there will be no additional flush when using the riscv_flush_icache()
|
||||
syscall inside of the prctl() context.
|
||||
|
||||
prctl() Interface
|
||||
---------------------
|
||||
|
||||
Call prctl() with ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` as the first argument. The
|
||||
remaining arguments will be delegated to the riscv_set_icache_flush_ctx
|
||||
function detailed below.
|
||||
|
||||
.. kernel-doc:: arch/riscv/mm/cacheflush.c
|
||||
:identifiers: riscv_set_icache_flush_ctx
|
||||
|
||||
Example usage:
|
||||
|
||||
The following files are meant to be compiled and linked with each other. The
|
||||
modify_instruction() function replaces an add with 0 with an add with one,
|
||||
causing the instruction sequence in get_value() to change from returning a zero
|
||||
to returning a one.
|
||||
|
||||
cmodx.c::
|
||||
|
||||
#include <stdio.h>
|
||||
#include <sys/prctl.h>
|
||||
|
||||
extern int get_value();
|
||||
extern void modify_instruction();
|
||||
|
||||
int main()
|
||||
{
|
||||
int value = get_value();
|
||||
printf("Value before cmodx: %d\n", value);
|
||||
|
||||
// Call prctl before first fence.i is called inside modify_instruction
|
||||
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX_ON, PR_RISCV_CTX_SW_FENCEI, PR_RISCV_SCOPE_PER_PROCESS);
|
||||
modify_instruction();
|
||||
// Call prctl after final fence.i is called in process
|
||||
prctl(PR_RISCV_SET_ICACHE_FLUSH_CTX_OFF, PR_RISCV_CTX_SW_FENCEI, PR_RISCV_SCOPE_PER_PROCESS);
|
||||
|
||||
value = get_value();
|
||||
printf("Value after cmodx: %d\n", value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
cmodx.S::
|
||||
|
||||
.option norvc
|
||||
|
||||
.text
|
||||
.global modify_instruction
|
||||
modify_instruction:
|
||||
lw a0, new_insn
|
||||
lui a5,%hi(old_insn)
|
||||
sw a0,%lo(old_insn)(a5)
|
||||
fence.i
|
||||
ret
|
||||
|
||||
.section modifiable, "awx"
|
||||
.global get_value
|
||||
get_value:
|
||||
li a0, 0
|
||||
old_insn:
|
||||
addi a0, a0, 0
|
||||
ret
|
||||
|
||||
.data
|
||||
new_insn:
|
||||
addi a0, a0, 1
|
||||
@ -188,6 +188,10 @@ The following keys are defined:
|
||||
manual starting from commit 95cf1f9 ("Add changes requested by Ved
|
||||
during signoff")
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_EXT_ZIHINTPAUSE`: The Zihintpause extension is
|
||||
supported as defined in the RISC-V ISA manual starting from commit
|
||||
d8ab5c78c207 ("Zihintpause is ratified").
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
|
||||
information about the selected set of processors.
|
||||
|
||||
|
||||
@ -13,6 +13,7 @@ RISC-V architecture
|
||||
patch-acceptance
|
||||
uabi
|
||||
vector
|
||||
cmodx
|
||||
|
||||
features
|
||||
|
||||
|
||||
@ -65,4 +65,6 @@ the extension, or may have deliberately removed it from the listing.
|
||||
Misaligned accesses
|
||||
-------------------
|
||||
|
||||
Misaligned accesses are supported in userspace, but they may perform poorly.
|
||||
Misaligned scalar accesses are supported in userspace, but they may perform
|
||||
poorly. Misaligned vector accesses are only supported if the Zicclsm extension
|
||||
is supported.
|
||||
|
||||
@ -217,7 +217,7 @@ current *struct* is::
|
||||
int (*media_changed)(struct cdrom_device_info *, int);
|
||||
int (*tray_move)(struct cdrom_device_info *, int);
|
||||
int (*lock_door)(struct cdrom_device_info *, int);
|
||||
int (*select_speed)(struct cdrom_device_info *, int);
|
||||
int (*select_speed)(struct cdrom_device_info *, unsigned long);
|
||||
int (*get_last_session) (struct cdrom_device_info *,
|
||||
struct cdrom_multisession *);
|
||||
int (*get_mcn)(struct cdrom_device_info *, struct cdrom_mcn *);
|
||||
@ -396,7 +396,7 @@ action need be taken, and the return value should be 0.
|
||||
|
||||
::
|
||||
|
||||
int select_speed(struct cdrom_device_info *cdi, int speed)
|
||||
int select_speed(struct cdrom_device_info *cdi, unsigned long speed)
|
||||
|
||||
Some CD-ROM drives are capable of changing their head-speed. There
|
||||
are several reasons for changing the speed of a CD-ROM drive. Badly
|
||||
|
||||
78
Documentation/core-api/floating-point.rst
Normal file
78
Documentation/core-api/floating-point.rst
Normal file
@ -0,0 +1,78 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
Floating-point API
|
||||
==================
|
||||
|
||||
Kernel code is normally prohibited from using floating-point (FP) registers or
|
||||
instructions, including the C float and double data types. This rule reduces
|
||||
system call overhead, because the kernel does not need to save and restore the
|
||||
userspace floating-point register state.
|
||||
|
||||
However, occasionally drivers or library functions may need to include FP code.
|
||||
This is supported by isolating the functions containing FP code to a separate
|
||||
translation unit (a separate source file), and saving/restoring the FP register
|
||||
state around calls to those functions. This creates "critical sections" of
|
||||
floating-point usage.
|
||||
|
||||
The reason for this isolation is to prevent the compiler from generating code
|
||||
touching the FP registers outside these critical sections. Compilers sometimes
|
||||
use FP registers to optimize inlined ``memcpy`` or variable assignment, as
|
||||
floating-point registers may be wider than general-purpose registers.
|
||||
|
||||
Usability of floating-point code within the kernel is architecture-specific.
|
||||
Additionally, because a single kernel may be configured to support platforms
|
||||
both with and without a floating-point unit, FPU availability must be checked
|
||||
both at build time and at run time.
|
||||
|
||||
Several architectures implement the generic kernel floating-point API from
|
||||
``linux/fpu.h``, as described below. Some other architectures implement their
|
||||
own unique APIs, which are documented separately.
|
||||
|
||||
Build-time API
|
||||
--------------
|
||||
|
||||
Floating-point code may be built if the option ``ARCH_HAS_KERNEL_FPU_SUPPORT``
|
||||
is enabled. For C code, such code must be placed in a separate file, and that
|
||||
file must have its compilation flags adjusted using the following pattern::
|
||||
|
||||
CFLAGS_foo.o += $(CC_FLAGS_FPU)
|
||||
CFLAGS_REMOVE_foo.o += $(CC_FLAGS_NO_FPU)
|
||||
|
||||
Architectures are expected to define one or both of these variables in their
|
||||
top-level Makefile as needed. For example::
|
||||
|
||||
CC_FLAGS_FPU := -mhard-float
|
||||
|
||||
or::
|
||||
|
||||
CC_FLAGS_NO_FPU := -msoft-float
|
||||
|
||||
Normal kernel code is assumed to use the equivalent of ``CC_FLAGS_NO_FPU``.
|
||||
|
||||
Runtime API
|
||||
-----------
|
||||
|
||||
The runtime API is provided in ``linux/fpu.h``. This header cannot be included
|
||||
from files implementing FP code (those with their compilation flags adjusted as
|
||||
above). Instead, it must be included when defining the FP critical sections.
|
||||
|
||||
.. c:function:: bool kernel_fpu_available( void )
|
||||
|
||||
This function reports if floating-point code can be used on this CPU or
|
||||
platform. The value returned by this function is not expected to change
|
||||
at runtime, so it only needs to be called once, not before every
|
||||
critical section.
|
||||
|
||||
.. c:function:: void kernel_fpu_begin( void )
|
||||
void kernel_fpu_end( void )
|
||||
|
||||
These functions create a floating-point critical section. It is only
|
||||
valid to call ``kernel_fpu_begin()`` after a previous call to
|
||||
``kernel_fpu_available()`` returned ``true``. These functions are only
|
||||
guaranteed to be callable from (preemptible or non-preemptible) process
|
||||
context.
|
||||
|
||||
Preemption may be disabled inside critical sections, so their size
|
||||
should be minimized. They are *not* required to be reentrant. If the
|
||||
caller expects to nest critical sections, it must implement its own
|
||||
reference counting.
|
||||
@ -48,6 +48,7 @@ Library functionality that is used throughout the kernel.
|
||||
errseq
|
||||
wrappers/atomic_t
|
||||
wrappers/atomic_bitops
|
||||
floating-point
|
||||
|
||||
Low level entry and exit
|
||||
========================
|
||||
|
||||
@ -192,7 +192,7 @@ alignment larger than PAGE_SIZE.
|
||||
|
||||
Dynamic swiotlb
|
||||
---------------
|
||||
When CONFIG_DYNAMIC_SWIOTLB is enabled, swiotlb can do on-demand expansion of
|
||||
When CONFIG_SWIOTLB_DYNAMIC is enabled, swiotlb can do on-demand expansion of
|
||||
the amount of memory available for allocation as bounce buffers. If a bounce
|
||||
buffer request fails due to lack of available space, an asynchronous background
|
||||
task is kicked off to allocate memory from general system memory and turn it
|
||||
|
||||
@ -1,12 +0,0 @@
|
||||
Altera SOCFPGA SDRAM Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should contain "altr,sdr-ctl" and "syscon".
|
||||
syscon is required by the Altera SOCFPGA SDRAM EDAC.
|
||||
- reg : Should contain 1 register range (address and length)
|
||||
|
||||
Example:
|
||||
sdr: sdr@ffc25000 {
|
||||
compatible = "altr,sdr-ctl", "syscon";
|
||||
reg = <0xffc25000 0x1000>;
|
||||
};
|
||||
@ -157,6 +157,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-cm4io
|
||||
- mntre,reform2-cm4
|
||||
- const: bananapi,bpi-cm4
|
||||
- const: amlogic,a311d
|
||||
- const: amlogic,g12b
|
||||
@ -201,6 +202,18 @@ properties:
|
||||
- amlogic,ad402
|
||||
- const: amlogic,a1
|
||||
|
||||
- description: Boards with the Amlogic A4 A113L2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,ba400
|
||||
- const: amlogic,a4
|
||||
|
||||
- description: Boards with the Amlogic A5 A113X2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,av400
|
||||
- const: amlogic,a5
|
||||
|
||||
- description: Boards with the Amlogic C3 C302X/C308L SoC
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
APM X-GENE SoC series SCU Registers
|
||||
|
||||
This system clock unit contain various register that control block resets,
|
||||
clock enable/disables, clock divisors and other deepsleep registers.
|
||||
|
||||
Properties:
|
||||
- compatible : should contain two values. First value must be:
|
||||
- "apm,xgene-scu"
|
||||
second value must be always "syscon".
|
||||
|
||||
- reg : offset and length of the register set.
|
||||
|
||||
Example :
|
||||
scu: system-clk-controller@17000000 {
|
||||
compatible = "apm,xgene-scu","syscon";
|
||||
reg = <0x0 0x17000000 0x0 0x400>;
|
||||
};
|
||||
@ -35,7 +35,10 @@ properties:
|
||||
- ampere,mtjade-bmc
|
||||
- aspeed,ast2500-evb
|
||||
- asrock,e3c246d4i-bmc
|
||||
- asrock,e3c256d4i-bmc
|
||||
- asrock,romed8hm3-bmc
|
||||
- asrock,spc621d8hm3-bmc
|
||||
- asrock,x570d4u-bmc
|
||||
- bytedance,g220a-bmc
|
||||
- facebook,cmm-bmc
|
||||
- facebook,minipack-bmc
|
||||
@ -74,15 +77,18 @@ properties:
|
||||
- ampere,mtmitchell-bmc
|
||||
- aspeed,ast2600-evb
|
||||
- aspeed,ast2600-evb-a1
|
||||
- asus,x4tf-bmc
|
||||
- facebook,bletchley-bmc
|
||||
- facebook,cloudripper-bmc
|
||||
- facebook,elbert-bmc
|
||||
- facebook,fuji-bmc
|
||||
- facebook,greatlakes-bmc
|
||||
- facebook,harma-bmc
|
||||
- facebook,minerva-cmc
|
||||
- facebook,yosemite4-bmc
|
||||
- ibm,everest-bmc
|
||||
- ibm,rainier-bmc
|
||||
- ibm,system1-bmc
|
||||
- ibm,tacoma-bmc
|
||||
- inventec,starscream-bmc
|
||||
- inventec,transformer-bmc
|
||||
|
||||
@ -1,32 +0,0 @@
|
||||
Power management
|
||||
----------------
|
||||
|
||||
For power management (particularly DVFS and AVS), the North Bridge
|
||||
Power Management component is needed:
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "marvell,armada-3700-nb-pm", "syscon";
|
||||
- reg : the register start and length for the North Bridge
|
||||
Power Management
|
||||
|
||||
Example:
|
||||
|
||||
nb_pm: syscon@14000 {
|
||||
compatible = "marvell,armada-3700-nb-pm", "syscon";
|
||||
reg = <0x14000 0x60>;
|
||||
}
|
||||
|
||||
AVS
|
||||
---
|
||||
|
||||
For AVS an other component is needed:
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "marvell,armada-3700-avs", "syscon";
|
||||
- reg : the register start and length for the AVS
|
||||
|
||||
Example:
|
||||
avs: avs@11500 {
|
||||
compatible = "marvell,armada-3700-avs", "syscon";
|
||||
reg = <0x11500 0x40>;
|
||||
}
|
||||
@ -66,13 +66,11 @@ properties:
|
||||
- const: apb_pclk
|
||||
|
||||
in-ports:
|
||||
type: object
|
||||
description: |
|
||||
Input connections from TPDM to TPDA
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
out-ports:
|
||||
type: object
|
||||
description: |
|
||||
Output connections from the TPDA to legacy CoreSight trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
@ -97,33 +95,31 @@ examples:
|
||||
# minimum tpda definition.
|
||||
- |
|
||||
tpda@6004000 {
|
||||
compatible = "qcom,coresight-tpda", "arm,primecell";
|
||||
reg = <0x6004000 0x1000>;
|
||||
compatible = "qcom,coresight-tpda", "arm,primecell";
|
||||
reg = <0x6004000 0x1000>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
tpda_qdss_0_in_tpdm_dcc: endpoint {
|
||||
remote-endpoint =
|
||||
<&tpdm_dcc_out_tpda_qdss_0>;
|
||||
};
|
||||
remote-endpoint = <&tpdm_dcc_out_tpda_qdss_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
tpda_qdss_out_funnel_in0: endpoint {
|
||||
remote-endpoint =
|
||||
<&funnel_in0_in_tpda_qdss>;
|
||||
};
|
||||
out-ports {
|
||||
port {
|
||||
tpda_qdss_out_funnel_in0: endpoint {
|
||||
remote-endpoint = <&funnel_in0_in_tpda_qdss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
@ -54,11 +54,10 @@ unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mlahb: ahb@38000000 {
|
||||
ahb {
|
||||
compatible = "st,mlahb", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x10000000 0x40000>;
|
||||
ranges;
|
||||
dma-ranges = <0x00000000 0x38000000 0x10000>,
|
||||
<0x10000000 0x10000000 0x60000>,
|
||||
|
||||
@ -57,17 +57,17 @@ properties:
|
||||
- const: allwinner,sun8i-v3s
|
||||
|
||||
- description: Anbernic RG35XX (2024)
|
||||
- items:
|
||||
items:
|
||||
- const: anbernic,rg35xx-2024
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
- description: Anbernic RG35XX Plus
|
||||
- items:
|
||||
items:
|
||||
- const: anbernic,rg35xx-plus
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
- description: Anbernic RG35XX H
|
||||
- items:
|
||||
items:
|
||||
- const: anbernic,rg35xx-h
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
|
||||
@ -21,8 +21,8 @@ properties:
|
||||
- enum:
|
||||
- fsl,vf610-edma
|
||||
- fsl,imx7ulp-edma
|
||||
- fsl,imx8qm-adma
|
||||
- fsl,imx8qm-edma
|
||||
- fsl,imx8ulp-edma
|
||||
- fsl,imx93-edma3
|
||||
- fsl,imx93-edma4
|
||||
- fsl,imx95-edma5
|
||||
@ -43,6 +43,17 @@ properties:
|
||||
maxItems: 64
|
||||
|
||||
"#dma-cells":
|
||||
description: |
|
||||
Specifies the number of cells needed to encode an DMA channel.
|
||||
|
||||
Encode for cells number 2:
|
||||
cell 0: index of dma channel mux instance.
|
||||
cell 1: peripheral dma request id.
|
||||
|
||||
Encode for cells number 3:
|
||||
cell 0: peripheral dma request id.
|
||||
cell 1: dma channel priority.
|
||||
cell 2: bitmask, defined at include/dt-bindings/dma/fsl-edma.h
|
||||
enum:
|
||||
- 2
|
||||
- 3
|
||||
@ -53,11 +64,18 @@ properties:
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 33
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 33
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
The number of power domains matches the number of channels, arranged
|
||||
in ascending order according to their associated DMA channels.
|
||||
minItems: 1
|
||||
maxItems: 64
|
||||
|
||||
big-endian:
|
||||
description: |
|
||||
@ -70,7 +88,6 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- dma-channels
|
||||
|
||||
allOf:
|
||||
@ -80,7 +97,6 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8qm-adma
|
||||
- fsl,imx8qm-edma
|
||||
- fsl,imx93-edma3
|
||||
- fsl,imx93-edma4
|
||||
@ -108,6 +124,7 @@ allOf:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: dmamux0
|
||||
@ -136,6 +153,7 @@ allOf:
|
||||
properties:
|
||||
clock:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: dma
|
||||
@ -151,6 +169,58 @@ allOf:
|
||||
dma-channels:
|
||||
const: 32
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: fsl,imx8ulp-edma
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 33
|
||||
clock-names:
|
||||
minItems: 33
|
||||
items:
|
||||
oneOf:
|
||||
- const: dma
|
||||
- pattern: "^ch(0[0-9]|[1-2][0-9]|3[01])$"
|
||||
|
||||
interrupt-names: false
|
||||
interrupts:
|
||||
minItems: 32
|
||||
"#dma-cells":
|
||||
const: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,vf610-edma
|
||||
- fsl,imx7ulp-edma
|
||||
- fsl,imx93-edma3
|
||||
- fsl,imx93-edma4
|
||||
- fsl,imx95-edma5
|
||||
- fsl,imx8ulp-edma
|
||||
- fsl,ls1028a-edma
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8qm-adma
|
||||
- fsl,imx8qm-edma
|
||||
then:
|
||||
required:
|
||||
- power-domains
|
||||
else:
|
||||
properties:
|
||||
power-domains: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
@ -206,44 +276,27 @@ examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/imx93-clock.h>
|
||||
#include <dt-bindings/firmware/imx/rsrc.h>
|
||||
|
||||
dma-controller@44000000 {
|
||||
compatible = "fsl,imx93-edma3";
|
||||
reg = <0x44000000 0x200000>;
|
||||
dma-controller@5a9f0000 {
|
||||
compatible = "fsl,imx8qm-edma";
|
||||
reg = <0x5a9f0000 0x90000>;
|
||||
#dma-cells = <3>;
|
||||
dma-channels = <31>;
|
||||
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX93_CLK_EDMA1_GATE>;
|
||||
clock-names = "dma";
|
||||
dma-channels = <8>;
|
||||
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd IMX_SC_R_DMA_3_CH0>,
|
||||
<&pd IMX_SC_R_DMA_3_CH1>,
|
||||
<&pd IMX_SC_R_DMA_3_CH2>,
|
||||
<&pd IMX_SC_R_DMA_3_CH3>,
|
||||
<&pd IMX_SC_R_DMA_3_CH4>,
|
||||
<&pd IMX_SC_R_DMA_3_CH5>,
|
||||
<&pd IMX_SC_R_DMA_3_CH6>,
|
||||
<&pd IMX_SC_R_DMA_3_CH7>;
|
||||
};
|
||||
|
||||
@ -94,6 +94,7 @@ properties:
|
||||
- SAI: 24
|
||||
- Multi SAI: 25
|
||||
- HDMI Audio: 26
|
||||
- I2C: 27
|
||||
|
||||
The third cell: transfer priority ID
|
||||
enum:
|
||||
|
||||
@ -1,95 +0,0 @@
|
||||
Qualcomm Technologies HIDMA Management interface
|
||||
|
||||
Qualcomm Technologies HIDMA is a high speed DMA device. It only supports
|
||||
memcpy and memset capabilities. It has been designed for virtualized
|
||||
environments.
|
||||
|
||||
Each HIDMA HW instance consists of multiple DMA channels. These channels
|
||||
share the same bandwidth. The bandwidth utilization can be partitioned
|
||||
among channels based on the priority and weight assignments.
|
||||
|
||||
There are only two priority levels and 15 weigh assignments possible.
|
||||
|
||||
Other parameters here determine how much of the system bus this HIDMA
|
||||
instance can use like maximum read/write request and number of bytes to
|
||||
read/write in a single burst.
|
||||
|
||||
Main node required properties:
|
||||
- compatible: "qcom,hidma-mgmt-1.0";
|
||||
- reg: Address range for DMA device
|
||||
- dma-channels: Number of channels supported by this DMA controller.
|
||||
- max-write-burst-bytes: Maximum write burst in bytes that HIDMA can
|
||||
occupy the bus for in a single transaction. A memcpy requested is
|
||||
fragmented to multiples of this amount. This parameter is used while
|
||||
writing into destination memory. Setting this value incorrectly can
|
||||
starve other peripherals in the system.
|
||||
- max-read-burst-bytes: Maximum read burst in bytes that HIDMA can
|
||||
occupy the bus for in a single transaction. A memcpy request is
|
||||
fragmented to multiples of this amount. This parameter is used while
|
||||
reading the source memory. Setting this value incorrectly can starve
|
||||
other peripherals in the system.
|
||||
- max-write-transactions: This value is how many times a write burst is
|
||||
applied back to back while writing to the destination before yielding
|
||||
the bus.
|
||||
- max-read-transactions: This value is how many times a read burst is
|
||||
applied back to back while reading the source before yielding the bus.
|
||||
- channel-reset-timeout-cycles: Channel reset timeout in cycles for this SOC.
|
||||
Once a reset is applied to the HW, HW starts a timer for reset operation
|
||||
to confirm. If reset is not completed within this time, HW reports reset
|
||||
failure.
|
||||
|
||||
Sub-nodes:
|
||||
|
||||
HIDMA has one or more DMA channels that are used to move data from one
|
||||
memory location to another.
|
||||
|
||||
When the OS is not in control of the management interface (i.e. it's a guest),
|
||||
the channel nodes appear on their own, not under a management node.
|
||||
|
||||
Required properties:
|
||||
- compatible: must contain "qcom,hidma-1.0" for initial HW or
|
||||
"qcom,hidma-1.1"/"qcom,hidma-1.2" for MSI capable HW.
|
||||
- reg: Addresses for the transfer and event channel
|
||||
- interrupts: Should contain the event interrupt
|
||||
- desc-count: Number of asynchronous requests this channel can handle
|
||||
- iommus: required a iommu node
|
||||
|
||||
Optional properties for MSI:
|
||||
- msi-parent : See the generic MSI binding described in
|
||||
devicetree/bindings/interrupt-controller/msi.txt for a description of the
|
||||
msi-parent property.
|
||||
|
||||
Example:
|
||||
|
||||
Hypervisor OS configuration:
|
||||
|
||||
hidma-mgmt@f9984000 = {
|
||||
compatible = "qcom,hidma-mgmt-1.0";
|
||||
reg = <0xf9984000 0x15000>;
|
||||
dma-channels = <6>;
|
||||
max-write-burst-bytes = <1024>;
|
||||
max-read-burst-bytes = <1024>;
|
||||
max-write-transactions = <31>;
|
||||
max-read-transactions = <31>;
|
||||
channel-reset-timeout-cycles = <0x500>;
|
||||
|
||||
hidma_24: dma-controller@5c050000 {
|
||||
compatible = "qcom,hidma-1.0";
|
||||
reg = <0 0x5c050000 0x0 0x1000>,
|
||||
<0 0x5c0b0000 0x0 0x1000>;
|
||||
interrupts = <0 389 0>;
|
||||
desc-count = <10>;
|
||||
iommus = <&system_mmu>;
|
||||
};
|
||||
};
|
||||
|
||||
Guest OS configuration:
|
||||
|
||||
hidma_24: dma-controller@5c050000 {
|
||||
compatible = "qcom,hidma-1.0";
|
||||
reg = <0 0x5c050000 0x0 0x1000>,
|
||||
<0 0x5c0b0000 0x0 0x1000>;
|
||||
interrupts = <0 389 0>;
|
||||
desc-count = <10>;
|
||||
iommus = <&system_mmu>;
|
||||
};
|
||||
@ -93,10 +93,10 @@ properties:
|
||||
data-width:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: Data bus width per each DMA master in bytes.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
maxItems: 4
|
||||
items:
|
||||
enum: [4, 8, 16, 32]
|
||||
enum: [4, 8, 16, 32]
|
||||
|
||||
data_width:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
@ -106,28 +106,28 @@ properties:
|
||||
deprecated. It' usage is discouraged in favor of data-width one. Moreover
|
||||
the property incorrectly permits to define data-bus width of 8 and 16
|
||||
bits, which is impossible in accordance with DW DMAC IP-core data book.
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
items:
|
||||
maxItems: 4
|
||||
items:
|
||||
enum:
|
||||
- 0 # 8 bits
|
||||
- 1 # 16 bits
|
||||
- 2 # 32 bits
|
||||
- 3 # 64 bits
|
||||
- 4 # 128 bits
|
||||
- 5 # 256 bits
|
||||
default: 0
|
||||
enum:
|
||||
- 0 # 8 bits
|
||||
- 1 # 16 bits
|
||||
- 2 # 32 bits
|
||||
- 3 # 64 bits
|
||||
- 4 # 128 bits
|
||||
- 5 # 256 bits
|
||||
default: 0
|
||||
|
||||
multi-block:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
description: |
|
||||
LLP-based multi-block transfer supported by hardware per
|
||||
each DMA channel.
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
items:
|
||||
maxItems: 8
|
||||
items:
|
||||
enum: [0, 1]
|
||||
default: 1
|
||||
enum: [0, 1]
|
||||
default: 1
|
||||
|
||||
snps,max-burst-len:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
@ -138,11 +138,11 @@ properties:
|
||||
will be from 1 to max-burst-len words. It's an array property with one
|
||||
cell per channel in the units determined by the value set in the
|
||||
CTLx.SRC_TR_WIDTH/CTLx.DST_TR_WIDTH fields (data width).
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
items:
|
||||
maxItems: 8
|
||||
items:
|
||||
enum: [4, 8, 16, 32, 64, 128, 256]
|
||||
default: 256
|
||||
enum: [4, 8, 16, 32, 64, 128, 256]
|
||||
default: 256
|
||||
|
||||
snps,dma-protection-control:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
@ -21,6 +21,7 @@ properties:
|
||||
- snps,axi-dma-1.01a
|
||||
- intel,kmb-axi-dma
|
||||
- starfive,jh7110-axi-dma
|
||||
- starfive,jh8100-axi-dma
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
|
||||
@ -0,0 +1,86 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xilinx SelectMAP FPGA interface
|
||||
|
||||
maintainers:
|
||||
- Charles Perry <charles.perry@savoirfairelinux.com>
|
||||
|
||||
description: |
|
||||
Xilinx 7 Series FPGAs support a method of loading the bitstream over a
|
||||
parallel port named the SelectMAP interface in the documentation. Only
|
||||
the x8 mode is supported where data is loaded at one byte per rising edge of
|
||||
the clock, with the MSB of each byte presented to the D0 pin.
|
||||
|
||||
Datasheets:
|
||||
https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- xlnx,fpga-xc7s-selectmap
|
||||
- xlnx,fpga-xc7a-selectmap
|
||||
- xlnx,fpga-xc7k-selectmap
|
||||
- xlnx,fpga-xc7v-selectmap
|
||||
|
||||
reg:
|
||||
description:
|
||||
At least 1 byte of memory mapped IO
|
||||
maxItems: 1
|
||||
|
||||
prog-gpios:
|
||||
description:
|
||||
config pin (referred to as PROGRAM_B in the manual)
|
||||
maxItems: 1
|
||||
|
||||
done-gpios:
|
||||
description:
|
||||
config status pin (referred to as DONE in the manual)
|
||||
maxItems: 1
|
||||
|
||||
init-gpios:
|
||||
description:
|
||||
initialization status and configuration error pin
|
||||
(referred to as INIT_B in the manual)
|
||||
maxItems: 1
|
||||
|
||||
csi-gpios:
|
||||
description:
|
||||
chip select pin (referred to as CSI_B in the manual)
|
||||
Optional gpio for if the bus controller does not provide a chip select.
|
||||
maxItems: 1
|
||||
|
||||
rdwr-gpios:
|
||||
description:
|
||||
read/write select pin (referred to as RDWR_B in the manual)
|
||||
Optional gpio for if the bus controller does not provide this pin.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- prog-gpios
|
||||
- done-gpios
|
||||
- init-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
fpga-mgr@8000000 {
|
||||
compatible = "xlnx,fpga-xc7s-selectmap";
|
||||
reg = <0x8000000 0x4>;
|
||||
prog-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
|
||||
init-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
|
||||
done-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
|
||||
csi-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
rdwr-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
...
|
||||
@ -32,6 +32,8 @@ properties:
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
spi-3wire: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
|
||||
279
Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml
Normal file
279
Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml
Normal file
@ -0,0 +1,279 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2023 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad7173.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD7173 ADC
|
||||
|
||||
maintainers:
|
||||
- Ceclan Dumitru <dumitru.ceclan@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices AD717x ADC's:
|
||||
The AD717x family offer a complete integrated Sigma-Delta ADC solution which
|
||||
can be used in high precision, low noise single channel applications
|
||||
(Life Science measurements) or higher speed multiplexed applications
|
||||
(Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
|
||||
primarily for measurement of signals close to DC but also delivers
|
||||
outstanding performance with input bandwidths out to ~10kHz.
|
||||
|
||||
Datasheets for supported chips:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-4.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7173-8.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7175-2.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7175-8.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7176-2.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7177-2.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7172-2
|
||||
- adi,ad7172-4
|
||||
- adi,ad7173-8
|
||||
- adi,ad7175-2
|
||||
- adi,ad7175-8
|
||||
- adi,ad7176-2
|
||||
- adi,ad7177-2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: |
|
||||
Ready: multiplexed with SPI data out. While SPI CS is low,
|
||||
can be used to indicate the completion of a conversion.
|
||||
|
||||
- description: |
|
||||
Error: The three error bits in the status register (ADC_ERROR, CRC_ERROR,
|
||||
and REG_ERROR) are OR'ed, inverted, and mapped to the ERROR pin.
|
||||
Therefore, the ERROR pin indicates that an error has occurred.
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: rdy
|
||||
- const: err
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 20000000
|
||||
|
||||
gpio-controller:
|
||||
description: Marks the device node as a GPIO controller.
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
description:
|
||||
The first cell is the GPIO number and the second cell specifies
|
||||
GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
|
||||
|
||||
vref-supply:
|
||||
description: |
|
||||
Differential external reference supply used for conversion. The reference
|
||||
voltage (Vref) specified here must be the voltage difference between the
|
||||
REF+ and REF- pins: Vref = (REF+) - (REF-).
|
||||
|
||||
vref2-supply:
|
||||
description: |
|
||||
Differential external reference supply used for conversion. The reference
|
||||
voltage (Vref2) specified here must be the voltage difference between the
|
||||
REF2+ and REF2- pins: Vref2 = (REF2+) - (REF2-).
|
||||
|
||||
avdd-supply:
|
||||
description: Avdd supply, can be used as reference for conversion.
|
||||
This supply is referenced to AVSS, voltage specified here
|
||||
represents (AVDD1 - AVSS).
|
||||
|
||||
avdd2-supply:
|
||||
description: Avdd2 supply, used as the input to the internal voltage regulator.
|
||||
This supply is referenced to AVSS, voltage specified here
|
||||
represents (AVDD2 - AVSS).
|
||||
|
||||
iovdd-supply:
|
||||
description: iovdd supply, used for the chip digital interface.
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Optional external clock source. Can include one clock source: external
|
||||
clock or external crystal.
|
||||
|
||||
clock-names:
|
||||
enum:
|
||||
- ext-clk
|
||||
- xtal
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@[0-9a-f]$":
|
||||
type: object
|
||||
$ref: adc.yaml
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
diff-channels:
|
||||
items:
|
||||
minimum: 0
|
||||
maximum: 31
|
||||
|
||||
adi,reference-select:
|
||||
description: |
|
||||
Select the reference source to use when converting on
|
||||
the specific channel. Valid values are:
|
||||
vref : REF+ /REF−
|
||||
vref2 : REF2+ /REF2−
|
||||
refout-avss: REFOUT/AVSS (Internal reference)
|
||||
avdd : AVDD /AVSS
|
||||
|
||||
External reference ref2 only available on ad7173-8 and ad7172-4.
|
||||
Internal reference refout-avss not available on ad7172-4.
|
||||
|
||||
If not specified, internal reference used (if available).
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- vref
|
||||
- vref2
|
||||
- refout-avss
|
||||
- avdd
|
||||
default: refout-avss
|
||||
|
||||
required:
|
||||
- reg
|
||||
- diff-channels
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
# Only ad7172-4, ad7173-8 and ad7175-8 support vref2
|
||||
# Other models have [0-3] channel registers
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
not:
|
||||
contains:
|
||||
enum:
|
||||
- adi,ad7172-4
|
||||
- adi,ad7173-8
|
||||
- adi,ad7175-8
|
||||
then:
|
||||
properties:
|
||||
vref2-supply: false
|
||||
patternProperties:
|
||||
"^channel@[0-9a-f]$":
|
||||
properties:
|
||||
adi,reference-select:
|
||||
enum:
|
||||
- vref
|
||||
- refout-avss
|
||||
- avdd
|
||||
reg:
|
||||
maximum: 3
|
||||
|
||||
# Model ad7172-4 does not support internal reference
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: adi,ad7172-4
|
||||
then:
|
||||
patternProperties:
|
||||
"^channel@[0-9a-f]$":
|
||||
properties:
|
||||
reg:
|
||||
maximum: 7
|
||||
adi,reference-select:
|
||||
enum:
|
||||
- vref
|
||||
- vref2
|
||||
- avdd
|
||||
required:
|
||||
- adi,reference-select
|
||||
|
||||
- if:
|
||||
anyOf:
|
||||
- required: [clock-names]
|
||||
- required: [clocks]
|
||||
then:
|
||||
properties:
|
||||
'#clock-cells': false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "adi,ad7173-8";
|
||||
reg = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-names = "rdy";
|
||||
interrupt-parent = <&gpio>;
|
||||
spi-max-frequency = <5000000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
#clock-cells = <0>;
|
||||
|
||||
vref-supply = <&dummy_regulator>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
bipolar;
|
||||
diff-channels = <0 1>;
|
||||
adi,reference-select = "vref";
|
||||
};
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
diff-channels = <2 3>;
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
reg = <2>;
|
||||
bipolar;
|
||||
diff-channels = <4 5>;
|
||||
};
|
||||
|
||||
channel@3 {
|
||||
reg = <3>;
|
||||
bipolar;
|
||||
diff-channels = <6 7>;
|
||||
};
|
||||
|
||||
channel@4 {
|
||||
reg = <4>;
|
||||
diff-channels = <8 9>;
|
||||
adi,reference-select = "avdd";
|
||||
};
|
||||
};
|
||||
};
|
||||
213
Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
Normal file
213
Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
Normal file
@ -0,0 +1,213 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad7944.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices PulSAR LFCSP Analog to Digital Converters
|
||||
|
||||
maintainers:
|
||||
- Michael Hennerich <Michael.Hennerich@analog.com>
|
||||
- Nuno Sá <nuno.sa@analog.com>
|
||||
|
||||
description: |
|
||||
A family of pin-compatible single channel differential analog to digital
|
||||
converters with SPI support in a LFCSP package.
|
||||
|
||||
* https://www.analog.com/en/products/ad7944.html
|
||||
* https://www.analog.com/en/products/ad7985.html
|
||||
* https://www.analog.com/en/products/ad7986.html
|
||||
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7944
|
||||
- adi,ad7985
|
||||
- adi,ad7986
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 111111111
|
||||
|
||||
spi-cpol: true
|
||||
spi-cpha: true
|
||||
|
||||
adi,spi-mode:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [ single, chain ]
|
||||
description: |
|
||||
This property indicates the SPI wiring configuration.
|
||||
|
||||
When this property is omitted, it is assumed that the device is using what
|
||||
the datasheet calls "4-wire mode". This is the conventional SPI mode used
|
||||
when there are multiple devices on the same bus. In this mode, the CNV
|
||||
line is used to initiate the conversion and the SDI line is connected to
|
||||
CS on the SPI controller.
|
||||
|
||||
When this property is present, it indicates that the device is using one
|
||||
of the following alternative wiring configurations:
|
||||
|
||||
* single: The datasheet calls this "3-wire mode". (NOTE: The datasheet's
|
||||
definition of 3-wire mode is NOT at all related to the standard
|
||||
spi-3wire property!) This mode is often used when the ADC is the only
|
||||
device on the bus. In this mode, SDI is tied to VIO, and the CNV line
|
||||
can be connected to the CS line of the SPI controller or to a GPIO, in
|
||||
which case the CS line of the controller is unused.
|
||||
* chain: The datasheet calls this "chain mode". This mode is used to save
|
||||
on wiring when multiple ADCs are used. In this mode, the SDI line of
|
||||
one chip is tied to the SDO of the next chip in the chain and the SDI of
|
||||
the last chip in the chain is tied to GND. Only the first chip in the
|
||||
chain is connected to the SPI bus. The CNV line of all chips are tied
|
||||
together. The CS line of the SPI controller can be used as the CNV line
|
||||
only if it is active high.
|
||||
|
||||
'#daisy-chained-devices': true
|
||||
|
||||
avdd-supply:
|
||||
description: A 2.5V supply that powers the analog circuitry.
|
||||
|
||||
dvdd-supply:
|
||||
description: A 2.5V supply that powers the digital circuitry.
|
||||
|
||||
vio-supply:
|
||||
description:
|
||||
A 1.8V to 2.7V supply for the digital inputs and outputs.
|
||||
|
||||
bvdd-supply:
|
||||
description:
|
||||
A voltage supply for the buffered power. When using an external reference
|
||||
without an internal buffer (PDREF high, REFIN low), this should be
|
||||
connected to the same supply as ref-supply. Otherwise, when using an
|
||||
internal reference or an external reference with an internal buffer, this
|
||||
is connected to a 5V supply.
|
||||
|
||||
ref-supply:
|
||||
description:
|
||||
Voltage regulator for the external reference voltage (REF). This property
|
||||
is omitted when using an internal reference.
|
||||
|
||||
refin-supply:
|
||||
description:
|
||||
Voltage regulator for the reference buffer input (REFIN). When using an
|
||||
external buffer with internal reference, this should be connected to a
|
||||
1.2V external reference voltage supply. Otherwise, this property is
|
||||
omitted.
|
||||
|
||||
cnv-gpios:
|
||||
description:
|
||||
The Convert Input (CNV). This input has multiple functions. It initiates
|
||||
the conversions and selects the SPI mode of the device (chain or CS). In
|
||||
'single' mode, this property is omitted if the CNV pin is connected to the
|
||||
CS line of the SPI controller.
|
||||
maxItems: 1
|
||||
|
||||
turbo-gpios:
|
||||
description:
|
||||
GPIO connected to the TURBO line. If omitted, it is assumed that the TURBO
|
||||
line is hard-wired and the state is determined by the adi,always-turbo
|
||||
property.
|
||||
maxItems: 1
|
||||
|
||||
adi,always-turbo:
|
||||
type: boolean
|
||||
description:
|
||||
When present, this property indicates that the TURBO line is hard-wired
|
||||
and the state is always high. If neither this property nor turbo-gpios is
|
||||
present, the TURBO line is assumed to be hard-wired and the state is
|
||||
always low.
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
The SDO pin can also function as a busy indicator. This node should be
|
||||
connected to an interrupt that is triggered when the SDO line goes low
|
||||
while the SDI line is high and the CNV line is low ('single' mode) or the
|
||||
SDI line is low and the CNV line is high ('multi' mode); or when the SDO
|
||||
line goes high while the SDI and CNV lines are high (chain mode),
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- dvdd-supply
|
||||
- vio-supply
|
||||
- bvdd-supply
|
||||
|
||||
allOf:
|
||||
# ref-supply and refin-supply are mutually exclusive (neither is also valid)
|
||||
- if:
|
||||
required:
|
||||
- ref-supply
|
||||
then:
|
||||
properties:
|
||||
refin-supply: false
|
||||
- if:
|
||||
required:
|
||||
- refin-supply
|
||||
then:
|
||||
properties:
|
||||
ref-supply: false
|
||||
# in '4-wire' mode, cnv-gpios is required, for other modes it is optional
|
||||
- if:
|
||||
not:
|
||||
required:
|
||||
- adi,spi-mode
|
||||
then:
|
||||
required:
|
||||
- cnv-gpios
|
||||
# chain mode has lower SCLK max rate and doesn't work when TURBO is enabled
|
||||
- if:
|
||||
required:
|
||||
- adi,spi-mode
|
||||
properties:
|
||||
adi,spi-mode:
|
||||
const: chain
|
||||
then:
|
||||
properties:
|
||||
spi-max-frequency:
|
||||
maximum: 90909090
|
||||
adi,always-turbo: false
|
||||
required:
|
||||
- '#daisy-chained-devices'
|
||||
else:
|
||||
properties:
|
||||
'#daisy-chained-devices': false
|
||||
# turbo-gpios and adi,always-turbo are mutually exclusive
|
||||
- if:
|
||||
required:
|
||||
- turbo-gpios
|
||||
then:
|
||||
properties:
|
||||
adi,always-turbo: false
|
||||
- if:
|
||||
required:
|
||||
- adi,always-turbo
|
||||
then:
|
||||
properties:
|
||||
turbo-gpios: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
adc@0 {
|
||||
compatible = "adi,ad7944";
|
||||
reg = <0>;
|
||||
spi-cpha;
|
||||
spi-max-frequency = <111111111>;
|
||||
avdd-supply = <&supply_2_5V>;
|
||||
dvdd-supply = <&supply_2_5V>;
|
||||
vio-supply = <&supply_1_8V>;
|
||||
bvdd-supply = <&supply_5V>;
|
||||
cnv-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
|
||||
turbo-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -28,6 +28,9 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
@ -48,6 +51,7 @@ required:
|
||||
- compatible
|
||||
- dmas
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@ -58,6 +62,7 @@ examples:
|
||||
reg = <0x44a00000 0x10000>;
|
||||
dmas = <&rx_dma 0>;
|
||||
dma-names = "rx";
|
||||
clocks = <&axi_clk>;
|
||||
#io-backend-cells = <0>;
|
||||
};
|
||||
...
|
||||
|
||||
@ -11,8 +11,13 @@ maintainers:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- allwinner,sun20i-d1-gpadc
|
||||
oneOf:
|
||||
- enum:
|
||||
- allwinner,sun20i-d1-gpadc
|
||||
- items:
|
||||
- enum:
|
||||
- allwinner,sun50i-h616-gpadc
|
||||
- const: allwinner,sun20i-d1-gpadc
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
95
Documentation/devicetree/bindings/iio/dac/adi,ad9739a.yaml
Normal file
95
Documentation/devicetree/bindings/iio/dac/adi,ad9739a.yaml
Normal file
@ -0,0 +1,95 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad9739a.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD9739A RF DAC
|
||||
|
||||
maintainers:
|
||||
- Dragos Bogdan <dragos.bogdan@analog.com>
|
||||
- Nuno Sa <nuno.sa@analog.com>
|
||||
|
||||
description: |
|
||||
The AD9739A is a 14-bit, 2.5 GSPS high performance RF DACs that are capable
|
||||
of synthesizing wideband signals from dc up to 3 GHz.
|
||||
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad9737a_9739a.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad9739a
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vdd-3p3-supply:
|
||||
description: 3.3V Digital input supply.
|
||||
|
||||
vdd-supply:
|
||||
description: 1.8V Digital input supply.
|
||||
|
||||
vdda-supply:
|
||||
description: 3.3V Analog input supply.
|
||||
|
||||
vddc-supply:
|
||||
description: 1.8V Clock input supply.
|
||||
|
||||
vref-supply:
|
||||
description: Input/Output reference supply.
|
||||
|
||||
io-backends:
|
||||
maxItems: 1
|
||||
|
||||
adi,full-scale-microamp:
|
||||
description: This property represents the DAC full scale current.
|
||||
minimum: 8580
|
||||
maximum: 31700
|
||||
default: 20000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- io-backends
|
||||
- vdd-3p3-supply
|
||||
- vdd-supply
|
||||
- vdda-supply
|
||||
- vddc-supply
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dac@0 {
|
||||
compatible = "adi,ad9739a";
|
||||
reg = <0>;
|
||||
|
||||
clocks = <&dac_clk>;
|
||||
|
||||
io-backends = <&iio_backend>;
|
||||
|
||||
vdd-3p3-supply = <&vdd_3_3>;
|
||||
vdd-supply = <&vdd>;
|
||||
vdda-supply = <&vdd_3_3>;
|
||||
vddc-supply = <&vdd>;
|
||||
};
|
||||
};
|
||||
...
|
||||
62
Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
Normal file
62
Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml
Normal file
@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,axi-dac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AXI DAC IP core
|
||||
|
||||
maintainers:
|
||||
- Nuno Sa <nuno.sa@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices Generic AXI DAC IP core for interfacing a DAC device
|
||||
with a high speed serial (JESD204B/C) or source synchronous parallel
|
||||
interface (LVDS/CMOS).
|
||||
Usually, some other interface type (i.e SPI) is used as a control
|
||||
interface for the actual DAC, while this IP core will interface
|
||||
to the data-lines of the DAC and handle the streaming of data from
|
||||
memory via DMA into the DAC.
|
||||
|
||||
https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,axi-dac-9.1.b
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: tx
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#io-backend-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- dmas
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dac@44a00000 {
|
||||
compatible = "adi,axi-dac-9.1.b";
|
||||
reg = <0x44a00000 0x10000>;
|
||||
dmas = <&tx_dma 0>;
|
||||
dma-names = "tx";
|
||||
#io-backend-cells = <0>;
|
||||
clocks = <&axi_clk>;
|
||||
};
|
||||
...
|
||||
@ -21,6 +21,7 @@ properties:
|
||||
- ti,dac5573
|
||||
- ti,dac6573
|
||||
- ti,dac7573
|
||||
- ti,dac081c081
|
||||
- ti,dac121c081
|
||||
|
||||
reg:
|
||||
|
||||
@ -4,16 +4,20 @@
|
||||
$id: http://devicetree.org/schemas/iio/health/maxim,max30102.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim MAX30102 heart rate and pulse oximeter and MAX30105 particle-sensor
|
||||
title: Maxim MAX30101/2 heart rate and pulse oximeter and MAX30105 particle-sensor
|
||||
|
||||
maintainers:
|
||||
- Matt Ranostay <matt.ranostay@konsulko.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- maxim,max30102
|
||||
- maxim,max30105
|
||||
oneOf:
|
||||
- enum:
|
||||
- maxim,max30102
|
||||
- maxim,max30105
|
||||
- items:
|
||||
- const: maxim,max30101
|
||||
- const: maxim,max30105
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -34,6 +34,9 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@ -43,6 +46,7 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
@ -54,5 +58,6 @@ examples:
|
||||
vdd-supply = <&vcc_3v3>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <23 IRQ_TYPE_EDGE_RISING>;
|
||||
reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -32,6 +32,8 @@ properties:
|
||||
- invensense,icm42605
|
||||
- invensense,icm42622
|
||||
- invensense,icm42631
|
||||
- invensense,icm42686
|
||||
- invensense,icm42688
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -62,14 +62,15 @@ properties:
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- invensense,mpu9150
|
||||
- invensense,mpu9250
|
||||
- invensense,mpu9255
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- invensense,iam20680
|
||||
- invensense,icm20602
|
||||
- invensense,icm20608
|
||||
- invensense,icm20609
|
||||
- invensense,icm20689
|
||||
then:
|
||||
properties:
|
||||
i2c-gate: false
|
||||
|
||||
@ -4,17 +4,22 @@
|
||||
$id: http://devicetree.org/schemas/iio/light/avago,apds9300.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Avago APDS9300 ambient light sensor
|
||||
title: Avago Gesture/RGB/ALS/Proximity sensors
|
||||
|
||||
maintainers:
|
||||
- Jonathan Cameron <jic23@kernel.org>
|
||||
- Subhajit Ghosh <subhajit.ghosh@tweaklogic.com>
|
||||
|
||||
description: |
|
||||
Datasheet at https://www.avagotech.com/docs/AV02-1077EN
|
||||
Datasheet: https://www.avagotech.com/docs/AV02-1077EN
|
||||
Datasheet: https://www.avagotech.com/docs/AV02-4191EN
|
||||
Datasheet: https://www.avagotech.com/docs/AV02-4755EN
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: avago,apds9300
|
||||
enum:
|
||||
- avago,apds9300
|
||||
- avago,apds9306
|
||||
- avago,apds9960
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@ -22,6 +27,8 @@ properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
@ -30,6 +37,8 @@ required:
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -38,7 +47,8 @@ examples:
|
||||
compatible = "avago,apds9300";
|
||||
reg = <0x39>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <29 8>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
vdd-supply = <®ulator_3v3>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
||||
@ -1,44 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/light/avago,apds9960.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Avago APDS9960 gesture/RGB/ALS/proximity sensor
|
||||
|
||||
maintainers:
|
||||
- Matt Ranostay <matt.ranostay@konsulko.com>
|
||||
|
||||
description: |
|
||||
Datasheet at https://www.avagotech.com/docs/AV02-4191EN
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: avago,apds9960
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
light-sensor@39 {
|
||||
compatible = "avago,apds9960";
|
||||
reg = <0x39>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <16 1>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@ -57,6 +57,8 @@ properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
|
||||
adi,mux-delay-config-us:
|
||||
description: |
|
||||
Extra delay prior to each conversion, in addition to the internal 1ms
|
||||
@ -460,6 +462,7 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- vdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
@ -489,6 +492,7 @@ examples:
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vdd-supply = <&supply>;
|
||||
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-parent = <&gpio>;
|
||||
|
||||
|
||||
@ -11,10 +11,18 @@ maintainers:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,pm8058-vib
|
||||
- qcom,pm8916-vib
|
||||
- qcom,pm8921-vib
|
||||
oneOf:
|
||||
- enum:
|
||||
- qcom,pm8058-vib
|
||||
- qcom,pm8916-vib
|
||||
- qcom,pm8921-vib
|
||||
- qcom,pmi632-vib
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,pm7250b-vib
|
||||
- qcom,pm7325b-vib
|
||||
- qcom,pm7550ba-vib
|
||||
- const: qcom,pmi632-vib
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -39,7 +39,9 @@ properties:
|
||||
- edt,edt-ft5406
|
||||
- edt,edt-ft5506
|
||||
- evervision,ev-ft5726
|
||||
- focaltech,ft5452
|
||||
- focaltech,ft6236
|
||||
- focaltech,ft8719
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -1,21 +0,0 @@
|
||||
Texas Instruments TWL family (twl4030) pwrbutton module
|
||||
|
||||
This module is part of the TWL4030. For more details about the whole
|
||||
chip see Documentation/devicetree/bindings/mfd/ti,twl.yaml.
|
||||
|
||||
This module provides a simple power button event via an Interrupt.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following
|
||||
- "ti,twl4030-pwrbutton": For controllers compatible with twl4030
|
||||
- interrupts: should be one of the following
|
||||
- <8>: For controllers compatible with twl4030
|
||||
|
||||
Example:
|
||||
|
||||
&twl {
|
||||
twl_pwrbutton: pwrbutton {
|
||||
compatible = "ti,twl4030-pwrbutton";
|
||||
interrupts = <8>;
|
||||
};
|
||||
};
|
||||
@ -27,9 +27,14 @@ properties:
|
||||
- qcom,pm8994-lpg
|
||||
- qcom,pmc8180c-lpg
|
||||
- qcom,pmi632-lpg
|
||||
- qcom,pmi8950-pwm
|
||||
- qcom,pmi8994-lpg
|
||||
- qcom,pmi8998-lpg
|
||||
- qcom,pmk8550-pwm
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,pm6150l-lpg
|
||||
- const: qcom,pm8150l-lpg
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,pm8550-pwm
|
||||
@ -142,6 +147,7 @@ allOf:
|
||||
- qcom,pm8941-lpg
|
||||
- qcom,pm8994-lpg
|
||||
- qcom,pmc8180c-lpg
|
||||
- qcom,pmi8950-pwm
|
||||
- qcom,pmi8994-lpg
|
||||
- qcom,pmi8998-lpg
|
||||
- qcom,pmk8550-pwm
|
||||
@ -290,5 +296,3 @@ examples:
|
||||
label = "blue";
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
140
Documentation/devicetree/bindings/leds/nxp,pca963x.yaml
Normal file
140
Documentation/devicetree/bindings/leds/nxp,pca963x.yaml
Normal file
@ -0,0 +1,140 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/leds/nxp,pca963x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP PCA963x LED controllers
|
||||
|
||||
maintainers:
|
||||
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
|
||||
description: |
|
||||
The NXP PCA963x are I2C-controlled LED drivers optimized for
|
||||
Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED is
|
||||
individually controllable and has its own PWM controller.
|
||||
|
||||
Datasheets are available at
|
||||
|
||||
- https://www.nxp.com/docs/en/data-sheet/PCA9632.pdf
|
||||
- https://www.nxp.com/docs/en/data-sheet/PCA9633.pdf
|
||||
- https://www.nxp.com/docs/en/data-sheet/PCA9634.pdf
|
||||
- https://www.nxp.com/docs/en/data-sheet/PCA9635.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nxp,pca9632
|
||||
- nxp,pca9633
|
||||
- nxp,pca9634
|
||||
- nxp,pca9635
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
nxp,hw-blink:
|
||||
type: boolean
|
||||
description:
|
||||
Use hardware blinking instead of software blinking
|
||||
|
||||
nxp,inverted-out:
|
||||
type: boolean
|
||||
description:
|
||||
Invert the polarity of the generated PWM.
|
||||
|
||||
nxp,period-scale:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
In some configurations, the chip blinks faster than expected. This
|
||||
parameter provides a scaling ratio (fixed point, decimal divided by 1000)
|
||||
to compensate, e.g. 1300=1.3x and 750=0.75x.
|
||||
|
||||
nxp,totem-pole:
|
||||
type: boolean
|
||||
description:
|
||||
Use totem pole (push-pull) instead of open-drain (pca9632 defaults to
|
||||
open-drain, newer chips to totem pole).
|
||||
|
||||
patternProperties:
|
||||
"^led@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: common.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- nxp,pca9632
|
||||
- nxp,pca9633
|
||||
then:
|
||||
patternProperties:
|
||||
"^led@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
maximum: 3
|
||||
else:
|
||||
patternProperties:
|
||||
"^led@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
maximum: 7
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led-controller@62 {
|
||||
compatible = "nxp,pca9632";
|
||||
reg = <0x62>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led@2 {
|
||||
reg = <2>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led@3 {
|
||||
reg = <3>;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@ -1,52 +0,0 @@
|
||||
LEDs connected to pca9632, pca9633 or pca9634
|
||||
|
||||
Required properties:
|
||||
- compatible : should be : "nxp,pca9632", "nxp,pca9633", "nxp,pca9634" or "nxp,pca9635"
|
||||
|
||||
Optional properties:
|
||||
- nxp,totem-pole : use totem pole (push-pull) instead of open-drain (pca9632 defaults
|
||||
to open-drain, newer chips to totem pole)
|
||||
- nxp,hw-blink : use hardware blinking instead of software blinking
|
||||
- nxp,period-scale : In some configurations, the chip blinks faster than expected.
|
||||
This parameter provides a scaling ratio (fixed point, decimal divided
|
||||
by 1000) to compensate, e.g. 1300=1.3x and 750=0.75x.
|
||||
- nxp,inverted-out: invert the polarity of the generated PWM
|
||||
|
||||
Each led is represented as a sub-node of the nxp,pca963x device.
|
||||
|
||||
LED sub-node properties:
|
||||
- label : (optional) see Documentation/devicetree/bindings/leds/common.txt
|
||||
- reg : number of LED line (could be from 0 to 3 in pca9632 or pca9633,
|
||||
0 to 7 in pca9634, or 0 to 15 in pca9635)
|
||||
- linux,default-trigger : (optional)
|
||||
see Documentation/devicetree/bindings/leds/common.txt
|
||||
|
||||
Examples:
|
||||
|
||||
pca9632: pca9632 {
|
||||
compatible = "nxp,pca9632";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x62>;
|
||||
|
||||
red@0 {
|
||||
label = "red";
|
||||
reg = <0>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
green@1 {
|
||||
label = "green";
|
||||
reg = <1>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
blue@2 {
|
||||
label = "blue";
|
||||
reg = <2>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
unused@3 {
|
||||
label = "unused";
|
||||
reg = <3>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
};
|
||||
224
Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml
Normal file
224
Documentation/devicetree/bindings/mailbox/arm,mhuv3.yaml
Normal file
@ -0,0 +1,224 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mailbox/arm,mhuv3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM MHUv3 Mailbox Controller
|
||||
|
||||
maintainers:
|
||||
- Sudeep Holla <sudeep.holla@arm.com>
|
||||
- Cristian Marussi <cristian.marussi@arm.com>
|
||||
|
||||
description: |
|
||||
The Arm Message Handling Unit (MHU) Version 3 is a mailbox controller that
|
||||
enables unidirectional communications with remote processors through various
|
||||
possible transport protocols.
|
||||
The controller can optionally support a varying number of extensions that, in
|
||||
turn, enable different kinds of transport to be used for communication.
|
||||
Number, type and characteristics of each supported extension can be discovered
|
||||
dynamically at runtime.
|
||||
|
||||
Given the unidirectional nature of the controller, an MHUv3 mailbox controller
|
||||
is composed of a MHU Sender (MHUS) containing a PostBox (PBX) block and a MHU
|
||||
Receiver (MHUR) containing a MailBox (MBX) block, where
|
||||
|
||||
PBX is used to
|
||||
- Configure the MHU
|
||||
- Send Transfers to the Receiver
|
||||
- Optionally receive acknowledgment of a Transfer from the Receiver
|
||||
|
||||
MBX is used to
|
||||
- Configure the MHU
|
||||
- Receive Transfers from the Sender
|
||||
- Optionally acknowledge Transfers sent by the Sender
|
||||
|
||||
Both PBX and MBX need to be present and defined in the DT description if you
|
||||
need to establish a bidirectional communication, since you will have to
|
||||
acquire two distinct unidirectional channels, one for each block.
|
||||
|
||||
As a consequence both blocks needs to be represented separately and specified
|
||||
as distinct DT nodes in order to properly describe their resources.
|
||||
|
||||
Note that, though, thanks to the runtime discoverability, there is no need to
|
||||
identify the type of blocks with distinct compatibles.
|
||||
|
||||
Following are the MHUv3 possible extensions.
|
||||
|
||||
- Doorbell Extension (DBE): DBE defines a type of channel called a Doorbell
|
||||
Channel (DBCH). DBCH enables a single bit Transfer to be sent from the
|
||||
Sender to Receiver. The Transfer indicates that an event has occurred.
|
||||
When DBE is implemented, the number of DBCHs that an implementation of the
|
||||
MHU can support is between 1 and 128, numbered starting from 0 in ascending
|
||||
order and discoverable at run-time.
|
||||
Each DBCH contains 32 individual fields, referred to as flags, each of which
|
||||
can be used independently. It is possible for the Sender to send multiple
|
||||
Transfers at once using a single DBCH, so long as each Transfer uses
|
||||
a different flag in the DBCH.
|
||||
Optionally, data may be transmitted through an out-of-band shared memory
|
||||
region, wherein the MHU Doorbell is used strictly as an interrupt generation
|
||||
mechanism, but this is out of the scope of these bindings.
|
||||
|
||||
- FastChannel Extension (FCE): FCE defines a type of channel called a Fast
|
||||
Channel (FCH). FCH is intended for lower overhead communication between
|
||||
Sender and Receiver at the expense of determinism. An FCH allows the Sender
|
||||
to update the channel value at any time, regardless of whether the previous
|
||||
value has been seen by the Receiver. When the Receiver reads the channel's
|
||||
content it gets the last value written to the channel.
|
||||
FCH is considered lossy in nature, and means that the Sender has no way of
|
||||
knowing if, or when, the Receiver will act on the Transfer.
|
||||
FCHs are expected to behave as RAM which generates interrupts when writes
|
||||
occur to the locations within the RAM.
|
||||
When FCE is implemented, the number of FCHs that an implementation of the
|
||||
MHU can support is between 1-1024, if the FastChannel word-size is 32-bits,
|
||||
or between 1-512, when the FastChannel word-size is 64-bits.
|
||||
FCHs are numbered from 0 in ascending order.
|
||||
Note that the number of FCHs and the word-size are implementation defined,
|
||||
not configurable but discoverable at run-time.
|
||||
Optionally, data may be transmitted through an out-of-band shared memory
|
||||
region, wherein the MHU FastChannel is used as an interrupt generation
|
||||
mechanism which carries also a pointer to such out-of-band data, but this
|
||||
is out of the scope of these bindings.
|
||||
|
||||
- FIFO Extension (FE): FE defines a Channel type called a FIFO Channel (FFCH).
|
||||
FFCH allows a Sender to send
|
||||
- Multiple Transfers to the Receiver without having to wait for the
|
||||
previous Transfer to be acknowledged by the Receiver, as long as the
|
||||
FIFO has room for the Transfer.
|
||||
- Transfers which require the Receiver to provide acknowledgment.
|
||||
- Transfers which have in-band payload.
|
||||
In all cases, the data is guaranteed to be observed by the Receiver in the
|
||||
same order which the Sender sent it.
|
||||
When FE is implemented, the number of FFCHs that an implementation of the
|
||||
MHU can support is between 1 and 64, numbered starting from 0 in ascending
|
||||
order. The number of FFCHs, their depth (same for all implemented FFCHs) and
|
||||
the access-granularity are implementation defined, not configurable but
|
||||
discoverable at run-time.
|
||||
Optionally, additional data may be transmitted through an out-of-band shared
|
||||
memory region, wherein the MHU FIFO is used to transmit, in order, a small
|
||||
part of the payload (like a header) and a reference to the shared memory
|
||||
area holding the remaining, bigger, chunk of the payload, but this is out of
|
||||
the scope of these bindings.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,mhuv3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 74
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
The MHUv3 controller generates a number of events some of which are used
|
||||
to generate interrupts; as a consequence it can expose a varying number of
|
||||
optional PBX/MBX interrupts, representing the events generated during the
|
||||
operation of the various transport protocols associated with different
|
||||
extensions. All interrupts of the MHU are level-sensitive.
|
||||
Some of these optional interrupts are defined per-channel, where the
|
||||
number of channels effectively available is implementation defined and
|
||||
run-time discoverable.
|
||||
In the following names are enumerated using patterns, with per-channel
|
||||
interrupts implicitly capped at the maximum channels allowed by the
|
||||
specification for each extension type.
|
||||
For the sake of simplicity maxItems is anyway capped to a most plausible
|
||||
number, assuming way less channels would be implemented than actually
|
||||
possible.
|
||||
|
||||
The only mandatory interrupts on the MHU are:
|
||||
- combined
|
||||
- mbx-fch-xfer-<N> but only if mbx-fcgrp-xfer-<N> is not implemented.
|
||||
|
||||
minItems: 1
|
||||
maxItems: 74
|
||||
items:
|
||||
oneOf:
|
||||
- const: combined
|
||||
description: PBX/MBX Combined interrupt
|
||||
- const: combined-ffch
|
||||
description: PBX/MBX FIFO Combined interrupt
|
||||
- pattern: '^ffch-low-tide-[0-9]+$'
|
||||
description: PBX/MBX FIFO Channel <N> Low Tide interrupt
|
||||
- pattern: '^ffch-high-tide-[0-9]+$'
|
||||
description: PBX/MBX FIFO Channel <N> High Tide interrupt
|
||||
- pattern: '^ffch-flush-[0-9]+$'
|
||||
description: PBX/MBX FIFO Channel <N> Flush interrupt
|
||||
- pattern: '^mbx-dbch-xfer-[0-9]+$'
|
||||
description: MBX Doorbell Channel <N> Transfer interrupt
|
||||
- pattern: '^mbx-fch-xfer-[0-9]+$'
|
||||
description: MBX FastChannel <N> Transfer interrupt
|
||||
- pattern: '^mbx-fchgrp-xfer-[0-9]+$'
|
||||
description: MBX FastChannel <N> Group Transfer interrupt
|
||||
- pattern: '^mbx-ffch-xfer-[0-9]+$'
|
||||
description: MBX FIFO Channel <N> Transfer interrupt
|
||||
- pattern: '^pbx-dbch-xfer-ack-[0-9]+$'
|
||||
description: PBX Doorbell Channel <N> Transfer Ack interrupt
|
||||
- pattern: '^pbx-ffch-xfer-ack-[0-9]+$'
|
||||
description: PBX FIFO Channel <N> Transfer Ack interrupt
|
||||
|
||||
'#mbox-cells':
|
||||
description: |
|
||||
The first argument in the consumers 'mboxes' property represents the
|
||||
extension type, the second is for the channel number while the third
|
||||
depends on extension type.
|
||||
|
||||
Extension types constants are defined in <dt-bindings/arm/mhuv3-dt.h>.
|
||||
|
||||
Extension type for DBE is DBE_EXT and the third parameter represents the
|
||||
doorbell flag number to use.
|
||||
Extension type for FCE is FCE_EXT, third parameter unused.
|
||||
Extension type for FE is FE_EXT, third parameter unused.
|
||||
|
||||
mboxes = <&mhu DBE_EXT 0 5>; // DBE, Doorbell Channel Window 0, doorbell 5.
|
||||
mboxes = <&mhu DBE_EXT 7>; // DBE, Doorbell Channel Window 1, doorbell 7.
|
||||
mboxes = <&mhu FCE_EXT 0 0>; // FCE, FastChannel Window 0.
|
||||
mboxes = <&mhu FCE_EXT 3 0>; // FCE, FastChannel Window 3.
|
||||
mboxes = <&mhu FE_EXT 1 0>; // FE, FIFO Channel Window 1.
|
||||
mboxes = <&mhu FE_EXT 7 0>; // FE, FIFO Channel Window 7.
|
||||
const: 3
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- '#mbox-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
mailbox@2aaa0000 {
|
||||
compatible = "arm,mhuv3";
|
||||
#mbox-cells = <3>;
|
||||
reg = <0 0x2aaa0000 0 0x10000>;
|
||||
clocks = <&clock 0>;
|
||||
interrupt-names = "combined", "pbx-dbch-xfer-ack-1",
|
||||
"ffch-high-tide-0";
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
mailbox@2ab00000 {
|
||||
compatible = "arm,mhuv3";
|
||||
#mbox-cells = <3>;
|
||||
reg = <0 0x2aab0000 0 0x10000>;
|
||||
clocks = <&clock 0>;
|
||||
interrupt-names = "combined", "mbx-dbch-xfer-1", "ffch-low-tide-0";
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
@ -30,6 +30,7 @@ properties:
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,msm8974-apcs-kpss-global
|
||||
- qcom,msm8976-apcs-kpss-global
|
||||
- const: qcom,msm8994-apcs-kpss-global
|
||||
- const: syscon
|
||||
|
||||
@ -28,6 +28,7 @@ properties:
|
||||
- qcom,sa8775p-ipcc
|
||||
- qcom,sc7280-ipcc
|
||||
- qcom,sc8280xp-ipcc
|
||||
- qcom,sdx75-ipcc
|
||||
- qcom,sm6350-ipcc
|
||||
- qcom,sm6375-ipcc
|
||||
- qcom,sm8250-ipcc
|
||||
|
||||
@ -21,7 +21,7 @@ description: |
|
||||
regulators.
|
||||
|
||||
allOf:
|
||||
- $ref: ../input/input.yaml
|
||||
- $ref: /schemas/input/input.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
@ -57,7 +57,7 @@ properties:
|
||||
|
||||
switchldo1:
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml
|
||||
$ref: /schemas/regulator/regulator.yaml
|
||||
|
||||
properties:
|
||||
regulator-name: true
|
||||
@ -76,7 +76,7 @@ properties:
|
||||
|
||||
"^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml
|
||||
$ref: /schemas/regulator/regulator.yaml
|
||||
|
||||
properties:
|
||||
regulator-name: true
|
||||
|
||||
@ -20,7 +20,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
"^.*_(clk|rst)$":
|
||||
"^.*-(clk|rst)$":
|
||||
type: object
|
||||
unevaluatedProperties: false
|
||||
|
||||
@ -171,7 +171,7 @@ examples:
|
||||
compatible = "allwinner,sun6i-a31-prcm";
|
||||
reg = <0x01f01400 0x200>;
|
||||
|
||||
ar100: ar100_clk {
|
||||
ar100: ar100-clk {
|
||||
compatible = "allwinner,sun6i-a31-ar100-clk";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&rtc 0>, <&osc24M>,
|
||||
@ -180,7 +180,7 @@ examples:
|
||||
clock-output-names = "ar100";
|
||||
};
|
||||
|
||||
ahb0: ahb0_clk {
|
||||
ahb0: ahb0-clk {
|
||||
compatible = "fixed-factor-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-div = <1>;
|
||||
@ -189,14 +189,14 @@ examples:
|
||||
clock-output-names = "ahb0";
|
||||
};
|
||||
|
||||
apb0: apb0_clk {
|
||||
apb0: apb0-clk {
|
||||
compatible = "allwinner,sun6i-a31-apb0-clk";
|
||||
#clock-cells = <0>;
|
||||
clocks = <&ahb0>;
|
||||
clock-output-names = "apb0";
|
||||
};
|
||||
|
||||
apb0_gates: apb0_gates_clk {
|
||||
apb0_gates: apb0-gates-clk {
|
||||
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
|
||||
#clock-cells = <1>;
|
||||
clocks = <&apb0>;
|
||||
@ -206,14 +206,14 @@ examples:
|
||||
"apb0_i2c";
|
||||
};
|
||||
|
||||
ir_clk: ir_clk {
|
||||
ir_clk: ir-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "allwinner,sun4i-a10-mod0-clk";
|
||||
clocks = <&rtc 0>, <&osc24M>;
|
||||
clock-output-names = "ir";
|
||||
};
|
||||
|
||||
apb0_rst: apb0_rst {
|
||||
apb0_rst: apb0-rst {
|
||||
compatible = "allwinner,sun6i-a31-clock-reset";
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
@ -47,10 +47,18 @@ patternProperties:
|
||||
type: object
|
||||
|
||||
'^pinctrl(@[0-9a-f]+)?$':
|
||||
oneOf:
|
||||
- $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml
|
||||
- $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml
|
||||
- $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml
|
||||
type: object
|
||||
additionalProperties: true
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- aspeed,ast2400-pinctrl
|
||||
- aspeed,ast2500-pinctrl
|
||||
- aspeed,ast2600-pinctrl
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
'^interrupt-controller@[0-9a-f]+$':
|
||||
description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
|
||||
|
||||
@ -34,19 +34,19 @@ properties:
|
||||
|
||||
patternProperties:
|
||||
'^clock-controller@[a-f0-9]+$':
|
||||
$ref: ../clock/brcm,iproc-clocks.yaml
|
||||
$ref: /schemas/clock/brcm,iproc-clocks.yaml
|
||||
|
||||
'^phy@[a-f0-9]+$':
|
||||
$ref: ../phy/bcm-ns-usb2-phy.yaml
|
||||
$ref: /schemas/phy/bcm-ns-usb2-phy.yaml
|
||||
|
||||
'^pinctrl@[a-f0-9]+$':
|
||||
$ref: ../pinctrl/brcm,ns-pinmux.yaml
|
||||
$ref: /schemas/pinctrl/brcm,ns-pinmux.yaml
|
||||
|
||||
'^syscon@[a-f0-9]+$':
|
||||
$ref: syscon.yaml
|
||||
|
||||
'^thermal@[a-f0-9]+$':
|
||||
$ref: ../thermal/brcm,ns-thermal.yaml
|
||||
$ref: /schemas/thermal/brcm,ns-thermal.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -1,16 +0,0 @@
|
||||
Broadcom iProc Chip Device Resource Unit (CDRU)
|
||||
|
||||
Various Broadcom iProc SoCs have a set of registers that provide various
|
||||
chip specific device and resource configurations. This node allows access to
|
||||
these CDRU registers via syscon.
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain:
|
||||
"brcm,sr-cdru", "syscon" for Stingray
|
||||
- reg: base address and range of the CDRU registers
|
||||
|
||||
Example:
|
||||
cdru: syscon@6641d000 {
|
||||
compatible = "brcm,sr-cdru", "syscon";
|
||||
reg = <0 0x6641d000 0 0x400>;
|
||||
};
|
||||
@ -1,18 +0,0 @@
|
||||
Broadcom iProc Multi Host Bridge (MHB)
|
||||
|
||||
Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls
|
||||
the connection and configuration of 1) internal PCIe serdes; 2) PCIe endpoint
|
||||
interface; 3) access to the Nitro (network processing) engine
|
||||
|
||||
This node allows access to these MHB registers via syscon.
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain:
|
||||
"brcm,sr-mhb", "syscon" for Stingray
|
||||
- reg: base address and range of the MHB registers
|
||||
|
||||
Example:
|
||||
mhb: syscon@60401000 {
|
||||
compatible = "brcm,sr-mhb", "syscon";
|
||||
reg = <0 0x60401000 0 0x38c>;
|
||||
};
|
||||
@ -33,7 +33,7 @@ properties:
|
||||
|
||||
patternProperties:
|
||||
'^reset-controller@[a-f0-9]+$':
|
||||
$ref: ../reset/brcm,bcm4908-misc-pcie-reset.yaml
|
||||
$ref: /schemas/reset/brcm,bcm4908-misc-pcie-reset.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -36,7 +36,7 @@ properties:
|
||||
clock-controller:
|
||||
# Child node
|
||||
type: object
|
||||
$ref: ../clock/canaan,k210-clk.yaml
|
||||
$ref: /schemas/clock/canaan,k210-clk.yaml
|
||||
description:
|
||||
Clock controller for the SoC clocks. This child node definition
|
||||
should follow the bindings specified in
|
||||
@ -45,7 +45,7 @@ properties:
|
||||
reset-controller:
|
||||
# Child node
|
||||
type: object
|
||||
$ref: ../reset/canaan,k210-rst.yaml
|
||||
$ref: /schemas/reset/canaan,k210-rst.yaml
|
||||
description:
|
||||
Reset controller for the SoC. This child node definition
|
||||
should follow the bindings specified in
|
||||
@ -54,7 +54,7 @@ properties:
|
||||
syscon-reboot:
|
||||
# Child node
|
||||
type: object
|
||||
$ref: ../power/reset/syscon-reboot.yaml
|
||||
$ref: /schemas/power/reset/syscon-reboot.yaml
|
||||
description:
|
||||
Reboot method for the SoC. This child node definition
|
||||
should follow the bindings specified in
|
||||
|
||||
@ -42,10 +42,10 @@ required:
|
||||
|
||||
patternProperties:
|
||||
"^gpio(@[0-9a-f]+)?$":
|
||||
$ref: ../gpio/delta,tn48m-gpio.yaml
|
||||
$ref: /schemas/gpio/delta,tn48m-gpio.yaml
|
||||
|
||||
"^reset-controller?$":
|
||||
$ref: ../reset/delta,tn48m-reset.yaml
|
||||
$ref: /schemas/reset/delta,tn48m-reset.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@ -38,10 +38,10 @@ properties:
|
||||
device name with ".bin" as the extension (e.g. iqs620a.bin for IQS620A).
|
||||
|
||||
keys:
|
||||
$ref: ../input/iqs62x-keys.yaml
|
||||
$ref: /schemas/input/iqs62x-keys.yaml
|
||||
|
||||
pwm:
|
||||
$ref: ../pwm/iqs620a-pwm.yaml
|
||||
$ref: /schemas/pwm/iqs620a-pwm.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -39,19 +39,19 @@ properties:
|
||||
|
||||
patternProperties:
|
||||
"^gpio(@[0-9a-f]+)?$":
|
||||
$ref: ../gpio/kontron,sl28cpld-gpio.yaml
|
||||
$ref: /schemas/gpio/kontron,sl28cpld-gpio.yaml
|
||||
|
||||
"^hwmon(@[0-9a-f]+)?$":
|
||||
$ref: ../hwmon/kontron,sl28cpld-hwmon.yaml
|
||||
$ref: /schemas/hwmon/kontron,sl28cpld-hwmon.yaml
|
||||
|
||||
"^interrupt-controller(@[0-9a-f]+)?$":
|
||||
$ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml
|
||||
$ref: /schemas/interrupt-controller/kontron,sl28cpld-intc.yaml
|
||||
|
||||
"^pwm(@[0-9a-f]+)?$":
|
||||
$ref: ../pwm/kontron,sl28cpld-pwm.yaml
|
||||
$ref: /schemas/pwm/kontron,sl28cpld-pwm.yaml
|
||||
|
||||
"^watchdog(@[0-9a-f]+)?$":
|
||||
$ref: ../watchdog/kontron,sl28cpld-wdt.yaml
|
||||
$ref: /schemas/watchdog/kontron,sl28cpld-wdt.yaml
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
|
||||
@ -1,67 +0,0 @@
|
||||
TI LP873X PMIC MFD driver
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,lp8732", "ti,lp8733"
|
||||
- reg: I2C slave address.
|
||||
- gpio-controller: Marks the device node as a GPIO Controller.
|
||||
- #gpio-cells: Should be two. The first cell is the pin number and
|
||||
the second cell is used to specify flags.
|
||||
See ../gpio/gpio.txt for more information.
|
||||
- xxx-in-supply: Phandle to parent supply node of each regulator
|
||||
populated under regulators node. xxx can be
|
||||
buck0, buck1, ldo0 or ldo1.
|
||||
- regulators: List of child nodes that specify the regulator
|
||||
initialization data.
|
||||
Example:
|
||||
|
||||
pmic: lp8733@60 {
|
||||
compatible = "ti,lp8733";
|
||||
reg = <0x60>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
buck0-in-supply = <&vsys_3v3>;
|
||||
buck1-in-supply = <&vsys_3v3>;
|
||||
ldo0-in-supply = <&vsys_3v3>;
|
||||
ldo1-in-supply = <&vsys_3v3>;
|
||||
|
||||
regulators {
|
||||
lp8733_buck0: buck0 {
|
||||
regulator-name = "lp8733-buck0";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-min-microamp = <1500000>;
|
||||
regulator-max-microamp = <4000000>;
|
||||
regulator-ramp-delay = <10000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lp8733_buck1: buck1 {
|
||||
regulator-name = "lp8733-buck1";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-min-microamp = <1500000>;
|
||||
regulator-max-microamp = <4000000>;
|
||||
regulator-ramp-delay = <10000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8733_ldo0: ldo0 {
|
||||
regulator-name = "lp8733-ldo0";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8733_ldo1: ldo1 {
|
||||
regulator-name = "lp8733-ldo1";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -53,16 +53,16 @@ properties:
|
||||
Single string containing the name of the GPIO line.
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/max77650-regulator.yaml
|
||||
$ref: /schemas/regulator/max77650-regulator.yaml
|
||||
|
||||
charger:
|
||||
$ref: ../power/supply/max77650-charger.yaml
|
||||
$ref: /schemas/power/supply/max77650-charger.yaml
|
||||
|
||||
leds:
|
||||
$ref: ../leds/leds-max77650.yaml
|
||||
$ref: /schemas/leds/leds-max77650.yaml
|
||||
|
||||
onkey:
|
||||
$ref: ../input/max77650-onkey.yaml
|
||||
$ref: /schemas/input/max77650-onkey.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -35,7 +35,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
voltage-regulators:
|
||||
$ref: ../regulator/maxim,max77686.yaml
|
||||
$ref: /schemas/regulator/maxim,max77686.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -81,7 +81,7 @@ properties:
|
||||
- pwms
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/maxim,max77693.yaml
|
||||
$ref: /schemas/regulator/maxim,max77693.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -160,6 +160,10 @@ patternProperties:
|
||||
type: object
|
||||
$ref: /schemas/nvmem/qcom,spmi-sdam.yaml#
|
||||
|
||||
"^pbs@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: /schemas/soc/qcom/qcom,pbs.yaml#
|
||||
|
||||
"phy@[0-9a-f]+$":
|
||||
type: object
|
||||
$ref: /schemas/phy/qcom,snps-eusb2-repeater.yaml#
|
||||
|
||||
@ -28,6 +28,7 @@ properties:
|
||||
- qcom,sdm845-tcsr
|
||||
- qcom,sdx55-tcsr
|
||||
- qcom,sdx65-tcsr
|
||||
- qcom,sdx75-tcsr
|
||||
- qcom,sm4450-tcsr
|
||||
- qcom,sm6115-tcsr
|
||||
- qcom,sm8150-tcsr
|
||||
|
||||
@ -19,6 +19,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,pm8058
|
||||
- qcom,pm8821
|
||||
- qcom,pm8901
|
||||
- qcom,pm8921
|
||||
- items:
|
||||
- enum:
|
||||
|
||||
@ -37,10 +37,10 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/richtek,rt4831-regulator.yaml
|
||||
$ref: /schemas/regulator/richtek,rt4831-regulator.yaml
|
||||
|
||||
backlight:
|
||||
$ref: ../leds/backlight/richtek,rt4831-backlight.yaml
|
||||
$ref: /schemas/leds/backlight/richtek,rt4831-backlight.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -28,7 +28,7 @@ allOf:
|
||||
regulators:
|
||||
patternProperties:
|
||||
"^(DCDC[1-4]|LDO[1-5]|LDORTC[12])$":
|
||||
$ref: ../regulator/regulator.yaml
|
||||
$ref: /schemas/regulator/regulator.yaml
|
||||
additionalProperties: false
|
||||
- if:
|
||||
properties:
|
||||
@ -40,7 +40,7 @@ allOf:
|
||||
regulators:
|
||||
patternProperties:
|
||||
"^(DCDC[1-3]|LDO[1-5]|LDORTC[12])$":
|
||||
$ref: ../regulator/regulator.yaml
|
||||
$ref: /schemas/regulator/regulator.yaml
|
||||
additionalProperties: false
|
||||
- if:
|
||||
properties:
|
||||
@ -52,7 +52,7 @@ allOf:
|
||||
regulators:
|
||||
patternProperties:
|
||||
"^(DCDC[1-5]|LDO[1-9]|LDO10|LDORTC[12])$":
|
||||
$ref: ../regulator/regulator.yaml
|
||||
$ref: /schemas/regulator/regulator.yaml
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
|
||||
@ -82,7 +82,7 @@ properties:
|
||||
patternProperties:
|
||||
"^(DCDC_REG[1-4]|LDO_REG[1-3])$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
||||
@ -109,7 +109,7 @@ properties:
|
||||
patternProperties:
|
||||
"^(DCDC_REG[1-4]|LDO_REG[1-8]|SWITCH_REG[1-2])$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
||||
274
Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml
Normal file
274
Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml
Normal file
@ -0,0 +1,274 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mfd/rockchip,rk816.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: RK816 Power Management Integrated Circuit
|
||||
|
||||
maintainers:
|
||||
- Chris Zhong <zyw@rock-chips.com>
|
||||
- Zhang Qing <zhangqing@rock-chips.com>
|
||||
|
||||
description:
|
||||
Rockchip RK816 series PMIC. This device consists of an i2c controlled MFD
|
||||
that includes regulators, a RTC, a GPIO controller, a power button, and a
|
||||
battery charger manager with fuel gauge.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- rockchip,rk816
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
description:
|
||||
See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
|
||||
const: 1
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 2
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
system-power-controller:
|
||||
type: boolean
|
||||
description:
|
||||
Telling whether or not this PMIC is controlling the system power.
|
||||
|
||||
wakeup-source:
|
||||
type: boolean
|
||||
|
||||
vcc1-supply:
|
||||
description:
|
||||
The input supply for dcdc1.
|
||||
|
||||
vcc2-supply:
|
||||
description:
|
||||
The input supply for dcdc2.
|
||||
|
||||
vcc3-supply:
|
||||
description:
|
||||
The input supply for dcdc3.
|
||||
|
||||
vcc4-supply:
|
||||
description:
|
||||
The input supply for dcdc4.
|
||||
|
||||
vcc5-supply:
|
||||
description:
|
||||
The input supply for ldo1, ldo2, and ldo3.
|
||||
|
||||
vcc6-supply:
|
||||
description:
|
||||
The input supply for ldo4, ldo5, and ldo6.
|
||||
|
||||
vcc7-supply:
|
||||
description:
|
||||
The input supply for boost.
|
||||
|
||||
vcc8-supply:
|
||||
description:
|
||||
The input supply for otg-switch.
|
||||
|
||||
regulators:
|
||||
type: object
|
||||
patternProperties:
|
||||
'^(boost|dcdc[1-4]|ldo[1-6]|otg-switch)$':
|
||||
type: object
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
'-pins$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
$ref: /schemas/pinctrl/pinmux-node.yaml
|
||||
|
||||
properties:
|
||||
function:
|
||||
enum: [gpio, thermistor]
|
||||
|
||||
pins:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
const: gpio0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rk816: pmic@1a {
|
||||
compatible = "rockchip,rk816";
|
||||
reg = <0x1a>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
||||
clock-output-names = "xin32k", "rk816-clkout2";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_int_l>;
|
||||
gpio-controller;
|
||||
system-power-controller;
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
vcc1-supply = <&vcc_sys>;
|
||||
vcc2-supply = <&vcc_sys>;
|
||||
vcc3-supply = <&vcc_sys>;
|
||||
vcc4-supply = <&vcc_sys>;
|
||||
vcc5-supply = <&vcc33_io>;
|
||||
vcc6-supply = <&vcc_sys>;
|
||||
|
||||
regulators {
|
||||
vdd_cpu: dcdc1 {
|
||||
regulator-name = "vdd_cpu";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1450000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <1>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_logic: dcdc2 {
|
||||
regulator-name = "vdd_logic";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <1>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: dcdc3 {
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-initial-mode = <1>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc33_io: dcdc4 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc33_io";
|
||||
regulator-initial-mode = <1>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_pmu: ldo1 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_tp: ldo2 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc_tp";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_10: ldo3 {
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-name = "vdd_10";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc18_lcd: ldo4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc18_lcd";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: ldo5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd10_lcd: ldo6 {
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-name = "vdd10_lcd";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rk816_gpio_pins: gpio-pins {
|
||||
function = "gpio";
|
||||
pins = "gpio0";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -91,7 +91,7 @@ properties:
|
||||
"^(LDO_REG[1-9]|DCDC_REG[1-4]|BOOST|OTG_SWITCH)$":
|
||||
type: object
|
||||
unevaluatedProperties: false
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
clocks:
|
||||
|
||||
@ -101,7 +101,7 @@ properties:
|
||||
patternProperties:
|
||||
"^(DCDC_REG[1-4]|DCDC_BOOST|LDO_REG[1-9]|SWITCH_REG|HDMI_SWITCH|OTG_SWITCH)$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
||||
@ -61,7 +61,7 @@ properties:
|
||||
default: 30000000
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/rohm,bd71815-regulator.yaml
|
||||
$ref: /schemas/regulator/rohm,bd71815-regulator.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -17,7 +17,12 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rohm,bd71828
|
||||
oneOf:
|
||||
- const: rohm,bd71828
|
||||
|
||||
- items:
|
||||
- const: rohm,bd71879
|
||||
- const: rohm,bd71828
|
||||
|
||||
reg:
|
||||
description:
|
||||
@ -60,12 +65,12 @@ properties:
|
||||
here in Ohms.
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/rohm,bd71828-regulator.yaml
|
||||
$ref: /schemas/regulator/rohm,bd71828-regulator.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
leds:
|
||||
$ref: ../leds/rohm,bd71828-leds.yaml
|
||||
$ref: /schemas/leds/rohm,bd71828-leds.yaml
|
||||
|
||||
gpio-reserved-ranges:
|
||||
description: |
|
||||
@ -73,6 +78,8 @@ properties:
|
||||
used to mark the pins which should not be configured for GPIO. Please see
|
||||
the ../gpio/gpio.txt for more information.
|
||||
|
||||
system-power-controller: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -109,7 +109,7 @@ properties:
|
||||
- 14000
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/rohm,bd71837-regulator.yaml
|
||||
$ref: /schemas/regulator/rohm,bd71837-regulator.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -67,7 +67,7 @@ properties:
|
||||
patternProperties:
|
||||
"^(vd09|vd18|vd25|vd33|dvfs)$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
|
||||
properties:
|
||||
regulator-name:
|
||||
|
||||
@ -71,7 +71,7 @@ properties:
|
||||
# (HW) minimum for max timeout is 4ms, maximum 4416 ms.
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/rohm,bd9576-regulator.yaml
|
||||
$ref: /schemas/regulator/rohm,bd9576-regulator.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -27,7 +27,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mpa01.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mpa01.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -27,7 +27,7 @@ properties:
|
||||
- samsung,s2mpu02-pmic
|
||||
|
||||
clocks:
|
||||
$ref: ../clock/samsung,s2mps11.yaml
|
||||
$ref: /schemas/clock/samsung,s2mps11.yaml
|
||||
description:
|
||||
Child node describing clock provider.
|
||||
|
||||
@ -75,7 +75,7 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mps11.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mps11.yaml
|
||||
samsung,s2mps11-wrstbi-ground: false
|
||||
|
||||
- if:
|
||||
@ -86,7 +86,7 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mps13.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mps13.yaml
|
||||
samsung,s2mps11-acokb-ground: false
|
||||
|
||||
- if:
|
||||
@ -97,7 +97,7 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mps14.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mps14.yaml
|
||||
samsung,s2mps11-acokb-ground: false
|
||||
samsung,s2mps11-wrstbi-ground: false
|
||||
|
||||
@ -109,7 +109,7 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mps15.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mps15.yaml
|
||||
samsung,s2mps11-acokb-ground: false
|
||||
samsung,s2mps11-wrstbi-ground: false
|
||||
|
||||
@ -121,7 +121,7 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s2mpu02.yaml
|
||||
$ref: /schemas/regulator/samsung,s2mpu02.yaml
|
||||
samsung,s2mps11-acokb-ground: false
|
||||
samsung,s2mps11-wrstbi-ground: false
|
||||
|
||||
|
||||
@ -21,7 +21,7 @@ properties:
|
||||
const: samsung,s5m8767-pmic
|
||||
|
||||
clocks:
|
||||
$ref: ../clock/samsung,s2mps11.yaml
|
||||
$ref: /schemas/clock/samsung,s2mps11.yaml
|
||||
description:
|
||||
Child node describing clock provider.
|
||||
|
||||
@ -32,7 +32,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
regulators:
|
||||
$ref: ../regulator/samsung,s5m8767.yaml
|
||||
$ref: /schemas/regulator/samsung,s5m8767.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
|
||||
@ -60,7 +60,7 @@ properties:
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: ../pinctrl/pinmux-node.yaml
|
||||
- $ref: /schemas/pinctrl/pinmux-node.yaml
|
||||
|
||||
properties:
|
||||
pins: true
|
||||
|
||||
@ -29,7 +29,7 @@ properties:
|
||||
onkey:
|
||||
type: object
|
||||
|
||||
$ref: ../input/input.yaml
|
||||
$ref: /schemas/input/input.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
@ -67,7 +67,7 @@ properties:
|
||||
watchdog:
|
||||
type: object
|
||||
|
||||
$ref: ../watchdog/watchdog.yaml
|
||||
$ref: /schemas/watchdog/watchdog.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user