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cxl: Ensure PSL interrupt is configured for contexts with no AFU IRQs
In the cxl kernel API, it is possible to create a context and start it without allocating any interrupts. Since we assign or allocate the PSL interrupt when allocating AFU interrupts this will lead to a situation where we start the context with no means to take any faults. The user API is not affected as it always goes through the cxl interrupt allocation code paths and will have the PSL interrupt allocated or assigned, even if no AFU interrupts were requested. This checks that at least one interrupt is configured at the time of attach, and if not it will assign the multiplexed PSL interrupt for powernv, or allocate a single interrupt for PowerVM. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -552,6 +552,17 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
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elem->common.sstp0 = cpu_to_be64(ctx->sstp0);
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elem->common.sstp1 = cpu_to_be64(ctx->sstp1);
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/*
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* Ensure we have at least one interrupt allocated to take faults for
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* kernel contexts that may not have allocated any AFU IRQs at all:
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*/
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if (ctx->irqs.range[0] == 0) {
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rc = afu_register_irqs(ctx, 0);
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if (rc)
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goto out_free;
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}
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for (r = 0; r < CXL_IRQ_RANGES; r++) {
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for (i = 0; i < ctx->irqs.range[r]; i++) {
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if (r == 0 && i == 0) {
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@ -597,6 +608,7 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
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enable_afu_irqs(ctx);
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}
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out_free:
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free_page((u64)elem);
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return rc;
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}
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@ -534,6 +534,15 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr)
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ctx->elem->common.sstp0 = cpu_to_be64(ctx->sstp0);
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ctx->elem->common.sstp1 = cpu_to_be64(ctx->sstp1);
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/*
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* Ensure we have the multiplexed PSL interrupt set up to take faults
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* for kernel contexts that may not have allocated any AFU IRQs at all:
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*/
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if (ctx->irqs.range[0] == 0) {
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ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq;
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ctx->irqs.range[0] = 1;
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}
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for (r = 0; r < CXL_IRQ_RANGES; r++) {
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ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]);
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ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]);
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