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bpf, tests: Add more BPF_LSH/RSH/ARSH tests for ALU64
This patch adds a number of tests for BPF_LSH, BPF_RSH amd BPF_ARSH ALU64 operations with values that may trigger different JIT code paths. Mainly testing 32-bit JITs that implement ALU64 operations with two 32-bit CPU registers per operand. Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20210809091829.810076-7-johan.almbladh@anyfinetworks.com
This commit is contained in:
Johan Almbladh
Daniel Borkmann
parent
0f2fca1ab1
commit
3b9890ef80
544
lib/test_bpf.c
544
lib/test_bpf.c
@ -4139,6 +4139,106 @@ static struct bpf_test tests[] = {
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{ },
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{ { 0, 0x80000000 } },
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},
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{
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"ALU64_LSH_X: Shift < 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0xbcdef000 } }
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},
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{
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"ALU64_LSH_X: Shift < 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x3456789a } }
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},
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{
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"ALU64_LSH_X: Shift > 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 36),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_LSH_X: Shift > 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 36),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x9abcdef0 } }
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},
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{
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"ALU64_LSH_X: Shift == 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 32),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_LSH_X: Shift == 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 32),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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{
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"ALU64_LSH_X: Zero shift, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 0),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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{
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"ALU64_LSH_X: Zero shift, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 0),
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BPF_ALU64_REG(BPF_LSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x01234567 } }
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},
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/* BPF_ALU | BPF_LSH | BPF_K */
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{
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"ALU_LSH_K: 1 << 1 = 2",
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@ -4206,6 +4306,86 @@ static struct bpf_test tests[] = {
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{ },
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{ { 0, 0x80000000 } },
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},
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{
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"ALU64_LSH_K: Shift < 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 12),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0xbcdef000 } }
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},
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{
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"ALU64_LSH_K: Shift < 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 12),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x3456789a } }
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},
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{
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"ALU64_LSH_K: Shift > 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 36),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_LSH_K: Shift > 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 36),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x9abcdef0 } }
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},
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{
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"ALU64_LSH_K: Shift == 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_LSH_K: Shift == 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 32),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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{
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"ALU64_LSH_K: Zero shift",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_LSH, R0, 0),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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/* BPF_ALU | BPF_RSH | BPF_X */
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{
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"ALU_RSH_X: 2 >> 1 = 1",
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@ -4267,6 +4447,106 @@ static struct bpf_test tests[] = {
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{ },
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{ { 0, 1 } },
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},
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{
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"ALU64_RSH_X: Shift < 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x56789abc } }
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},
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{
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"ALU64_RSH_X: Shift < 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x00081234 } }
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},
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{
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"ALU64_RSH_X: Shift > 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 36),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x08123456 } }
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},
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{
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"ALU64_RSH_X: Shift > 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 36),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_RSH_X: Shift == 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 32),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x81234567 } }
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},
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{
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"ALU64_RSH_X: Shift == 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 32),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_RSH_X: Zero shift, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 0),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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{
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"ALU64_RSH_X: Zero shift, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 0),
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BPF_ALU64_REG(BPF_RSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x81234567 } }
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},
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/* BPF_ALU | BPF_RSH | BPF_K */
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{
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"ALU_RSH_K: 2 >> 1 = 1",
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@ -4334,6 +4614,86 @@ static struct bpf_test tests[] = {
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{ },
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{ { 0, 1 } },
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},
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{
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"ALU64_RSH_K: Shift < 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 12),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x56789abc } }
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},
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{
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"ALU64_RSH_K: Shift < 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 12),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x00081234 } }
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},
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{
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"ALU64_RSH_K: Shift > 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 36),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x08123456 } }
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},
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{
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"ALU64_RSH_K: Shift > 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 36),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_RSH_K: Shift == 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x81234567 } }
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},
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{
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"ALU64_RSH_K: Shift == 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0 } }
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},
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{
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"ALU64_RSH_K: Zero shift",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x0123456789abcdefLL),
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BPF_ALU64_IMM(BPF_RSH, R0, 0),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x89abcdef } }
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},
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/* BPF_ALU | BPF_ARSH | BPF_X */
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{
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"ALU32_ARSH_X: -1234 >> 7 = -10",
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@ -4348,7 +4708,7 @@ static struct bpf_test tests[] = {
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{ { 0, -10 } }
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},
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{
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"ALU_ARSH_X: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
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"ALU64_ARSH_X: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0xff00ff0000000000LL),
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BPF_ALU32_IMM(BPF_MOV, R1, 40),
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@ -4359,6 +4719,106 @@ static struct bpf_test tests[] = {
|
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{ },
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{ { 0, 0xffff00ff } },
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},
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{
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"ALU64_ARSH_X: Shift < 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_ARSH, R0, R1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0x56789abc } }
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},
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{
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"ALU64_ARSH_X: Shift < 32, high word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 12),
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BPF_ALU64_REG(BPF_ARSH, R0, R1),
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BPF_ALU64_IMM(BPF_RSH, R0, 32),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 0xfff81234 } }
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},
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{
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"ALU64_ARSH_X: Shift > 32, low word",
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.u.insns_int = {
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BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
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BPF_ALU32_IMM(BPF_MOV, R1, 36),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0xf8123456 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_X: Shift > 32, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU32_IMM(BPF_MOV, R1, 36),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, -1 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_X: Shift == 32, low word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU32_IMM(BPF_MOV, R1, 32),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x81234567 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_X: Shift == 32, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU32_IMM(BPF_MOV, R1, 32),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, -1 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_X: Zero shift, low word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU32_IMM(BPF_MOV, R1, 0),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x89abcdef } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_X: Zero shift, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU32_IMM(BPF_MOV, R1, 0),
|
||||
BPF_ALU64_REG(BPF_ARSH, R0, R1),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x81234567 } }
|
||||
},
|
||||
/* BPF_ALU | BPF_ARSH | BPF_K */
|
||||
{
|
||||
"ALU32_ARSH_K: -1234 >> 7 = -10",
|
||||
@ -4383,7 +4843,7 @@ static struct bpf_test tests[] = {
|
||||
{ { 0, -1234 } }
|
||||
},
|
||||
{
|
||||
"ALU_ARSH_K: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
|
||||
"ALU64_ARSH_K: 0xff00ff0000000000 >> 40 = 0xffffffffffff00ff",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0xff00ff0000000000LL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 40),
|
||||
@ -4393,6 +4853,86 @@ static struct bpf_test tests[] = {
|
||||
{ },
|
||||
{ { 0, 0xffff00ff } },
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift < 32, low word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 12),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x56789abc } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift < 32, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 12),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0xfff81234 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift > 32, low word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 36),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0xf8123456 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift > 32, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0xf123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 36),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, -1 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift == 32, low word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x81234567 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Shift == 32, high word",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 32),
|
||||
BPF_ALU64_IMM(BPF_RSH, R0, 32),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, -1 } }
|
||||
},
|
||||
{
|
||||
"ALU64_ARSH_K: Zero shoft",
|
||||
.u.insns_int = {
|
||||
BPF_LD_IMM64(R0, 0x8123456789abcdefLL),
|
||||
BPF_ALU64_IMM(BPF_ARSH, R0, 0),
|
||||
BPF_EXIT_INSN(),
|
||||
},
|
||||
INTERNAL,
|
||||
{ },
|
||||
{ { 0, 0x89abcdef } }
|
||||
},
|
||||
/* BPF_ALU | BPF_NEG */
|
||||
{
|
||||
"ALU_NEG: -(3) = -3",
|
||||
|
||||
Loading…
Reference in New Issue
Block a user