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locking, x86, iommu: Annotate qi->q_lock as raw
The qi->q_lock lock can be taken in atomic context and therefore cannot be preempted on -rt - annotate it. In mainline this change documents the low level nature of the lock - otherwise there's no functional difference. Lockdep and Sparse checking will work as usual. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -921,11 +921,11 @@ int qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu)
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restart:
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rc = 0;
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spin_lock_irqsave(&qi->q_lock, flags);
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raw_spin_lock_irqsave(&qi->q_lock, flags);
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while (qi->free_cnt < 3) {
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spin_unlock_irqrestore(&qi->q_lock, flags);
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raw_spin_unlock_irqrestore(&qi->q_lock, flags);
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cpu_relax();
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spin_lock_irqsave(&qi->q_lock, flags);
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raw_spin_lock_irqsave(&qi->q_lock, flags);
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}
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index = qi->free_head;
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@ -965,15 +965,15 @@ restart:
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if (rc)
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break;
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spin_unlock(&qi->q_lock);
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raw_spin_unlock(&qi->q_lock);
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cpu_relax();
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spin_lock(&qi->q_lock);
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raw_spin_lock(&qi->q_lock);
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}
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qi->desc_status[index] = QI_DONE;
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reclaim_free_desc(qi);
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spin_unlock_irqrestore(&qi->q_lock, flags);
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raw_spin_unlock_irqrestore(&qi->q_lock, flags);
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if (rc == -EAGAIN)
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goto restart;
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@ -1159,7 +1159,7 @@ int dmar_enable_qi(struct intel_iommu *iommu)
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qi->free_head = qi->free_tail = 0;
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qi->free_cnt = QI_LENGTH;
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spin_lock_init(&qi->q_lock);
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raw_spin_lock_init(&qi->q_lock);
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__dmar_enable_qi(iommu);
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@ -271,7 +271,7 @@ struct qi_desc {
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};
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struct q_inval {
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spinlock_t q_lock;
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raw_spinlock_t q_lock;
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struct qi_desc *desc; /* invalidation queue */
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int *desc_status; /* desc status */
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int free_head; /* first free entry */
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