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spi/dw_spi: improve the interrupt mode with the batch ops
leverage the performance gain by change in low level read/write batch operations Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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parent
2ff271bf65
commit
3b8a4dd3eb
@ -190,21 +190,7 @@ static inline u32 rx_max(struct dw_spi *dws)
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return min(rx_left, (u32)dw_readw(dws, rxflr));
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}
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static void wait_till_not_busy(struct dw_spi *dws)
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{
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unsigned long end = jiffies + 1 + usecs_to_jiffies(5000);
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while (time_before(jiffies, end)) {
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if (!(dw_readw(dws, sr) & SR_BUSY))
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return;
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cpu_relax();
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}
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dev_err(&dws->master->dev,
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"DW SPI: Status keeps busy for 5000us after a read/write!\n");
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}
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static int dw_writer(struct dw_spi *dws)
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static void dw_writer(struct dw_spi *dws)
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{
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u32 max = tx_max(dws);
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u16 txw = 0;
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@ -220,11 +206,9 @@ static int dw_writer(struct dw_spi *dws)
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dw_writew(dws, dr, txw);
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dws->tx += dws->n_bytes;
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}
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return 1;
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}
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static int dw_reader(struct dw_spi *dws)
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static void dw_reader(struct dw_spi *dws)
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{
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u32 max = rx_max(dws);
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u16 rxw;
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@ -240,8 +224,6 @@ static int dw_reader(struct dw_spi *dws)
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}
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dws->rx += dws->n_bytes;
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}
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return dws->rx == dws->rx_end;
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}
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static void *next_transfer(struct dw_spi *dws)
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@ -340,35 +322,28 @@ EXPORT_SYMBOL_GPL(dw_spi_xfer_done);
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static irqreturn_t interrupt_transfer(struct dw_spi *dws)
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{
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u16 irq_status, irq_mask = 0x3f;
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u32 int_level = dws->fifo_len / 2;
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u32 left;
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u16 irq_status = dw_readw(dws, isr);
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irq_status = dw_readw(dws, isr) & irq_mask;
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/* Error handling */
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if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
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dw_readw(dws, txoicr);
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dw_readw(dws, rxoicr);
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dw_readw(dws, rxuicr);
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int_error_stop(dws, "interrupt_transfer: fifo overrun");
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int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
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return IRQ_HANDLED;
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}
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dw_reader(dws);
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if (dws->rx_end == dws->rx) {
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spi_mask_intr(dws, SPI_INT_TXEI);
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dw_spi_xfer_done(dws);
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return IRQ_HANDLED;
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}
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if (irq_status & SPI_INT_TXEI) {
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spi_mask_intr(dws, SPI_INT_TXEI);
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left = (dws->tx_end - dws->tx) / dws->n_bytes;
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left = (left > int_level) ? int_level : left;
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while (left--)
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dw_writer(dws);
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dw_reader(dws);
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/* Re-enable the IRQ if there is still data left to tx */
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if (dws->tx_end > dws->tx)
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spi_umask_intr(dws, SPI_INT_TXEI);
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else
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dw_spi_xfer_done(dws);
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dw_writer(dws);
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/* Enable TX irq always, it will be disabled when RX finished */
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spi_umask_intr(dws, SPI_INT_TXEI);
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}
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return IRQ_HANDLED;
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@ -377,15 +352,13 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
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static irqreturn_t dw_spi_irq(int irq, void *dev_id)
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{
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struct dw_spi *dws = dev_id;
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u16 irq_status, irq_mask = 0x3f;
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u16 irq_status = dw_readw(dws, isr) & 0x3f;
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irq_status = dw_readw(dws, isr) & irq_mask;
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if (!irq_status)
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return IRQ_NONE;
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if (!dws->cur_msg) {
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spi_mask_intr(dws, SPI_INT_TXEI);
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/* Never fail */
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return IRQ_HANDLED;
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}
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@ -492,12 +465,8 @@ static void pump_transfers(unsigned long data)
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switch (bits) {
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case 8:
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dws->n_bytes = 1;
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dws->dma_width = 1;
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break;
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case 16:
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dws->n_bytes = 2;
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dws->dma_width = 2;
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dws->n_bytes = dws->dma_width = bits >> 3;
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break;
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default:
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printk(KERN_ERR "MRST SPI0: unsupported bits:"
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@ -541,7 +510,7 @@ static void pump_transfers(unsigned long data)
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txint_level = dws->fifo_len / 2;
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txint_level = (templen > txint_level) ? txint_level : templen;
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imask |= SPI_INT_TXEI;
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imask |= SPI_INT_TXEI | SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI;
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dws->transfer_handler = interrupt_transfer;
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}
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