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[PATCH] ARM: 2800/1: OMAP update 3/11: Move OMAP1 core code into mach-omap1 directory
Patch from Tony Lindgren This patch by Paul Mundt and other OMAP developers moves OMAP1 specific IRQ, time, and FPGA code into mach-omap1 directory. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -56,6 +56,7 @@
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struct omap_irq_bank {
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unsigned long base_reg;
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unsigned long trigger_map;
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unsigned long wake_enable;
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};
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static unsigned int irq_bank_count = 0;
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@ -105,6 +106,19 @@ static void omap_mask_ack_irq(unsigned int irq)
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omap_ack_irq(irq);
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}
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static int omap_wake_irq(unsigned int irq, unsigned int enable)
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{
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int bank = IRQ_BANK(irq);
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if (enable)
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irq_banks[bank].wake_enable |= IRQ_BIT(irq);
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else
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irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
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return 0;
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}
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/*
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* Allows tuning the IRQ type and priority
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*
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@ -145,7 +159,7 @@ static struct omap_irq_bank omap1510_irq_banks[] = {
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static struct omap_irq_bank omap1610_irq_banks[] = {
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{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
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{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
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{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xfffff7ff },
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{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff },
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{ .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },
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};
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#endif
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@ -154,6 +168,7 @@ static struct irqchip omap_irq_chip = {
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.ack = omap_mask_ack_irq,
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.mask = omap_mask_irq,
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.unmask = omap_unmask_irq,
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.wake = omap_wake_irq,
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};
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void __init omap_init_irq(void)
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@ -1,5 +1,5 @@
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/*
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* linux/arch/arm/mach-omap/time.c
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* linux/arch/arm/mach-omap1/time.c
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*
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* OMAP Timers
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*
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@ -58,17 +58,9 @@ struct sys_timer omap_timer;
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* MPU timer
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* ---------------------------------------------------------------------------
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*/
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#define OMAP_MPU_TIMER1_BASE (0xfffec500)
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#define OMAP_MPU_TIMER2_BASE (0xfffec600)
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#define OMAP_MPU_TIMER3_BASE (0xfffec700)
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#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
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#define OMAP_MPU_TIMER_OFFSET 0x100
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#define MPU_TIMER_FREE (1 << 6)
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#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
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#define MPU_TIMER_AR (1 << 1)
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#define MPU_TIMER_ST (1 << 0)
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/* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
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* converted to use kHz by Kevin Hilman */
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/* convert from cycles(64bits) => nanoseconds (64bits)
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@ -255,6 +247,13 @@ unsigned long long sched_clock(void)
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#define OMAP_32K_TIMER_TCR 0x04
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#define OMAP_32K_TICKS_PER_HZ (32768 / HZ)
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#if (32768 % HZ) != 0
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/* We cannot ignore modulo.
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* Potential error can be as high as several percent.
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*/
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#define OMAP_32K_TICK_MODULO (32768 % HZ)
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static unsigned modulo_count = 0; /* Counts 1/HZ units */
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#endif
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/*
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* TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
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@ -331,6 +330,19 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
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now = omap_32k_sync_timer_read();
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while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
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#ifdef OMAP_32K_TICK_MODULO
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/* Modulo addition may put omap_32k_last_tick ahead of now
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* and cause unwanted repetition of the while loop.
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*/
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if (unlikely(now - omap_32k_last_tick == ~0))
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break;
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modulo_count += OMAP_32K_TICK_MODULO;
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if (modulo_count > HZ) {
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++omap_32k_last_tick;
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modulo_count -= HZ;
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}
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#endif
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omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
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timer_tick(regs);
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}
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@ -407,7 +419,7 @@ static __init void omap_init_32k_timer(void)
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* Timer initialization
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* ---------------------------------------------------------------------------
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*/
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void __init omap_timer_init(void)
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static void __init omap_timer_init(void)
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{
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#if defined(CONFIG_OMAP_MPU_TIMER)
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omap_init_mpu_timer();
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