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- Make sure the destroy callback is reset when a event initialization fails
- Update the event constraints for Icelake - Make sure the active time of an event is updated even for inactive events -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmFZfZoACgkQEsHwGGHe VUqonA//SskDtPRTrbHoc1pDZEBOoYmuYZpsVIXMTcjxt8DkdGZcmgSRzJ53QdGT aOv+Oc7qIsOa7qcRPaUxlyjnqbWEynOmeHaIN2PtKebOKsXsvdf0ehrrOYjgoD5g 1ENCisvV6TyyPtQPDv9QkYkGScZXg5/D8VyrlV5GsRj+MslWsfVWaJvUCHQtJcnz YPbcOFw1MHCBtUuJXtXuzA2JDp0Lfr6aX5Zl6hXqP8k69Y+Ob0bjA3jopo29l5rU lp/y4MQcFHuEAbQ7AdVeKg3Yi/RnSEI0w3HT1xDeKyXlMGp+Xz5rDBg1I+WREDri u7QuT9Mx6XSzGHGeg/Y5XbMN+M5WCQUxH5gJMLiduG0YYULWhq/j4f5tA0U0cQ80 qVKRH8luh+0R+RLZtqno9pNg0pSdB47X8lqXOX0/DyAA7f6xPm17VBvyDeuF75AL vYuhdtu0vB5Iwsccj+h5cXGsaMWCzcriGABWZL/1JZFwRT8kRadiybJkv0n6R77F qDqUMu6cLM9kDhTeggDffoQZoxLiEL6pfeWFuWcaWdVXa8veX4lZZNnPFbqNhnJm zRm758r3jdHie1BAgFXym6Gt5EhkBhtofbUBaw3T2SdxFTs0csKzF5tzCXIvIyz2 LH3Is3ce0pw+A72barhbLua2IJ2h895DGE529sQBiaSibB53tYk= =TQvw -----END PGP SIGNATURE----- Merge tag 'perf_urgent_for_v5.15_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Borislav Petkov: - Make sure the destroy callback is reset when a event initialization fails - Update the event constraints for Icelake - Make sure the active time of an event is updated even for inactive events * tag 'perf_urgent_for_v5.15_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/core: fix userpage->time_enabled of inactive events perf/x86/intel: Update event constraints for ICX perf/x86: Reset destroy callback on event init failure
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commit
3a399a2bc4
@ -2465,6 +2465,7 @@ static int x86_pmu_event_init(struct perf_event *event)
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if (err) {
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if (event->destroy)
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event->destroy(event);
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event->destroy = NULL;
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}
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if (READ_ONCE(x86_pmu.attr_rdpmc) &&
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@ -263,6 +263,7 @@ static struct event_constraint intel_icl_event_constraints[] = {
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INTEL_EVENT_CONSTRAINT_RANGE(0xa8, 0xb0, 0xf),
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INTEL_EVENT_CONSTRAINT_RANGE(0xb7, 0xbd, 0xf),
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INTEL_EVENT_CONSTRAINT_RANGE(0xd0, 0xe6, 0xf),
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INTEL_EVENT_CONSTRAINT(0xef, 0xf),
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INTEL_EVENT_CONSTRAINT_RANGE(0xf0, 0xf4, 0xf),
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EVENT_CONSTRAINT_END
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};
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@ -683,7 +683,9 @@ struct perf_event {
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/*
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* timestamp shadows the actual context timing but it can
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* be safely used in NMI interrupt context. It reflects the
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* context time as it was when the event was last scheduled in.
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* context time as it was when the event was last scheduled in,
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* or when ctx_sched_in failed to schedule the event because we
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* run out of PMC.
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*
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* ctx_time already accounts for ctx->timestamp. Therefore to
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* compute ctx_time for a sample, simply add perf_clock().
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@ -3707,6 +3707,29 @@ static noinline int visit_groups_merge(struct perf_cpu_context *cpuctx,
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return 0;
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}
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static inline bool event_update_userpage(struct perf_event *event)
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{
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if (likely(!atomic_read(&event->mmap_count)))
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return false;
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perf_event_update_time(event);
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perf_set_shadow_time(event, event->ctx);
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perf_event_update_userpage(event);
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return true;
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}
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static inline void group_update_userpage(struct perf_event *group_event)
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{
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struct perf_event *event;
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if (!event_update_userpage(group_event))
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return;
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for_each_sibling_event(event, group_event)
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event_update_userpage(event);
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}
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static int merge_sched_in(struct perf_event *event, void *data)
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{
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struct perf_event_context *ctx = event->ctx;
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@ -3725,14 +3748,15 @@ static int merge_sched_in(struct perf_event *event, void *data)
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}
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if (event->state == PERF_EVENT_STATE_INACTIVE) {
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*can_add_hw = 0;
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if (event->attr.pinned) {
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perf_cgroup_event_disable(event, ctx);
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perf_event_set_state(event, PERF_EVENT_STATE_ERROR);
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} else {
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ctx->rotate_necessary = 1;
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perf_mux_hrtimer_restart(cpuctx);
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group_update_userpage(event);
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}
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*can_add_hw = 0;
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ctx->rotate_necessary = 1;
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perf_mux_hrtimer_restart(cpuctx);
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}
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return 0;
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@ -6324,6 +6348,8 @@ accounting:
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ring_buffer_attach(event, rb);
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perf_event_update_time(event);
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perf_set_shadow_time(event, event->ctx);
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perf_event_init_userpage(event);
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perf_event_update_userpage(event);
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} else {
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