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drm/omap: DISPC: support double-pixel mode
We need double-pixel mode (pixel repetition) for interlace modes. This patch adds the necessary support to DISPC to output double-pixel mode. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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@ -104,6 +104,8 @@ struct dispc_features {
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bool supports_sync_align:1;
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bool has_writeback:1;
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bool supports_double_pixel:1;
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};
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#define DISPC_MAX_NR_FIFOS 5
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@ -3287,6 +3289,10 @@ void dispc_mgr_set_timings(enum omap_channel channel,
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} else {
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if (t.interlace)
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t.y_res /= 2;
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if (dispc.feat->supports_double_pixel)
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REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
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19, 17);
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}
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dispc_mgr_set_size(channel, t.x_res, t.y_res);
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@ -3951,6 +3957,7 @@ static const struct dispc_features omap44xx_dispc_feats = {
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.set_max_preload = true,
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.supports_sync_align = true,
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.has_writeback = true,
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.supports_double_pixel = true,
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};
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static const struct dispc_features omap54xx_dispc_feats = {
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@ -3974,6 +3981,7 @@ static const struct dispc_features omap54xx_dispc_feats = {
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.set_max_preload = true,
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.supports_sync_align = true,
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.has_writeback = true,
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.supports_double_pixel = true,
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};
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static int dispc_init_features(struct platform_device *pdev)
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@ -367,6 +367,8 @@ struct omap_video_timings {
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enum omap_dss_signal_level de_level;
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/* Pixel clock edges to drive HSYNC and VSYNC signals */
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enum omap_dss_signal_edge sync_pclk_edge;
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bool double_pixel;
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};
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/* Hardcoded timings for tv modes. Venc only uses these to
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