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ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10

Browse Source 
- Change the status properties from "ok" to "okay" for
   all the hisilicon SoCs
 - Update the SP805 nodes to have the correct clocks and
   clock names for the hi3660 and hi6220 SoCs
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Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10

- Change the status properties from "ok" to "okay" for
  all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
  clock names for the hi3660 and hi6220 SoCs

* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Fix SP805 clocks
  arm64: dts: hisilicon: replace status value "ok" by "okay"

Link: https://lore.kernel.org/r/5F617134.3050705@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-09-26 09:46:09 -07:00
commit 39d601ba9a
8 changed files with 45 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
View File

@ -530,7 +530,7 @@
rt1711h: rt1711h@4e {
compatible = "richtek,rt1711h";
reg = <0x4e>;
status = "ok";
status = "okay";
interrupt-parent = <&gpio27>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
@ -570,7 +570,7 @@
};
adv7533: adv7533@39 {
status = "ok";
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
adi,dsi-lanes = <4>;
@ -656,7 +656,7 @@
&sdio_cfg_func>;
/* WL_EN */
vmmc-supply = <&wlan_en>;
status = "ok";
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1837";

10
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
View File

@ -1089,16 +1089,18 @@
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
clock-names = "apb_pclk";
clocks = <&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>;
clock-names = "wdog_clk", "apb_pclk";
};
watchdog1: watchdog@e8a07000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
clock-names = "apb_pclk";
clocks = <&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>;
clock-names = "wdog_clk", "apb_pclk";
};
tsensor: tsensor@fff30000 {

2
arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts
View File

@ -418,7 +418,7 @@
&sdio_cfg_func>;
/* WL_EN */
vmmc-supply = <&wlan_en>;
status = "ok";
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1837";

18
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
View File

@ -267,7 +267,7 @@
&uart1 {
assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
assigned-clock-rates = <150000000>;
status = "ok";
status = "okay";
bluetooth {
compatible = "ti,wl1835-st";
@ -278,21 +278,21 @@
};
&uart2 {
status = "ok";
status = "okay";
label = "LS-UART0";
};
&uart3 {
status = "ok";
status = "okay";
label = "LS-UART1";
};
&ade {
status = "ok";
status = "okay";
};
&dsi {
status = "ok";
status = "okay";
ports {
/* 1 for output port */
@ -489,17 +489,17 @@
&i2c0 {
status = "ok";
status = "okay";
};
&i2c1 {
status = "ok";
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
status = "okay";
adv7533: adv7533@39 {
compatible = "adi,adv7533";
@ -541,5 +541,5 @@
};
&spi0 {
status = "ok";
status = "okay";
};

7
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
View File

@ -371,7 +371,7 @@
clocks = <&sys_ctrl HI6220_EDMAC_ACLK>;
dma-no-cci;
dma-type = "hi6220_dma";
status = "ok";
status = "okay";
};
dual_timer0: timer@f8008000 {
@ -843,8 +843,9 @@
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xf8005000 0x0 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
clock-names = "apb_pclk";
clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
<&ao_ctrl HI6220_WDT0_PCLK>;
clock-names = "wdog_clk", "apb_pclk";
};
tsensor: tsensor@0,f7030700 {

6
arch/arm64/boot/dts/hisilicon/hip05-d02.dts
View File

@ -42,15 +42,15 @@
};
&uart0 {
status = "ok";
status = "okay";
};
&peri_gpio0 {
status = "ok";
status = "okay";
};
&lbc {
status = "ok";
status = "okay";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x0 0x90000000 0x08000000>,

18
arch/arm64/boot/dts/hisilicon/hip06-d03.dts
View File

@ -22,37 +22,37 @@
};
&ipmi0 {
status = "ok";
status = "okay";
};
&uart0 {
status = "ok";
status = "okay";
};
&eth0 {
status = "ok";
status = "okay";
};
&eth1 {
status = "ok";
status = "okay";
};
&eth2 {
status = "ok";
status = "okay";
};
&eth3 {
status = "ok";
status = "okay";
};
&sas1 {
status = "ok";
status = "okay";
};
&usb_ohci {
status = "ok";
status = "okay";
};
&usb_ehci {
status = "ok";
status = "okay";
};

20
arch/arm64/boot/dts/hisilicon/hip07-d05.dts
View File

@ -50,41 +50,41 @@
};
&uart0 {
status = "ok";
status = "okay";
};
&ipmi0 {
status = "ok";
status = "okay";
};
&usb_ohci {
status = "ok";
status = "okay";
};
&usb_ehci {
status = "ok";
status = "okay";
};
&eth0 {
status = "ok";
status = "okay";
};
&eth1 {
status = "ok";
status = "okay";
};
&eth2 {
status = "ok";
status = "okay";
};
&eth3 {
status = "ok";
status = "okay";
};
&sas1 {
status = "ok";
status = "okay";
};
&p0_pcie2_a {
status = "ok";
status = "okay";
};