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scsi: ufs: Add quirk to enable host controller without hce

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Some host controllers don't support host controller enable via HCE.

Link: https://lore.kernel.org/r/20200528011658.71590-4-alim.akhtar@samsung.com
Reviewed-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Seungwon Jeon <essuuj@gmail.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Alim Akhtar 2020-05-28 06:46:51 +05:30 committed by Martin K. Petersen
parent b638b5eb62
commit 39bf2d83b5
2 changed files with 80 additions and 2 deletions
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76
drivers/scsi/ufs/ufshcd.c
View File

@ -3552,6 +3552,52 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
"dme-link-startup: error code %d\n", ret);
return ret;
}
/**
* ufshcd_dme_reset - UIC command for DME_RESET
* @hba: per adapter instance
*
* DME_RESET command is issued in order to reset UniPro stack.
* This function now deals with cold reset.
*
* Returns 0 on success, non-zero value on failure
*/
static int ufshcd_dme_reset(struct ufs_hba *hba)
{
struct uic_command uic_cmd = {0};
int ret;
uic_cmd.command = UIC_CMD_DME_RESET;
ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
if (ret)
dev_err(hba->dev,
"dme-reset: error code %d\n", ret);
return ret;
}
/**
* ufshcd_dme_enable - UIC command for DME_ENABLE
* @hba: per adapter instance
*
* DME_ENABLE command is issued in order to enable UniPro stack.
*
* Returns 0 on success, non-zero value on failure
*/
static int ufshcd_dme_enable(struct ufs_hba *hba)
{
struct uic_command uic_cmd = {0};
int ret;
uic_cmd.command = UIC_CMD_DME_ENABLE;
ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
if (ret)
dev_err(hba->dev,
"dme-reset: error code %d\n", ret);
return ret;
}
static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
{
@ -4276,7 +4322,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba)
}
/**
* ufshcd_hba_enable - initialize the controller
* ufshcd_hba_execute_hce - initialize the controller
* @hba: per adapter instance
*
* The controller resets itself and controller firmware initialization
@ -4285,7 +4331,7 @@ static inline void ufshcd_hba_stop(struct ufs_hba *hba)
*
* Returns 0 on success, non-zero value on failure
*/
int ufshcd_hba_enable(struct ufs_hba *hba)
static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
{
int retry;
@ -4333,6 +4379,32 @@ int ufshcd_hba_enable(struct ufs_hba *hba)
return 0;
}
int ufshcd_hba_enable(struct ufs_hba *hba)
{
int ret;
if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
ufshcd_set_link_off(hba);
ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
/* enable UIC related interrupts */
ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
ret = ufshcd_dme_reset(hba);
if (!ret) {
ret = ufshcd_dme_enable(hba);
if (!ret)
ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
if (ret)
dev_err(hba->dev,
"Host controller enable failed with non-hce\n");
}
} else {
ret = ufshcd_hba_execute_hce(hba);
}
return ret;
}
EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)

6
drivers/scsi/ufs/ufshcd.h
View File

@ -531,6 +531,12 @@ enum ufshcd_quirks {
* that the interrupt aggregation timer and counter are reset by s/w.
*/
UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
/*
* This quirks needs to be enabled if host controller cannot be
* enabled via HCE register.
*/
UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
};
enum ufshcd_caps {