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powerpc/atomic: Use YZ constraints for DS-form instructions
The 'ld' and 'std' instructions require a 4-byte aligned displacement because they are DS-form instructions. But the "m" asm constraint doesn't enforce that. That can lead to build errors if the compiler chooses a non-aligned displacement, as seen with GCC 14: /tmp/ccuSzwiR.s: Assembler messages: /tmp/ccuSzwiR.s:2579: Error: operand out of domain (39 is not a multiple of 4) make[5]: *** [scripts/Makefile.build:229: net/core/page_pool.o] Error 1 Dumping the generated assembler shows: ld 8,39(8) # MEM[(const struct atomic64_t *)_29].counter, t Use the YZ constraints to tell the compiler either to generate a DS-form displacement, or use an X-form instruction, either of which prevents the build error. See commit2d43cc701b
("powerpc/uaccess: Fix build errors seen with GCC 13/14") for more details on the constraint letters. Fixes:9f0cbea0d8
("[POWERPC] Implement atomic{, 64}_{read, write}() without volatile") Cc: stable@vger.kernel.org # v2.6.24+ Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/all/20240913125302.0a06b4c7@canb.auug.org.au Tested-by: Mina Almasry <almasrymina@google.com> Reviewed-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240916120510.2017749-1-mpe@ellerman.id.au
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@ -37,6 +37,12 @@
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#define STDX_BE stringify_in_c(stdbrx)
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#endif
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#ifdef CONFIG_CC_IS_CLANG
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#define DS_FORM_CONSTRAINT "Z<>"
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#else
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#define DS_FORM_CONSTRAINT "YZ<>"
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#endif
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#else /* 32-bit */
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/* operations for longs and pointers */
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@ -11,6 +11,7 @@
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#include <asm/asm-const.h>
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#include <asm/asm-compat.h>
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/*
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* Since *_return_relaxed and {cmp}xchg_relaxed are implemented with
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@ -197,7 +198,7 @@ static __inline__ s64 arch_atomic64_read(const atomic64_t *v)
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if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
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__asm__ __volatile__("ld %0,0(%1)" : "=r"(t) : "b"(&v->counter));
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else
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__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
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__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : DS_FORM_CONSTRAINT (v->counter));
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return t;
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}
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@ -208,7 +209,7 @@ static __inline__ void arch_atomic64_set(atomic64_t *v, s64 i)
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if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
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__asm__ __volatile__("std %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter));
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else
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__asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
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__asm__ __volatile__("std%U0%X0 %1,%0" : "=" DS_FORM_CONSTRAINT (v->counter) : "r"(i));
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}
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#define ATOMIC64_OP(op, asm_op) \
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@ -6,6 +6,7 @@
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#include <asm/page.h>
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#include <asm/extable.h>
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#include <asm/kup.h>
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#include <asm/asm-compat.h>
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#ifdef __powerpc64__
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/* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */
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@ -92,12 +93,6 @@ __pu_failed: \
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: label)
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#endif
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#ifdef CONFIG_CC_IS_CLANG
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#define DS_FORM_CONSTRAINT "Z<>"
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#else
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#define DS_FORM_CONSTRAINT "YZ<>"
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#endif
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#ifdef __powerpc64__
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#ifdef CONFIG_PPC_KERNEL_PREFIXED
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#define __put_user_asm2_goto(x, ptr, label) \
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