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Second set of device tree changes for omaps for v4.16 merge window

Browse Source 
This branch mostly configures more hardware support:
 
 - Clean-up dts files to remove leading 0x and 0s from binding notation
   to remove more dtc compiler warnings
 
 - A series of am437x updates for backlight, to fix inverted pad
   pull macro, and to configure power management related OPPs
 
 - Configure n950 and droid 4 command mode LCD panels
 
 - Updates to pandora and gta04 LCD panels
 
 - Add support for am574x-idk
 
 - A series of changes to configure more dra7 related PCIe features
 
 - A series of fixes for am335x-boneblue for WLAN, UARTs and CAN
   configuration
 
 - A series of changes to configure dra7 OPPs and VDD supplies
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Merge tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Second set of device tree changes for omaps for v4.16 merge window

This branch mostly configures more hardware support:

- Clean-up dts files to remove leading 0x and 0s from binding notation
  to remove more dtc compiler warnings

- A series of am437x updates for backlight, to fix inverted pad
  pull macro, and to configure power management related OPPs

- Configure n950 and droid 4 command mode LCD panels

- Updates to pandora and gta04 LCD panels

- Add support for am574x-idk

- A series of changes to configure more dra7 related PCIe features

- A series of fixes for am335x-boneblue for WLAN, UARTs and CAN
  configuration

- A series of changes to configure dra7 OPPs and VDD supplies

* tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
  Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode"
  ARM: dts: am572x-idk: Add cpu0 vdd supply
  ARM: dts: am571x-idk: Add cpu0 vdd supply
  ARM: dts: dra72-evm-tps65917: Add cpu0 vdd supply
  ARM: dts: dra7-evm: Add cpu0 vdd supply
  ARM: dts: am57xx-beagle-x15-common: Add cpu0 vdd supply
  ARM: dts: dra7: Enable 1.5 GHz operation for the CPU
  ARM: dts: dra7: Add MPU OPP supply node
  ARM: dts: dra7: Add vbb-supply to cpu and additional voltages
  ARM: dts: am335x-boneblue: enable can
  ARM: dts: am335x-boneblue: enable usarts
  ARM: dts: am335x-boneblue: fix wl1835 IRQ pin
  ARM: dts: dra7: Remove deprecated PCI compatible string
  ARM: dts: dra76-evm: Enable x2 PCIe lanes
  ARM: dts: DRA72x: Use PCIe compatible specific to dra72
  ARM: dts: DRA74x: Use PCIe compatible specific to dra74
  ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
  ARM: dts: am57xx: Add support for am574x-idk
  ARM: dts: am43x-epos-evm: Hook dcdc2 as the cpu0-supply
  ARM: dts: am437x-idk-evm: Disable OPP50 for MPU
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-01-04 23:06:32 -08:00
commit 38b45e5186
29 changed files with 428 additions and 130 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -688,6 +688,7 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
am57xx-sbc-am57x.dtb \
am572x-idk.dtb \
am571x-idk.dtb \
am574x-idk.dtb \
dra7-evm.dtb \
dra72-evm.dtb \
dra72-evm-revc.dtb \

79
arch/arm/boot/dts/am335x-boneblue.dts
View File

@ -159,6 +159,7 @@
>;
};
/* UT0 */
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
@ -166,6 +167,37 @@
>;
};
/* UT1 */
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* (D16) uart1_rxd.uart1_rxd */
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (D15) uart1_txd.uart1_txd */
>;
};
/* GPS */
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (B17) spi0_d0.uart2_txd */
>;
};
/* DSM2 */
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
>;
};
/* UT5 */
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8C4, PIN_INPUT_PULLUP | MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */
AM33XX_IOPAD(0x8C0, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* (U1) lcd_data8.uart5_txd */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
@ -216,10 +248,19 @@
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (H18) rmii1_refclk.gpio0[29] - WL_IRQ */
AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
>;
};
/* DCAN */
dcan1_pins: pinmux_dcan1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE2) /* (E17) uart0_rtsn.dcan1_rx */
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* (E18) uart0_ctsn.dcan1_tx */
AM33XX_IOPAD(0x940, PIN_OUTPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
>;
};
};
&uart0 {
@ -229,6 +270,34 @@
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
};
&usb {
status = "okay";
};
@ -414,7 +483,7 @@
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <29 IRQ_TYPE_EDGE_RISING>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>;
};
};
@ -450,6 +519,12 @@
clock-names = "ext-clk", "int-clk";
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
&gpio3 {
ls_buf_en {
gpio-hog;

4
arch/arm/boot/dts/am33xx.dtsi
View File

@ -500,7 +500,7 @@
status = "disabled";
};
mailbox: mailbox@480C8000 {
mailbox: mailbox@480c8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <77>;
@ -999,7 +999,7 @@
dma-names = "tx", "rx";
};
mcasp1: mcasp@4803C000 {
mcasp1: mcasp@4803c000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
reg = <0x4803C000 0x2000>,

4
arch/arm/boot/dts/am3517.dtsi
View File

@ -26,7 +26,7 @@
interrupt-names = "mc";
};
davinci_emac: ethernet@0x5c000000 {
davinci_emac: ethernet@5c000000 {
compatible = "ti,am3517-emac";
ti,hwmods = "davinci_emac";
status = "disabled";
@ -41,7 +41,7 @@
local-mac-address = [ 00 00 00 00 00 00 ];
};
davinci_mdio: ethernet@0x5c030000 {
davinci_mdio: ethernet@5c030000 {
compatible = "ti,davinci_mdio";
ti,hwmods = "davinci_mdio";
status = "disabled";

4
arch/arm/boot/dts/am4372.dtsi
View File

@ -329,7 +329,7 @@
status = "disabled";
};
mailbox: mailbox@480C8000 {
mailbox: mailbox@480c8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@ -944,7 +944,7 @@
dma-names = "tx", "rx";
};
mcasp1: mcasp@4803C000 {
mcasp1: mcasp@4803c000 {
compatible = "ti,am33xx-mcasp-audio";
ti,hwmods = "mcasp1";
reg = <0x4803C000 0x2000>,

4
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@ -55,7 +55,7 @@
enable-active-high;
};
backlight {
lcd_bl: backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
@ -86,6 +86,8 @@
compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
label = "lcd";
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;

14
arch/arm/boot/dts/am437x-idk-evm.dts
View File

@ -519,3 +519,17 @@
&cpu {
cpu0-supply = <&tps>;
};
&cpu0_opp_table {
/*
* Supply voltage supervisor on board will not allow opp50 so
* disable it and set opp100 as suspend OPP.
*/
opp50@300000000 {
status = "disabled";
};
opp100@600000000 {
opp-suspend;
};
};

4
arch/arm/boot/dts/am437x-sk-evm.dts
View File

@ -35,7 +35,7 @@
clock-frequency = <32768>;
};
backlight {
lcd_bl: backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
@ -132,6 +132,8 @@
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
backlight = <&lcd_bl>;
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
panel-timing {

8
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -48,6 +48,8 @@
compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
label = "lcd";
backlight = <&lcd_bl>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
@ -107,7 +109,7 @@
0x03030069>; /* LEFT */
};
backlight {
lcd_bl: backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
@ -989,3 +991,7 @@
assigned-clocks = <&mux_synctimer32k_ck>;
assigned-clock-parents = <&clkdiv32k_ick>;
};
&cpu {
cpu0-supply = <&dcdc2>;
};

4
arch/arm/boot/dts/am571x-idk.dts
View File

@ -117,3 +117,7 @@
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
};
&cpu0 {
vdd-supply = <&smps12_reg>;
};

100
arch/arm/boot/dts/am572x-idk-common.dtsi Normal file
View File

@ -0,0 +1,100 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am57xx-idk-common.dtsi"
/ {
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
status-leds {
compatible = "gpio-leds";
cpu0-led {
label = "status0:red:cpu0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu0";
};
usr0-led {
label = "status0:green:usr";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
heartbeat-led {
label = "status0:blue:heartbeat";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
cpu1-led {
label = "status1:red:cpu1";
gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu1";
};
usr1-led {
label = "status1:green:usr";
gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
mmc0-led {
label = "status1:blue:mmc0";
gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
};
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&extcon_usb2 {
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};
&sn65hvs882 {
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};

93
arch/arm/boot/dts/am572x-idk.dts
View File

@ -9,8 +9,7 @@
/dts-v1/;
#include "dra74x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am572x-idk-common.dtsi"
#include "am57xx-idk-common.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
@ -18,54 +17,6 @@
model = "TI AM5728 IDK";
compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
"ti,dra7";
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
status-leds {
compatible = "gpio-leds";
cpu0-led {
label = "status0:red:cpu0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu0";
};
usr0-led {
label = "status0:green:usr";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
heartbeat-led {
label = "status0:blue:heartbeat";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
cpu1-led {
label = "status1:red:cpu1";
gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu1";
};
usr1-led {
label = "status1:green:usr";
gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
mmc0-led {
label = "status1:blue:mmc0";
gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
};
};
&mmc1 {
@ -86,44 +37,6 @@
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&extcon_usb2 {
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};
&sn65hvs882 {
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
&cpu0 {
vdd-supply = <&smps12_reg>;
};

22
arch/arm/boot/dts/am574x-idk.dts Normal file
View File

@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
#include "dra76x.dtsi"
#include "am572x-idk-common.dtsi"
/ {
model = "TI AM5748 IDK";
compatible = "ti,am5728-idk", "ti,dra762", "ti,dra7";
};
&qspi {
spi-max-frequency = <96000000>;
m25p80@0 {
spi-max-frequency = <96000000>;
};
};

2
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
View File

@ -388,7 +388,7 @@
};
&cpu0 {
cpu0-supply = <&smps12_reg>;
vdd-supply = <&smps12_reg>;
voltage-tolerance = <1>;
};

8
arch/arm/boot/dts/dra62x-j5eco-evm.dts
View File

@ -74,19 +74,19 @@
label = "X-Loader";
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "U-Boot";
reg = <0x80000 0x1c0000>;
};
partition@0x1c0000 {
partition@1c0000 {
label = "Environment";
reg = <0x240000 0x40000>;
};
partition@0x280000 {
partition@280000 {
label = "Kernel";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
partition@780000 {
label = "Filesystem";
reg = <0x780000 0xf880000>;
};

2
arch/arm/boot/dts/dra7-evm.dts
View File

@ -361,7 +361,7 @@
};
&cpu0 {
cpu0-supply = <&smps123_reg>;
vdd-supply = <&smps123_reg>;
};
&omap_dwc3_2 {

36
arch/arm/boot/dts/dra7.dtsi
View File

@ -93,6 +93,8 @@
cooling-min-level = <0>;
cooling-max-level = <2>;
#cooling-cells = <2>; /* min followed by max */
vbb-supply = <&abb_mpu>;
};
};
@ -102,16 +104,26 @@
opp_nom-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1060000 850000 1150000>;
opp-microvolt = <1060000 850000 1150000>,
<1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};
opp_od-1176000000 {
opp-hz = /bits/ 64 <1176000000>;
opp-microvolt = <1160000 885000 1160000>;
opp-microvolt = <1160000 885000 1160000>,
<1160000 885000 1160000>;
opp-supported-hw = <0xFF 0x02>;
};
opp_high@1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1210000 950000 1250000>,
<1210000 950000 1250000>;
opp-supported-hw = <0xFF 0x04>;
};
};
/*
@ -304,7 +316,6 @@
* node and enable pcie1_ep mode.
*/
pcie1_rc: pcie@51000000 {
compatible = "ti,dra7-pcie";
reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
reg-names = "rc_dbics", "ti_conf", "config";
interrupts = <0 232 0x4>, <0 233 0x4>;
@ -334,7 +345,6 @@
};
pcie1_ep: pcie_ep@51000000 {
compatible = "ti,dra7-pcie-ep";
reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
interrupts = <0 232 0x4>;
@ -356,8 +366,7 @@
ranges = <0x51800000 0x51800000 0x3000
0x0 0x30000000 0x10000000>;
status = "disabled";
pcie@51800000 {
compatible = "ti,dra7-pcie";
pcie2_rc: pcie@51800000 {
reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
reg-names = "rc_dbics", "ti_conf", "config";
interrupts = <0 355 0x4>, <0 356 0x4>;
@ -1386,7 +1395,7 @@
ranges;
reg = <0x4a090000 0x20>;
ti,hwmods = "ocp2scp3";
sata_phy: phy@4A096000 {
sata_phy: phy@4a096000 {
compatible = "ti,phy-pipe3-sata";
reg = <0x4A096000 0x80>, /* phy_rx */
<0x4A096400 0x64>, /* phy_tx */
@ -2077,6 +2086,19 @@
clocks = <&l3_iclk_div>;
clock-names = "fck";
};
opp_supply_mpu: opp-supply@4a003b20 {
compatible = "ti,omap5-opp-supply";
reg = <0x4a003b20 0xc>;
ti,efuse-settings = <
/* uV offset */
1060000 0x0
1160000 0x4
1210000 0x8
>;
ti,absolute-max-voltage-uv = <1500000>;
};
};
thermal_zones: thermal-zones {

4
arch/arm/boot/dts/dra72-evm-tps65917.dtsi
View File

@ -148,3 +148,7 @@
&mmc1 {
vqmmc-supply = <&ldo1_reg>;
};
&cpu0 {
vdd-supply = <&smps1_reg>;
};

12
arch/arm/boot/dts/dra72x.dtsi
View File

@ -50,3 +50,15 @@
status = "disabled";
};
};
&pcie1_rc {
compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
};
&pcie1_ep {
compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
};
&pcie2_rc {
compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
};

12
arch/arm/boot/dts/dra74x.dtsi
View File

@ -124,3 +124,15 @@
status = "disabled";
};
};
&pcie1_rc {
compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
};
&pcie1_ep {
compatible = "ti,dra746-pcie-ep", "ti,dra7-pcie-ep";
};
&pcie2_rc {
compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
};

16
arch/arm/boot/dts/dra76-evm.dts
View File

@ -422,3 +422,19 @@
spi-max-frequency = <96000000>;
};
};
&pcie2_phy {
status = "okay";
};
&pcie1_rc {
num-lanes = <2>;
phys = <&pcie1_phy>, <&pcie2_phy>;
phy-names = "pcie-phy0", "pcie-phy1";
};
&pcie1_ep {
num-lanes = <2>;
phys = <&pcie1_phy>, <&pcie2_phy>;
phy-names = "pcie-phy0", "pcie-phy1";
};

8
arch/arm/boot/dts/omap3-cm-t3x.dtsi
View File

@ -306,19 +306,19 @@
label = "xloader";
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "uboot";
reg = <0x80000 0x1e0000>;
};
partition@0x260000 {
partition@260000 {
label = "uboot environment";
reg = <0x260000 0x40000>;
};
partition@0x2a0000 {
partition@2a0000 {
label = "linux";
reg = <0x2a0000 0x400000>;
};
partition@0x6a0000 {
partition@6a0000 {
label = "rootfs";
reg = <0x6a0000 0x1f880000>;
};

8
arch/arm/boot/dts/omap3-evm-37xx.dts
View File

@ -90,19 +90,19 @@
label = "X-Loader";
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "U-Boot";
reg = <0x80000 0x1c0000>;
};
partition@0x1c0000 {
partition@1c0000 {
label = "Environment";
reg = <0x240000 0x40000>;
};
partition@0x280000 {
partition@280000 {
label = "Kernel";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
partition@780000 {
label = "Filesystem";
reg = <0x780000 0x1f880000>;
};

2
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -86,7 +86,7 @@
/* lcd panel */
lcd: td028ttec1@0 {
compatible = "toppoly,td028ttec1";
compatible = "tpo,td028ttec1";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;

8
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -405,22 +405,22 @@
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "u-boot";
reg = <0x80000 0x1e0000>;
};
partition@0x260000 {
partition@260000 {
label = "u-boot-environment";
reg = <0x260000 0x20000>;
};
partition@0x280000 {
partition@280000 {
label = "kernel";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
partition@780000 {
label = "filesystem";
reg = <0x780000 0xf880000>;
};

88
arch/arm/boot/dts/omap3-n950.dts
View File

@ -51,6 +51,26 @@
};
};
&omap3_pmx_core {
dsi_pins: pinmux_dsi_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE1) /* dsi_dx0 - data0+ */
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE1) /* dsi_dy0 - data0- */
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE1) /* dsi_dx1 - clk+ */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE1) /* dsi_dy1 - clk- */
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE1) /* dsi_dx2 - data1+ */
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE1) /* dsi_dy2 - data1- */
>;
};
display_pins: pinmux_display_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20ca, PIN_INPUT | MUX_MODE4) /* gpio 62 - display te */
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 - display reset */
>;
};
};
&i2c2 {
smia_1: camera@10 {
compatible = "nokia,smia";
@ -186,3 +206,71 @@
st,max-limit-y = <32>;
st,max-limit-z = <32>;
};
&dss {
status = "ok";
vdda_video-supply = <&vdac>;
};
&dsi {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&dsi_pins>;
vdd-supply = <&vpll2>;
port {
dsi_out_ep: endpoint {
remote-endpoint = <&lcd0_in>;
lanes = <2 3 0 1 4 5>;
};
};
lcd0: display {
compatible = "nokia,himalaya", "panel-dsi-cm";
label = "lcd0";
pinctrl-names = "default";
pinctrl-0 = <&display_pins>;
vpnl-supply = <&vmmc2>;
vddi-supply = <&vio>;
reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
te-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; /* 62 */
width-mm = <49>; /* 48.960 mm */
height-mm = <88>; /* 88.128 mm */
/* TODO:
* - panel is upside-down
* - top + bottom 5px are not visible
*/
panel-timing {
clock-frequency = <0>; /* Calculated by dsi */
hback-porch = <2>;
hactive = <480>;
hfront-porch = <0>;
hsync-len = <2>;
vback-porch = <1>;
vactive = <864>;
vfront-porch = <0>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd0_in: endpoint {
remote-endpoint = <&dsi_out_ep>;
};
};
};
};

2
arch/arm/boot/dts/omap3-pandora-common.dtsi
View File

@ -627,7 +627,7 @@
lcd: lcd@1 {
reg = <1>; /* CS1 */
compatible = "omapdss,tpo,td043mtea1";
compatible = "tpo,td043mtea1";
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;

6
arch/arm/boot/dts/omap4-droid4-xt894.dts
View File

@ -177,6 +177,10 @@
vddi-supply = <&lcd_regulator>;
reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
width-mm = <50>;
height-mm = <89>;
backlight = <&lcd_backlight>;
panel-timing {
clock-frequency = <0>; /* Calculated by dsi */
@ -346,7 +350,7 @@
enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
backlight {
lcd_backlight: backlight {
compatible = "ti,lm3532-backlight";
lcd {

3
include/dt-bindings/pinctrl/am43xx.h
View File

@ -25,7 +25,8 @@
#define DS0_FORCE_OFF_MODE (1 << 24)
#define DS0_INPUT (1 << 25)
#define DS0_FORCE_OUT_HIGH (1 << 26)
#define DS0_PULL_UP_DOWN_EN (1 << 27)
#define DS0_PULL_UP_DOWN_EN (0 << 27)
#define DS0_PULL_UP_DOWN_DIS (1 << 27)
#define DS0_PULL_UP_SEL (1 << 28)
#define WAKEUP_ENABLE (1 << 29)