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KVM: X86: Fix operand/address-size during instruction decoding
Pedro reported: During tests that we conducted on KVM, we noticed that executing a "PUSH %ES" instruction under KVM produces different results on both memory and the SP register depending on whether EPT support is enabled. With EPT the SP is reduced by 4 bytes (and the written value is 0-padded) but without EPT support it is only reduced by 2 bytes. The difference can be observed when the CS.DB field is 1 (32-bit) but not when it's 0 (16-bit). The internal segment descriptor cache exist even in real/vm8096 mode. The CS.D also should be respected instead of just default operand/address-size/66H prefix/67H prefix during instruction decoding. This patch fixes it by also adjusting operand/address-size according to CS.D. Reported-by: Pedro Fonseca <pfonseca@cs.washington.edu> Tested-by: Pedro Fonseca <pfonseca@cs.washington.edu> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Nadav Amit <nadav.amit@gmail.com> Cc: Pedro Fonseca <pfonseca@cs.washington.edu> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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@ -5000,6 +5000,8 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len)
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bool op_prefix = false;
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bool has_seg_override = false;
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struct opcode opcode;
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u16 dummy;
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struct desc_struct desc;
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ctxt->memop.type = OP_NONE;
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ctxt->memopp = NULL;
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@ -5018,6 +5020,11 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len)
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switch (mode) {
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case X86EMUL_MODE_REAL:
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case X86EMUL_MODE_VM86:
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def_op_bytes = def_ad_bytes = 2;
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ctxt->ops->get_segment(ctxt, &dummy, &desc, NULL, VCPU_SREG_CS);
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if (desc.d)
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def_op_bytes = def_ad_bytes = 4;
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break;
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case X86EMUL_MODE_PROT16:
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def_op_bytes = def_ad_bytes = 2;
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break;
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