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Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 RAS updates from Thomas Gleixner: "A small set of changes to the RAS core: - Rework of the MCE bank scanning code - Y2038 converion" * 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Cleanup __mc_scan_banks() x86/mce: Carve out bank scanning code x86/mce: Remove !banks check x86/mce: Carve out the crashing_cpu check x86/mce: Always use 64-bit timestamps
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commit
37a1604680
@ -123,8 +123,8 @@ void mce_setup(struct mce *m)
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{
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memset(m, 0, sizeof(struct mce));
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m->cpu = m->extcpu = smp_processor_id();
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/* We hope get_seconds stays lockless */
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m->time = get_seconds();
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/* need the internal __ version to avoid deadlocks */
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m->time = __ktime_get_real_seconds();
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m->cpuvendor = boot_cpu_data.x86_vendor;
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m->cpuid = cpuid_eax(1);
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m->socketid = cpu_data(m->extcpu).phys_proc_id;
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@ -1104,6 +1104,101 @@ static void mce_unmap_kpfn(unsigned long pfn)
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}
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#endif
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/*
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* Cases where we avoid rendezvous handler timeout:
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* 1) If this CPU is offline.
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*
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* 2) If crashing_cpu was set, e.g. we're entering kdump and we need to
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* skip those CPUs which remain looping in the 1st kernel - see
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* crash_nmi_callback().
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*
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* Note: there still is a small window between kexec-ing and the new,
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* kdump kernel establishing a new #MC handler where a broadcasted MCE
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* might not get handled properly.
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*/
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static bool __mc_check_crashing_cpu(int cpu)
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{
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if (cpu_is_offline(cpu) ||
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(crashing_cpu != -1 && crashing_cpu != cpu)) {
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u64 mcgstatus;
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mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
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if (mcgstatus & MCG_STATUS_RIPV) {
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mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
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return true;
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}
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}
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return false;
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}
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static void __mc_scan_banks(struct mce *m, struct mce *final,
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unsigned long *toclear, unsigned long *valid_banks,
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int no_way_out, int *worst)
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{
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struct mca_config *cfg = &mca_cfg;
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int severity, i;
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for (i = 0; i < cfg->banks; i++) {
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__clear_bit(i, toclear);
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if (!test_bit(i, valid_banks))
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continue;
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if (!mce_banks[i].ctl)
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continue;
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m->misc = 0;
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m->addr = 0;
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m->bank = i;
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m->status = mce_rdmsrl(msr_ops.status(i));
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if (!(m->status & MCI_STATUS_VAL))
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continue;
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/*
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* Corrected or non-signaled errors are handled by
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* machine_check_poll(). Leave them alone, unless this panics.
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*/
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if (!(m->status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
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!no_way_out)
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continue;
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/* Set taint even when machine check was not enabled. */
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add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
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severity = mce_severity(m, cfg->tolerant, NULL, true);
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/*
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* When machine check was for corrected/deferred handler don't
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* touch, unless we're panicking.
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*/
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if ((severity == MCE_KEEP_SEVERITY ||
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severity == MCE_UCNA_SEVERITY) && !no_way_out)
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continue;
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__set_bit(i, toclear);
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/* Machine check event was not enabled. Clear, but ignore. */
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if (severity == MCE_NO_SEVERITY)
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continue;
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mce_read_aux(m, i);
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/* assuming valid severity level != 0 */
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m->severity = severity;
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mce_log(m);
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if (severity > *worst) {
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*final = *m;
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*worst = severity;
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}
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}
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/* mce_clear_state will clear *final, save locally for use later */
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*m = *final;
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}
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/*
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* The actual machine check handler. This only handles real
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* exceptions when something got corrupted coming in through int 18.
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@ -1118,68 +1213,45 @@ static void mce_unmap_kpfn(unsigned long pfn)
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*/
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void do_machine_check(struct pt_regs *regs, long error_code)
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{
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DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
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DECLARE_BITMAP(toclear, MAX_NR_BANKS);
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struct mca_config *cfg = &mca_cfg;
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int cpu = smp_processor_id();
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char *msg = "Unknown";
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struct mce m, *final;
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int i;
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int worst = 0;
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int severity;
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/*
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* Establish sequential order between the CPUs entering the machine
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* check handler.
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*/
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int order = -1;
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/*
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* If no_way_out gets set, there is no safe way to recover from this
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* MCE. If mca_cfg.tolerant is cranked up, we'll try anyway.
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*/
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int no_way_out = 0;
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/*
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* If kill_it gets set, there might be a way to recover from this
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* error.
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*/
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int kill_it = 0;
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DECLARE_BITMAP(toclear, MAX_NR_BANKS);
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DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
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char *msg = "Unknown";
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/*
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* MCEs are always local on AMD. Same is determined by MCG_STATUS_LMCES
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* on Intel.
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*/
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int lmce = 1;
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int cpu = smp_processor_id();
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/*
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* Cases where we avoid rendezvous handler timeout:
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* 1) If this CPU is offline.
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*
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* 2) If crashing_cpu was set, e.g. we're entering kdump and we need to
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* skip those CPUs which remain looping in the 1st kernel - see
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* crash_nmi_callback().
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*
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* Note: there still is a small window between kexec-ing and the new,
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* kdump kernel establishing a new #MC handler where a broadcasted MCE
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* might not get handled properly.
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*/
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if (cpu_is_offline(cpu) ||
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(crashing_cpu != -1 && crashing_cpu != cpu)) {
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u64 mcgstatus;
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mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
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if (mcgstatus & MCG_STATUS_RIPV) {
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mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
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return;
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}
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}
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if (__mc_check_crashing_cpu(cpu))
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return;
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ist_enter(regs);
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this_cpu_inc(mce_exception_count);
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if (!cfg->banks)
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goto out;
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mce_gather_info(&m, regs);
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m.tsc = rdtsc();
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@ -1220,67 +1292,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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order = mce_start(&no_way_out);
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}
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for (i = 0; i < cfg->banks; i++) {
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__clear_bit(i, toclear);
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if (!test_bit(i, valid_banks))
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continue;
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if (!mce_banks[i].ctl)
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continue;
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m.misc = 0;
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m.addr = 0;
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m.bank = i;
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m.status = mce_rdmsrl(msr_ops.status(i));
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if ((m.status & MCI_STATUS_VAL) == 0)
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continue;
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/*
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* Non uncorrected or non signaled errors are handled by
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* machine_check_poll. Leave them alone, unless this panics.
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*/
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if (!(m.status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
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!no_way_out)
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continue;
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/*
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* Set taint even when machine check was not enabled.
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*/
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add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
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severity = mce_severity(&m, cfg->tolerant, NULL, true);
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/*
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* When machine check was for corrected/deferred handler don't
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* touch, unless we're panicing.
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*/
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if ((severity == MCE_KEEP_SEVERITY ||
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severity == MCE_UCNA_SEVERITY) && !no_way_out)
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continue;
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__set_bit(i, toclear);
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if (severity == MCE_NO_SEVERITY) {
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/*
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* Machine check event was not enabled. Clear, but
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* ignore.
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*/
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continue;
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}
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mce_read_aux(&m, i);
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/* assuming valid severity level != 0 */
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m.severity = severity;
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mce_log(&m);
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if (severity > worst) {
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*final = m;
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worst = severity;
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}
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}
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/* mce_clear_state will clear *final, save locally for use later */
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m = *final;
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__mc_scan_banks(&m, final, toclear, valid_banks, no_way_out, &worst);
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if (!no_way_out)
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mce_clear_state(toclear);
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@ -1319,7 +1331,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
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if (worst > 0)
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mce_report_event(regs);
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mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
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out:
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sync_core();
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if (worst != MCE_AR_SEVERITY && !kill_it)
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