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STM32 DT updates for v5.6, round 1
Highlights: ---------- MPU part: -Add PWM support on DK2 board. -Add counter support to STM32 timers. -Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO extension connector on EV1 & DKx boards. -Add ADC support on ED1 board. -Update devicetree files split to better fit to STM32MP15 SOC & boards diversity. -Fix issues seen during YAML validation. -Enable Ethernet (MAC) TX clock gating during low-power mode. -Enable USB OTG HS support on DKx boards. -Enable USB Host EHCI on DKx boards. MCU part: -Fix issues seen during YAML validation. -----BEGIN PGP SIGNATURE----- iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl4XFegYHGFsZXhhbmRy ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCFlvQP/RtwRkAPRWd5HHJraAzEj4gJ vx5Hcm8TW4Fsu1oQnOPGHBNUJcoj5QvaCKhyqBP/gaffDnzJz4GZsaAGZ0FyQJd7 7IWqWOp2Ek2d5bklpLwmn4KU/5ZAqWTKOL1hYoEAvkXHdmxzcQi7pZOrvCG75GGs lsqabxtx0S3NCCmVHy/CsmK2qkAxbASUG2oAn3pMIncUxdUyq2u97qhJB0zjM4TL wE8nXNDPZk4P2ePi675PNo/nVP1WTbFHReHd+SCtjuKgQGFKIpnp3pNSP4jIrN+e e2Wcb+5zQ10ZGntDDAwN+Ig+Nv7hOMLdbBB29kmRYoD4szFcYvjt+kdnXms/MWw8 vwBW6h6YLQ56zzhmcvD8vIwo5jI3l8jO7Gxk4OlK2tsyR+4HXpntkYuq2jOuVqoF UuTrL4hMSoXrUOX+lfaGFC6x0NmblE+NWqbXEWfQ+mqb42z69O1d6Ws2vcl3CgWc yUpCMOPkzb6ZIzc77+884COneZKqxRtpjNE7vaIUBEzVdxF6IIyaABBhBNbM3SE2 R/ibKOVh1OWpaYIi2qK7jhUMb5WjVt1jTCDVQmB1sYXzfbA2bzzc3iRVAwd1Oioc W/wn7G3kh4PcwM8QHlbtuJwa5j/BBF4CNAk+pTXuVKX0eBgfgxGOE+PLTUowH1HA iYXi2dMogCnXHxDvIBtX =ch11 -----END PGP SIGNATURE----- Merge tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.6, round 1 Highlights: ---------- MPU part: -Add PWM support on DK2 board. -Add counter support to STM32 timers. -Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO extension connector on EV1 & DKx boards. -Add ADC support on ED1 board. -Update devicetree files split to better fit to STM32MP15 SOC & boards diversity. -Fix issues seen during YAML validation. -Enable Ethernet (MAC) TX clock gating during low-power mode. -Enable USB OTG HS support on DKx boards. -Enable USB Host EHCI on DKx boards. MCU part: -Fix issues seen during YAML validation. * tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits) ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco ARM: dts: stm32: change nvmem node name on stm32mp1 ARM: dts: stm32: change nvmem node name on stm32f429 ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15 ARM: dts: stm32: fix dma controller node name on stm32mp157c ARM: dts: stm32: fix dma controller node name on stm32f743 ARM: dts: stm32: fix dma controller node name on stm32f746 ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1 ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746 ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429 ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15 ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15 ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity ... Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.com Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
37365e152a
@ -95,6 +95,13 @@
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regulator-max-microvolt = <3300000>;
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};
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vdd_panel: vdd-panel {
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compatible = "regulator-fixed";
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regulator-name = "vdd_panel";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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leds {
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compatible = "gpio-leds";
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green {
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@ -138,6 +145,7 @@
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panel_rgb: panel-rgb {
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compatible = "ampire,am-480272h3tmqw-t01h";
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power-supply = <&vdd_panel>;
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status = "okay";
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port {
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panel_in_rgb: endpoint {
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@ -163,7 +163,7 @@
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st,bank-name = "GPIOK";
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};
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usart1_pins_a: usart1@0 {
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usart1_pins_a: usart1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
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bias-disable;
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@ -176,7 +176,7 @@
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};
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};
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usart3_pins_a: usart3@0 {
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usart3_pins_a: usart3-0 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
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bias-disable;
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@ -189,7 +189,7 @@
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};
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};
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usbotg_fs_pins_a: usbotg_fs@0 {
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usbotg_fs_pins_a: usbotg-fs-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
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<STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
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@ -200,7 +200,7 @@
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};
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};
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usbotg_fs_pins_b: usbotg_fs@1 {
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usbotg_fs_pins_b: usbotg-fs-1 {
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pins {
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pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
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<STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
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@ -211,7 +211,7 @@
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};
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};
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usbotg_hs_pins_a: usbotg_hs@0 {
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usbotg_hs_pins_a: usbotg-hs-0 {
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pins {
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pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
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<STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
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@ -231,7 +231,7 @@
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};
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};
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ethernet_mii: mii@0 {
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ethernet_mii: mii-0 {
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pins {
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pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
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<STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
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@ -251,13 +251,13 @@
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};
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};
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adc3_in8_pin: adc@200 {
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adc3_in8_pin: adc-200 {
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pins {
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pinmux = <STM32_PINMUX('F', 10, ANALOG)>;
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};
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};
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pwm1_pins: pwm@1 {
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pwm1_pins: pwm-1 {
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pins {
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pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */
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<STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
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@ -265,14 +265,14 @@
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};
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};
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pwm3_pins: pwm@3 {
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pwm3_pins: pwm-3 {
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pins {
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pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */
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<STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
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};
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};
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i2c1_pins: i2c1@0 {
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i2c1_pins: i2c1-0 {
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pins {
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pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */
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<STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
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@ -282,7 +282,7 @@
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};
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};
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ltdc_pins: ltdc@0 {
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ltdc_pins: ltdc-0 {
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pins {
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pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
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<STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
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@ -316,7 +316,7 @@
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};
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};
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dcmi_pins: dcmi@0 {
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dcmi_pins: dcmi-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */
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<STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
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@ -339,7 +339,7 @@
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};
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};
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sdio_pins: sdio_pins@0 {
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sdio_pins: sdio-pins-0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
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@ -352,7 +352,7 @@
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};
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};
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sdio_pins_od: sdio_pins_od@0 {
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sdio_pins_od: sdio-pins-od-0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
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@ -80,7 +80,7 @@
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};
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soc {
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romem: nvmem@1fff7800 {
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romem: efuse@1fff7800 {
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compatible = "st,stm32f4-otp";
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reg = <0x1fff7800 0x400>;
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#address-cells = <1>;
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@ -318,7 +318,6 @@
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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clocks = <&rcc 1 CLK_RTC>;
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clock-names = "ck_rtc";
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assigned-clocks = <&rcc 1 CLK_RTC>;
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assigned-clock-parents = <&rcc 1 CLK_LSE>;
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interrupt-parent = <&exti>;
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@ -789,7 +788,6 @@
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rng: rng@50060800 {
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compatible = "st,stm32-rng";
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reg = <0x50060800 0x400>;
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interrupts = <80>;
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clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
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};
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@ -76,6 +76,13 @@
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regulator-max-microvolt = <3300000>;
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};
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vdd_dsi: vdd-dsi {
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compatible = "regulator-fixed";
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regulator-name = "vdd_dsi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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soc {
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dma-ranges = <0xc0000000 0x0 0x10000000>;
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};
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@ -155,6 +162,7 @@
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compatible = "orisetech,otm8009a";
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reg = <0>; /* dsi virtual channel (0..3) */
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reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
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power-supply = <&vdd_dsi>;
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status = "okay";
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port {
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@ -127,7 +127,7 @@
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st,bank-name = "GPIOK";
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};
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cec_pins_a: cec@0 {
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cec_pins_a: cec-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */
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slew-rate = <0>;
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@ -136,7 +136,7 @@
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};
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};
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usart1_pins_a: usart1@0 {
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usart1_pins_a: usart1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
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bias-disable;
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@ -149,7 +149,7 @@
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};
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};
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usart1_pins_b: usart1@1 {
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usart1_pins_b: usart1-1 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
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bias-disable;
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@ -162,7 +162,7 @@
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};
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};
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i2c1_pins_b: i2c1@0 {
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i2c1_pins_b: i2c1-0 {
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pins {
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pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
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<STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
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@ -172,7 +172,7 @@
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};
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};
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usbotg_hs_pins_a: usbotg-hs@0 {
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usbotg_hs_pins_a: usbotg-hs-0 {
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pins {
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pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
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<STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
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@ -192,7 +192,7 @@
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};
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};
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usbotg_hs_pins_b: usbotg-hs@1 {
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usbotg_hs_pins_b: usbotg-hs-1 {
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pins {
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pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
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<STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
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@ -212,7 +212,7 @@
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};
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};
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usbotg_fs_pins_a: usbotg-fs@0 {
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usbotg_fs_pins_a: usbotg-fs-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
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<STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
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@ -223,7 +223,7 @@
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};
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};
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sdio_pins_a: sdio_pins_a@0 {
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sdio_pins_a: sdio-pins-a-0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
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@ -236,7 +236,7 @@
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};
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};
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sdio_pins_od_a: sdio_pins_od_a@0 {
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sdio_pins_od_a: sdio-pins-od-a-0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
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@ -254,7 +254,7 @@
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};
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};
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sdio_pins_b: sdio_pins_b@0 {
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sdio_pins_b: sdio-pins-b-0 {
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pins {
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pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
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<STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
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@ -267,7 +267,7 @@
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};
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};
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sdio_pins_od_b: sdio_pins_od_b@0 {
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sdio_pins_od_b: sdio-pins-od-b-0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
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<STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
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@ -300,7 +300,6 @@
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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clocks = <&rcc 1 CLK_RTC>;
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clock-names = "ck_rtc";
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assigned-clocks = <&rcc 1 CLK_RTC>;
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assigned-clock-parents = <&rcc 1 CLK_LSE>;
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interrupt-parent = <&exti>;
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@ -587,7 +586,7 @@
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assigned-clock-rates = <1000000>;
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};
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dma1: dma@40026000 {
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dma1: dma-controller@40026000 {
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compatible = "st,stm32-dma";
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reg = <0x40026000 0x400>;
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interrupts = <11>,
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@ -603,7 +602,7 @@
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status = "disabled";
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};
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dma2: dma@40026400 {
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dma2: dma-controller@40026400 {
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compatible = "st,stm32-dma";
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reg = <0x40026400 0x400>;
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interrupts = <56>,
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@ -231,7 +231,7 @@
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status = "disabled";
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};
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dma1: dma@40020000 {
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dma1: dma-controller@40020000 {
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compatible = "st,stm32-dma";
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reg = <0x40020000 0x400>;
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interrupts = <11>,
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@ -249,7 +249,7 @@
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status = "disabled";
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};
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dma2: dma@40020400 {
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dma2: dma-controller@40020400 {
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compatible = "st,stm32-dma";
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reg = <0x40020400 0x400>;
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interrupts = <56>,
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@ -329,7 +329,7 @@
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status = "disabled";
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};
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mdma1: dma@52000000 {
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mdma1: dma-controller@52000000 {
|
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compatible = "st,stm32h7-mdma";
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reg = <0x52000000 0x1000>;
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interrupts = <122>;
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1092
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
Normal file
1092
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
@ -20,12 +20,6 @@
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device_type = "cpu";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
compatible = "arm,cortex-a7";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
@ -148,6 +142,11 @@
|
||||
reg = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timers3: timer@40001000 {
|
||||
@ -177,6 +176,11 @@
|
||||
reg = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timers4: timer@40002000 {
|
||||
@ -204,6 +208,11 @@
|
||||
reg = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timers5: timer@40003000 {
|
||||
@ -233,6 +242,11 @@
|
||||
reg = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timers6: timer@40004000 {
|
||||
@ -589,6 +603,11 @@
|
||||
reg = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
timers8: timer@44001000 {
|
||||
@ -620,6 +639,11 @@
|
||||
reg = <7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
counter {
|
||||
compatible = "st,stm32-timer-counter";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
usart6: serial@44003000 {
|
||||
@ -923,33 +947,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
m_can1: can@4400e000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
m_can2: can@4400f000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma1: dma@48000000 {
|
||||
dma1: dma-controller@48000000 {
|
||||
compatible = "st,stm32-dma";
|
||||
reg = <0x48000000 0x400>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@ -966,7 +964,7 @@
|
||||
dma-requests = <8>;
|
||||
};
|
||||
|
||||
dma2: dma@48001000 {
|
||||
dma2: dma-controller@48001000 {
|
||||
compatible = "st,stm32-dma";
|
||||
reg = <0x48001000 0x400>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
|
||||
@ -1030,6 +1028,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc3: sdmmc@48004000 {
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
arm,primecell-periphid = <0x10153180>;
|
||||
reg = <0x48004000 0x400>;
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cmd_irq";
|
||||
clocks = <&rcc SDMMC3_K>;
|
||||
clock-names = "apb_pclk";
|
||||
resets = <&rcc SDMMC3_R>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
max-frequency = <120000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbotg_hs: usb-otg@49000000 {
|
||||
compatible = "snps,dwc2";
|
||||
reg = <0x49000000 0x10000>;
|
||||
@ -1242,15 +1255,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cryp1: cryp@54001000 {
|
||||
compatible = "st,stm32mp1-cryp";
|
||||
reg = <0x54001000 0x400>;
|
||||
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CRYP1>;
|
||||
resets = <&rcc CRYP1_R>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hash1: hash@54002000 {
|
||||
compatible = "st,stm32f756-hash";
|
||||
reg = <0x54002000 0x400>;
|
||||
@ -1271,7 +1275,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdma1: dma@58000000 {
|
||||
mdma1: dma-controller@58000000 {
|
||||
compatible = "st,stm32h7-mdma";
|
||||
reg = <0x58000000 0x1000>;
|
||||
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@ -1318,13 +1322,29 @@
|
||||
arm,primecell-periphid = <0x10153180>;
|
||||
reg = <0x58005000 0x1000>;
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cmd_irq";
|
||||
interrupt-names = "cmd_irq";
|
||||
clocks = <&rcc SDMMC1_K>;
|
||||
clock-names = "apb_pclk";
|
||||
resets = <&rcc SDMMC1_R>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
max-frequency = <120000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdmmc2: sdmmc@58007000 {
|
||||
compatible = "arm,pl18x", "arm,primecell";
|
||||
arm,primecell-periphid = <0x10153180>;
|
||||
reg = <0x58007000 0x1000>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cmd_irq";
|
||||
clocks = <&rcc SDMMC2_K>;
|
||||
clock-names = "apb_pclk";
|
||||
resets = <&rcc SDMMC2_R>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
max-frequency = <120000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
crc1: crc@58009000 {
|
||||
@ -1349,16 +1369,15 @@
|
||||
clock-names = "stmmaceth",
|
||||
"mac-clk-tx",
|
||||
"mac-clk-rx",
|
||||
"ethstp",
|
||||
"syscfg-clk";
|
||||
"ethstp";
|
||||
clocks = <&rcc ETHMAC>,
|
||||
<&rcc ETHTX>,
|
||||
<&rcc ETHRX>,
|
||||
<&rcc ETHSTP>,
|
||||
<&rcc SYSCFG>;
|
||||
<&rcc ETHSTP>;
|
||||
st,syscon = <&syscfg 0x4>;
|
||||
snps,mixed-burst;
|
||||
snps,pbl = <2>;
|
||||
snps,en-tx-lpi-clockgating;
|
||||
snps,axi-config = <&stmmac_axi_config_0>;
|
||||
snps,tso;
|
||||
status = "disabled";
|
||||
@ -1383,26 +1402,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpu: gpu@59000000 {
|
||||
compatible = "vivante,gc";
|
||||
reg = <0x59000000 0x800>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc GPU>, <&rcc GPU_K>;
|
||||
clock-names = "bus" ,"core";
|
||||
resets = <&rcc GPU_R>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsi: dsi@5a000000 {
|
||||
compatible = "st,stm32-dsi";
|
||||
reg = <0x5a000000 0x800>;
|
||||
clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
|
||||
clock-names = "pclk", "ref", "px_clk";
|
||||
resets = <&rcc DSI_R>;
|
||||
reset-names = "apb";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ltdc: display-controller@5a001000 {
|
||||
compatible = "st,stm32-ltdc";
|
||||
reg = <0x5a001000 0x400>;
|
||||
@ -1486,7 +1485,7 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsec: nvmem@5c005000 {
|
||||
bsec: efuse@5c005000 {
|
||||
compatible = "st,stm32mp15-bsec";
|
||||
reg = <0x5c005000 0x400>;
|
||||
#address-cells = <1>;
|
||||
@ -1511,12 +1510,170 @@
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/*
|
||||
* Break node order to solve dependency probe issue between
|
||||
* pinctrl and exti.
|
||||
*/
|
||||
pinctrl: pin-controller@50002000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-pinctrl";
|
||||
ranges = <0 0x50002000 0xa400>;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
pins-are-numbered;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0x400>;
|
||||
clocks = <&rcc GPIOA>;
|
||||
st,bank-name = "GPIOA";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x1000 0x400>;
|
||||
clocks = <&rcc GPIOB>;
|
||||
st,bank-name = "GPIOB";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x2000 0x400>;
|
||||
clocks = <&rcc GPIOC>;
|
||||
st,bank-name = "GPIOC";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x3000 0x400>;
|
||||
clocks = <&rcc GPIOD>;
|
||||
st,bank-name = "GPIOD";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x4000 0x400>;
|
||||
clocks = <&rcc GPIOE>;
|
||||
st,bank-name = "GPIOE";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x5000 0x400>;
|
||||
clocks = <&rcc GPIOF>;
|
||||
st,bank-name = "GPIOF";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x6000 0x400>;
|
||||
clocks = <&rcc GPIOG>;
|
||||
st,bank-name = "GPIOG";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x7000 0x400>;
|
||||
clocks = <&rcc GPIOH>;
|
||||
st,bank-name = "GPIOH";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x8000 0x400>;
|
||||
clocks = <&rcc GPIOI>;
|
||||
st,bank-name = "GPIOI";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioj: gpio@5000b000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x9000 0x400>;
|
||||
clocks = <&rcc GPIOJ>;
|
||||
st,bank-name = "GPIOJ";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiok: gpio@5000c000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0xa000 0x400>;
|
||||
clocks = <&rcc GPIOK>;
|
||||
st,bank-name = "GPIOK";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_z: pin-controller-z@54004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-z-pinctrl";
|
||||
ranges = <0 0x54004000 0x400>;
|
||||
pins-are-numbered;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0 0x400>;
|
||||
clocks = <&rcc GPIOZ>;
|
||||
st,bank-name = "GPIOZ";
|
||||
st,bank-ioport = <11>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mlahb {
|
||||
compatible = "simple-bus";
|
||||
mlahb: ahb {
|
||||
compatible = "st,mlahb", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
dma-ranges = <0x00000000 0x38000000 0x10000>,
|
||||
<0x10000000 0x10000000 0x60000>,
|
||||
<0x30000000 0x30000000 0x60000>;
|
||||
45
arch/arm/boot/dts/stm32mp153.dtsi
Normal file
45
arch/arm/boot/dts/stm32mp153.dtsi
Normal file
@ -0,0 +1,45 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
#include "stm32mp151.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu1: cpu@1 {
|
||||
compatible = "arm,cortex-a7";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
m_can1: can@4400e000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
m_can2: can@4400f000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,953 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
|
||||
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
|
||||
*/
|
||||
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
||||
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-pinctrl";
|
||||
ranges = <0 0x50002000 0xa400>;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
pins-are-numbered;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0x400>;
|
||||
clocks = <&rcc GPIOA>;
|
||||
st,bank-name = "GPIOA";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x1000 0x400>;
|
||||
clocks = <&rcc GPIOB>;
|
||||
st,bank-name = "GPIOB";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x2000 0x400>;
|
||||
clocks = <&rcc GPIOC>;
|
||||
st,bank-name = "GPIOC";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x3000 0x400>;
|
||||
clocks = <&rcc GPIOD>;
|
||||
st,bank-name = "GPIOD";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x4000 0x400>;
|
||||
clocks = <&rcc GPIOE>;
|
||||
st,bank-name = "GPIOE";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x5000 0x400>;
|
||||
clocks = <&rcc GPIOF>;
|
||||
st,bank-name = "GPIOF";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x6000 0x400>;
|
||||
clocks = <&rcc GPIOG>;
|
||||
st,bank-name = "GPIOG";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x7000 0x400>;
|
||||
clocks = <&rcc GPIOH>;
|
||||
st,bank-name = "GPIOH";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x8000 0x400>;
|
||||
clocks = <&rcc GPIOI>;
|
||||
st,bank-name = "GPIOI";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpioj: gpio@5000b000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x9000 0x400>;
|
||||
clocks = <&rcc GPIOJ>;
|
||||
st,bank-name = "GPIOJ";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiok: gpio@5000c000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0xa000 0x400>;
|
||||
clocks = <&rcc GPIOK>;
|
||||
st,bank-name = "GPIOK";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc12_ain_pins_a: adc12-ain-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
|
||||
<STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
|
||||
<STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
|
||||
<STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
|
||||
};
|
||||
};
|
||||
|
||||
adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
|
||||
<STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
|
||||
};
|
||||
};
|
||||
|
||||
cec_pins_a: cec-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 15, AF4)>;
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
cec_pins_sleep_a: cec-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
|
||||
};
|
||||
};
|
||||
|
||||
cec_pins_b: cec-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('B', 6, AF5)>;
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
cec_pins_sleep_b: cec-sleep-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
|
||||
};
|
||||
};
|
||||
|
||||
dac_ch1_pins_a: dac-ch1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
|
||||
};
|
||||
};
|
||||
|
||||
dac_ch2_pins_a: dac-ch2 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
|
||||
};
|
||||
};
|
||||
|
||||
dcmi_pins_a: dcmi-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
|
||||
<STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
|
||||
<STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
|
||||
<STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
|
||||
<STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
|
||||
<STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
|
||||
<STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
|
||||
<STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
|
||||
<STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
|
||||
<STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
|
||||
<STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
|
||||
<STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
|
||||
<STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
|
||||
<STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
|
||||
<STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
dcmi_sleep_pins_a: dcmi-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
|
||||
<STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
|
||||
<STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
|
||||
<STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
|
||||
<STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
|
||||
<STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
|
||||
<STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
|
||||
<STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
|
||||
<STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
|
||||
<STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
|
||||
<STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
|
||||
<STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
|
||||
<STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
|
||||
<STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
|
||||
<STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
|
||||
};
|
||||
};
|
||||
|
||||
ethernet0_rgmii_pins_a: rgmii-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
|
||||
<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
|
||||
<STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
|
||||
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
|
||||
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
|
||||
<STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
|
||||
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
|
||||
<STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
|
||||
<STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
|
||||
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
|
||||
<STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
|
||||
<STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
|
||||
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
|
||||
<STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
|
||||
<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
|
||||
<STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
|
||||
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
|
||||
<STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
|
||||
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
|
||||
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
|
||||
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
|
||||
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
|
||||
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
|
||||
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
|
||||
<STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
|
||||
<STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
|
||||
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
|
||||
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
|
||||
};
|
||||
};
|
||||
|
||||
fmc_pins_a: fmc-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
|
||||
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
|
||||
<STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
|
||||
<STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
|
||||
<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
|
||||
<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
|
||||
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
|
||||
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
|
||||
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
|
||||
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
|
||||
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
|
||||
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
|
||||
<STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
fmc_sleep_pins_a: fmc-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
|
||||
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
|
||||
<STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
|
||||
<STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
|
||||
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
|
||||
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
|
||||
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
|
||||
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
|
||||
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
|
||||
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
|
||||
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
|
||||
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
|
||||
<STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
|
||||
<STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_a: i2c1-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
|
||||
<STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_sleep_a: i2c1-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
|
||||
<STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_b: i2c1-2 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
|
||||
<STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_sleep_b: i2c1-3 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
|
||||
<STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_a: i2c2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
|
||||
<STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_sleep_a: i2c2-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
|
||||
<STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_b1: i2c2-2 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_sleep_b1: i2c2-3 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins_a: i2c5-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
|
||||
<STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c5_pins_sleep_a: i2c5-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
|
||||
<STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
i2s2_pins_a: i2s2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
|
||||
<STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
|
||||
<STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
|
||||
slew-rate = <1>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s2_pins_sleep_a: i2s2-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
|
||||
<STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
|
||||
<STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
|
||||
};
|
||||
};
|
||||
|
||||
ltdc_pins_a: ltdc-a-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
|
||||
<STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
|
||||
<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
|
||||
<STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
|
||||
<STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
|
||||
<STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
|
||||
<STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
|
||||
<STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
|
||||
<STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
|
||||
<STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
|
||||
<STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
|
||||
<STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
|
||||
<STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
|
||||
<STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
|
||||
<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
|
||||
<STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
|
||||
<STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
|
||||
<STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
|
||||
<STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
|
||||
<STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
|
||||
<STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
|
||||
<STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
|
||||
<STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
|
||||
<STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
|
||||
<STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
|
||||
<STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
|
||||
<STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
|
||||
<STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ltdc_pins_sleep_a: ltdc-a-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
|
||||
<STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
|
||||
<STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
|
||||
<STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
|
||||
<STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
|
||||
<STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
|
||||
<STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
|
||||
<STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
|
||||
<STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
|
||||
<STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
|
||||
<STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
|
||||
<STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
|
||||
<STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
|
||||
<STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
|
||||
<STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
|
||||
<STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
|
||||
<STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
|
||||
<STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
|
||||
<STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
|
||||
<STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
|
||||
<STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
|
||||
<STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
|
||||
<STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
|
||||
<STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
|
||||
<STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
|
||||
<STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
|
||||
<STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
|
||||
<STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
|
||||
};
|
||||
};
|
||||
|
||||
ltdc_pins_b: ltdc-b-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
|
||||
<STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
|
||||
<STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
|
||||
<STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
|
||||
<STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
|
||||
<STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
|
||||
<STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
|
||||
<STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
|
||||
<STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
|
||||
<STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
|
||||
<STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
|
||||
<STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
|
||||
<STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
|
||||
<STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
|
||||
<STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
|
||||
<STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
|
||||
<STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
|
||||
<STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
|
||||
<STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
|
||||
<STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
|
||||
<STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
|
||||
<STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
|
||||
<STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
|
||||
<STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
|
||||
<STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
|
||||
<STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
|
||||
<STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
|
||||
<STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ltdc_pins_sleep_b: ltdc-b-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
|
||||
<STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
|
||||
<STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
|
||||
<STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
|
||||
<STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
|
||||
<STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
|
||||
<STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
|
||||
<STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
|
||||
<STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
|
||||
<STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
|
||||
<STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
|
||||
<STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
|
||||
<STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
|
||||
<STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
|
||||
<STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
|
||||
<STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
|
||||
<STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
|
||||
<STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
|
||||
<STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
|
||||
<STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
|
||||
<STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
|
||||
<STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
|
||||
<STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
|
||||
<STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
|
||||
<STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
|
||||
<STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
|
||||
<STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
|
||||
<STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
|
||||
};
|
||||
};
|
||||
|
||||
m_can1_pins_a: m-can1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
|
||||
slew-rate = <1>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
m_can1_sleep_pins_a: m_can1-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
|
||||
<STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
|
||||
};
|
||||
};
|
||||
|
||||
pwm2_pins_a: pwm2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm8_pins_a: pwm8-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm12_pins_a: pwm12-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
|
||||
bias-pull-down;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_clk_pins_a: qspi-clk-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk1_pins_a: qspi-bk1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
|
||||
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
|
||||
<STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
|
||||
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
|
||||
bias-pull-up;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
|
||||
<STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
|
||||
<STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
|
||||
<STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
|
||||
<STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk2_pins_a: qspi-bk2-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
|
||||
<STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
|
||||
<STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
|
||||
<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
|
||||
bias-pull-up;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
|
||||
<STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
|
||||
<STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
|
||||
<STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
|
||||
<STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
|
||||
};
|
||||
};
|
||||
|
||||
sai2a_pins_a: sai2a-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
|
||||
<STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
|
||||
<STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
|
||||
<STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
|
||||
slew-rate = <0>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sai2a_sleep_pins_a: sai2a-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
|
||||
<STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
|
||||
<STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
|
||||
<STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
|
||||
};
|
||||
};
|
||||
|
||||
sai2b_pins_a: sai2b-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
|
||||
<STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
|
||||
<STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
|
||||
slew-rate = <0>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sai2b_sleep_pins_a: sai2b-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
|
||||
<STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
|
||||
<STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
|
||||
<STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
|
||||
};
|
||||
};
|
||||
|
||||
sai2b_pins_b: sai2b-2 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sai2b_sleep_pins_b: sai2b-3 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
|
||||
};
|
||||
};
|
||||
|
||||
sai4a_pins_a: sai4a-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
|
||||
slew-rate = <0>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sai4a_sleep_pins_a: sai4a-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
||||
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
|
||||
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
|
||||
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
|
||||
<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
|
||||
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
||||
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
|
||||
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
|
||||
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
|
||||
<STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-disable;
|
||||
};
|
||||
pins2{
|
||||
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
|
||||
slew-rate = <3>;
|
||||
drive-open-drain;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
|
||||
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
|
||||
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
|
||||
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
|
||||
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
|
||||
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_dir_pins_a: sdmmc1-dir-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
|
||||
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
|
||||
<STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
|
||||
slew-rate = <3>;
|
||||
drive-push-pull;
|
||||
bias-pull-up;
|
||||
};
|
||||
pins2{
|
||||
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
|
||||
<STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
|
||||
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
|
||||
<STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
|
||||
};
|
||||
};
|
||||
|
||||
spdifrx_pins_a: spdifrx-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spdifrx_sleep_pins_a: spdifrx-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
|
||||
};
|
||||
};
|
||||
|
||||
uart4_pins_a: uart4-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
uart4_pins_b: uart4-1 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
uart7_pins_a: uart7-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
|
||||
<STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
|
||||
<STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_z: pin-controller-z@54004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,stm32mp157-z-pinctrl";
|
||||
ranges = <0 0x54004000 0x400>;
|
||||
pins-are-numbered;
|
||||
interrupt-parent = <&exti>;
|
||||
st,syscfg = <&exti 0x60 0xff>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0 0x400>;
|
||||
clocks = <&rcc GPIOZ>;
|
||||
st,bank-name = "GPIOZ";
|
||||
st,bank-ioport = <11>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2_pins_b2: i2c2-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins_sleep_b2: i2c2-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins_a: i2c4-0 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
|
||||
<STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
|
||||
bias-disable;
|
||||
drive-open-drain;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_pins_sleep_a: i2c4-1 {
|
||||
pins {
|
||||
pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
|
||||
<STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
|
||||
};
|
||||
};
|
||||
|
||||
spi1_pins_a: spi1-0 {
|
||||
pins1 {
|
||||
pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
|
||||
<STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <1>;
|
||||
};
|
||||
|
||||
pins2 {
|
||||
pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
31
arch/arm/boot/dts/stm32mp157.dtsi
Normal file
31
arch/arm/boot/dts/stm32mp157.dtsi
Normal file
@ -0,0 +1,31 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
#include "stm32mp153.dtsi"
|
||||
|
||||
/ {
|
||||
soc {
|
||||
gpu: gpu@59000000 {
|
||||
compatible = "vivante,gc";
|
||||
reg = <0x59000000 0x800>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc GPU>, <&rcc GPU_K>;
|
||||
clock-names = "bus" ,"core";
|
||||
resets = <&rcc GPU_R>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsi: dsi@5a000000 {
|
||||
compatible = "st,stm32-dsi";
|
||||
reg = <0x5a000000 0x800>;
|
||||
clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
|
||||
clock-names = "pclk", "ref", "px_clk";
|
||||
resets = <&rcc DSI_R>;
|
||||
reset-names = "apb";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -6,8 +6,9 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "stm32mp157c.dtsi"
|
||||
#include "stm32mp157xac-pinctrl.dtsi"
|
||||
#include "stm32mp157.dtsi"
|
||||
#include "stm32mp15-pinctrl.dtsi"
|
||||
#include "stm32mp15xxac-pinctrl.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mfd/st,stpmic1.h>
|
||||
|
||||
|
||||
@ -6,10 +6,10 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "stm32mp157c.dtsi"
|
||||
#include "stm32mp157xac-pinctrl.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mfd/st,stpmic1.h>
|
||||
#include "stm32mp157.dtsi"
|
||||
#include "stm32mp15-pinctrl.dtsi"
|
||||
#include "stm32mp15xxac-pinctrl.dtsi"
|
||||
#include "stm32mp15xx-dkx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
|
||||
@ -23,494 +23,4 @@
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@c0000000 {
|
||||
device_type = "memory";
|
||||
reg = <0xc0000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
mcuram2: mcuram2@10000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10000000 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0vring0: vdev0vring0@10040000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10040000 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0vring1: vdev0vring1@10041000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10041000 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0buffer: vdev0buffer@10042000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10042000 0x4000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcuram: mcuram@30000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x30000000 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
retram: retram@38000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x38000000 0x10000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
gpu_reserved: gpu@d4000000 {
|
||||
reg = <0xd4000000 0x4000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
led {
|
||||
compatible = "gpio-leds";
|
||||
blue {
|
||||
label = "heartbeat";
|
||||
gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "audio-graph-card";
|
||||
label = "STM32MP1-DK";
|
||||
routing =
|
||||
"Playback" , "MCLK",
|
||||
"Capture" , "MCLK",
|
||||
"MICL" , "Mic Bias";
|
||||
dais = <&sai2a_port &sai2b_port &i2s2_port>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
|
||||
vdd-supply = <&vdd>;
|
||||
vdda-supply = <&vdd>;
|
||||
vref-supply = <&vrefbuf>;
|
||||
status = "disabled";
|
||||
adc1: adc@0 {
|
||||
/*
|
||||
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
|
||||
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
|
||||
* 5 * (56 + 47kOhms) * 5pF => 2.5us.
|
||||
* Use arbitrary margin here (e.g. 5us).
|
||||
*/
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
/* AIN connector, USB Type-C CC1 & CC2 */
|
||||
st,adc-channels = <0 1 6 13 18 19>;
|
||||
status = "okay";
|
||||
};
|
||||
adc2: adc@100 {
|
||||
/* AIN connector, USB Type-C CC1 & CC2 */
|
||||
st,adc-channels = <0 1 2 6 18 19>;
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&cec {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cec_pins_b>;
|
||||
pinctrl-1 = <&cec_pins_sleep_b>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <ðernet0_rgmii_pins_a>;
|
||||
pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
phy-mode = "rgmii-id";
|
||||
max-speed = <1000>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
contiguous-area = <&gpu_reserved>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_a>;
|
||||
pinctrl-1 = <&i2c1_pins_sleep_a>;
|
||||
i2c-scl-rising-time-ns = <100>;
|
||||
i2c-scl-falling-time-ns = <7>;
|
||||
status = "okay";
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
hdmi-transmitter@39 {
|
||||
compatible = "sil,sii9022";
|
||||
reg = <0x39>;
|
||||
iovcc-supply = <&v3v3_hdmi>;
|
||||
cvcc12-supply = <&v1v2_hdmi>;
|
||||
reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpiog>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
sii9022_in: endpoint {
|
||||
remote-endpoint = <<dc_ep0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
sii9022_tx_endpoint: endpoint {
|
||||
remote-endpoint = <&i2s2_endpoint>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cs42l51: cs42l51@4a {
|
||||
compatible = "cirrus,cs42l51";
|
||||
reg = <0x4a>;
|
||||
#sound-dai-cells = <0>;
|
||||
VL-supply = <&v3v3>;
|
||||
VD-supply = <&v1v8_audio>;
|
||||
VA-supply = <&v1v8_audio>;
|
||||
VAHP-supply = <&v1v8_audio>;
|
||||
reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&sai2a>;
|
||||
clock-names = "MCLK";
|
||||
status = "okay";
|
||||
|
||||
cs42l51_port: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cs42l51_tx_endpoint: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sai2a_endpoint>;
|
||||
frame-master;
|
||||
bitclock-master;
|
||||
};
|
||||
|
||||
cs42l51_rx_endpoint: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&sai2b_endpoint>;
|
||||
frame-master;
|
||||
bitclock-master;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins_a>;
|
||||
i2c-scl-rising-time-ns = <185>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
/* spare dmas for other usage */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
pmic: stpmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
status = "okay";
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
ldo1-supply = <&v3v3>;
|
||||
ldo3-supply = <&vdd_ddr>;
|
||||
ldo6-supply = <&v3v3>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
vddcore: buck1 {
|
||||
regulator-name = "vddcore";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_ddr: buck2 {
|
||||
regulator-name = "vdd_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd: buck3 {
|
||||
regulator-name = "vdd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
st,mask-reset;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
v3v3: buck4 {
|
||||
regulator-name = "v3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
v1v8_audio: ldo1 {
|
||||
regulator-name = "v1v8_audio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO1 0>;
|
||||
};
|
||||
|
||||
v3v3_hdmi: ldo2 {
|
||||
regulator-name = "v3v3_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
};
|
||||
|
||||
vtt_ddr: ldo3 {
|
||||
regulator-name = "vtt_ddr";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 {
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdda: ldo5 {
|
||||
regulator-name = "vdda";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
v1v2_hdmi: ldo6 {
|
||||
regulator-name = "v1v2_hdmi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr {
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
bst_out: boost {
|
||||
regulator-name = "bst_out";
|
||||
interrupts = <IT_OCP_BOOST 0>;
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
power-off-time-sec = <10>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s2 {
|
||||
clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|
||||
clock-names = "pclk", "i2sclk", "x8k", "x11k";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2s2_pins_a>;
|
||||
pinctrl-1 = <&i2s2_pins_sleep_a>;
|
||||
status = "okay";
|
||||
|
||||
i2s2_port: port {
|
||||
i2s2_endpoint: endpoint {
|
||||
remote-endpoint = <&sii9022_tx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipcc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
<dc {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <<dc_pins_a>;
|
||||
pinctrl-1 = <<dc_pins_sleep_a>;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ltdc_ep0_out: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sii9022_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&m4_rproc {
|
||||
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
|
||||
<&vdev0vring1>, <&vdev0buffer>;
|
||||
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
|
||||
mbox-names = "vq0", "vq1", "shutdown";
|
||||
interrupt-parent = <&exti>;
|
||||
interrupts = <68 1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr_regulators {
|
||||
vdd-supply = <&vdd>;
|
||||
vdd_3v3_usbfs-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai2 {
|
||||
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|
||||
clock-names = "pclk", "x8k", "x11k";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
|
||||
pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
|
||||
status = "okay";
|
||||
|
||||
sai2a: audio-controller@4400b004 {
|
||||
#clock-cells = <0>;
|
||||
dma-names = "tx";
|
||||
clocks = <&rcc SAI2_K>;
|
||||
clock-names = "sai_ck";
|
||||
status = "okay";
|
||||
|
||||
sai2a_port: port {
|
||||
sai2a_endpoint: endpoint {
|
||||
remote-endpoint = <&cs42l51_tx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
dai-tdm-slot-num = <2>;
|
||||
dai-tdm-slot-width = <32>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sai2b: audio-controller@4400b024 {
|
||||
dma-names = "rx";
|
||||
st,sync = <&sai2a 2>;
|
||||
clocks = <&rcc SAI2_K>, <&sai2a>;
|
||||
clock-names = "sai_ck", "MCLK";
|
||||
status = "okay";
|
||||
|
||||
sai2b_port: port {
|
||||
sai2b_endpoint: endpoint {
|
||||
remote-endpoint = <&cs42l51_rx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
dai-tdm-slot-num = <2>;
|
||||
dai-tdm-slot-width = <32>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a>;
|
||||
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
|
||||
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vrefbuf {
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
vdda-supply = <&vdd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -6,11 +6,24 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "stm32mp157a-dk1.dts"
|
||||
#include "stm32mp157.dtsi"
|
||||
#include "stm32mp15xc.dtsi"
|
||||
#include "stm32mp15-pinctrl.dtsi"
|
||||
#include "stm32mp15xxac-pinctrl.dtsi"
|
||||
#include "stm32mp15xx-dkx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
|
||||
compatible = "st,stm32mp157c-dk2", "st,stm32mp157";
|
||||
|
||||
aliases {
|
||||
ethernet0 = ðernet0;
|
||||
serial0 = &uart4;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&dsi {
|
||||
|
||||
@ -5,8 +5,10 @@
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "stm32mp157c.dtsi"
|
||||
#include "stm32mp157xaa-pinctrl.dtsi"
|
||||
#include "stm32mp157.dtsi"
|
||||
#include "stm32mp15xc.dtsi"
|
||||
#include "stm32mp15-pinctrl.dtsi"
|
||||
#include "stm32mp15xxaa-pinctrl.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mfd/st,stpmic1.h>
|
||||
|
||||
@ -89,6 +91,22 @@
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
/* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
|
||||
pinctrl-0 = <&adc1_in6_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
vdd-supply = <&vdd>;
|
||||
vdda-supply = <&vdda>;
|
||||
vref-supply = <&vdda>;
|
||||
status = "disabled";
|
||||
adc1: adc@0 {
|
||||
st,adc-channels = <0 1 6>;
|
||||
/* 16.5 ck_cycles sampling time */
|
||||
st,min-sample-time-nsecs = <400>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&dac {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
|
||||
@ -305,6 +323,22 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
|
||||
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
|
||||
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
st,neg-edge;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
vqmmc-supply = <&v3v3>;
|
||||
mmc-ddr-3_3v;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&timers6 {
|
||||
status = "okay";
|
||||
/* spare dmas for other usage */
|
||||
|
||||
@ -283,6 +283,18 @@
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc3 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc3_b4_pins_a>;
|
||||
pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
|
||||
pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins_a>;
|
||||
@ -296,7 +308,8 @@
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm2_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-1 = <&pwm2_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@1 {
|
||||
@ -310,7 +323,8 @@
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm8_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-1 = <&pwm8_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@7 {
|
||||
@ -324,7 +338,8 @@
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm12_pins_a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-1 = <&pwm12_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@11 {
|
||||
@ -340,6 +355,7 @@
|
||||
&usbotg_hs {
|
||||
dr_mode = "peripheral";
|
||||
phys = <&usbphyc_port1 0>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@ -1,90 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
*/
|
||||
|
||||
#include "stm32mp157-pinctrl.dtsi"
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
st,package = <STM32MP_PKG_AA>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 80 16>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 96 16>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 112 16>;
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 128 16>;
|
||||
};
|
||||
|
||||
gpioj: gpio@5000b000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 144 16>;
|
||||
};
|
||||
|
||||
gpiok: gpio@5000c000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl 0 160 8>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_z: pin-controller-z@54004000 {
|
||||
st,package = <STM32MP_PKG_AA>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl_z 0 400 8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,62 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
*/
|
||||
|
||||
#include "stm32mp157-pinctrl.dtsi"
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
st,package = <STM32MP_PKG_AB>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <6>;
|
||||
gpio-ranges = <&pinctrl 6 86 6>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <10>;
|
||||
gpio-ranges = <&pinctrl 6 102 10>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <2>;
|
||||
gpio-ranges = <&pinctrl 0 112 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,78 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
*/
|
||||
|
||||
#include "stm32mp157-pinctrl.dtsi"
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
st,package = <STM32MP_PKG_AC>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 80 16>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 96 16>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 112 16>;
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
status = "okay";
|
||||
ngpios = <12>;
|
||||
gpio-ranges = <&pinctrl 0 128 12>;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_z: pin-controller-z@54004000 {
|
||||
st,package = <STM32MP_PKG_AC>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl_z 0 400 8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,62 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com>
|
||||
*/
|
||||
|
||||
#include "stm32mp157-pinctrl.dtsi"
|
||||
/ {
|
||||
soc {
|
||||
pinctrl: pin-controller@50002000 {
|
||||
st,package = <STM32MP_PKG_AD>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <6>;
|
||||
gpio-ranges = <&pinctrl 6 86 6>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <10>;
|
||||
gpio-ranges = <&pinctrl 6 102 10>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <2>;
|
||||
gpio-ranges = <&pinctrl 0 112 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
18
arch/arm/boot/dts/stm32mp15xc.dtsi
Normal file
18
arch/arm/boot/dts/stm32mp15xc.dtsi
Normal file
@ -0,0 +1,18 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
/ {
|
||||
soc {
|
||||
cryp1: cryp@54001000 {
|
||||
compatible = "st,stm32mp1-cryp";
|
||||
reg = <0x54001000 0x400>;
|
||||
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc CRYP1>;
|
||||
resets = <&rcc CRYP1_R>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
625
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
Normal file
625
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
Normal file
@ -0,0 +1,625 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/mfd/st,stpmic1.h>
|
||||
|
||||
/ {
|
||||
memory@c0000000 {
|
||||
device_type = "memory";
|
||||
reg = <0xc0000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
mcuram2: mcuram2@10000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10000000 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0vring0: vdev0vring0@10040000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10040000 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0vring1: vdev0vring1@10041000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10041000 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
vdev0buffer: vdev0buffer@10042000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x10042000 0x4000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcuram: mcuram@30000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x30000000 0x40000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
retram: retram@38000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x38000000 0x10000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
gpu_reserved: gpu@d4000000 {
|
||||
reg = <0xd4000000 0x4000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
led {
|
||||
compatible = "gpio-leds";
|
||||
blue {
|
||||
label = "heartbeat";
|
||||
gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "audio-graph-card";
|
||||
label = "STM32MP1-DK";
|
||||
routing =
|
||||
"Playback" , "MCLK",
|
||||
"Capture" , "MCLK",
|
||||
"MICL" , "Mic Bias";
|
||||
dais = <&sai2a_port &sai2b_port &i2s2_port>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>;
|
||||
vdd-supply = <&vdd>;
|
||||
vdda-supply = <&vdd>;
|
||||
vref-supply = <&vrefbuf>;
|
||||
status = "disabled";
|
||||
adc1: adc@0 {
|
||||
/*
|
||||
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
|
||||
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
|
||||
* 5 * (56 + 47kOhms) * 5pF => 2.5us.
|
||||
* Use arbitrary margin here (e.g. 5us).
|
||||
*/
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
/* AIN connector, USB Type-C CC1 & CC2 */
|
||||
st,adc-channels = <0 1 6 13 18 19>;
|
||||
status = "okay";
|
||||
};
|
||||
adc2: adc@100 {
|
||||
/* AIN connector, USB Type-C CC1 & CC2 */
|
||||
st,adc-channels = <0 1 2 6 18 19>;
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&cec {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cec_pins_b>;
|
||||
pinctrl-1 = <&cec_pins_sleep_b>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <ðernet0_rgmii_pins_a>;
|
||||
pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
phy-mode = "rgmii-id";
|
||||
max-speed = <1000>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,dwmac-mdio";
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
contiguous-area = <&gpu_reserved>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_a>;
|
||||
pinctrl-1 = <&i2c1_pins_sleep_a>;
|
||||
i2c-scl-rising-time-ns = <100>;
|
||||
i2c-scl-falling-time-ns = <7>;
|
||||
status = "okay";
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
hdmi-transmitter@39 {
|
||||
compatible = "sil,sii9022";
|
||||
reg = <0x39>;
|
||||
iovcc-supply = <&v3v3_hdmi>;
|
||||
cvcc12-supply = <&v1v2_hdmi>;
|
||||
reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpiog>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
sii9022_in: endpoint {
|
||||
remote-endpoint = <<dc_ep0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
sii9022_tx_endpoint: endpoint {
|
||||
remote-endpoint = <&i2s2_endpoint>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cs42l51: cs42l51@4a {
|
||||
compatible = "cirrus,cs42l51";
|
||||
reg = <0x4a>;
|
||||
#sound-dai-cells = <0>;
|
||||
VL-supply = <&v3v3>;
|
||||
VD-supply = <&v1v8_audio>;
|
||||
VA-supply = <&v1v8_audio>;
|
||||
VAHP-supply = <&v1v8_audio>;
|
||||
reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&sai2a>;
|
||||
clock-names = "MCLK";
|
||||
status = "okay";
|
||||
|
||||
cs42l51_port: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cs42l51_tx_endpoint: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sai2a_endpoint>;
|
||||
frame-master;
|
||||
bitclock-master;
|
||||
};
|
||||
|
||||
cs42l51_rx_endpoint: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&sai2b_endpoint>;
|
||||
frame-master;
|
||||
bitclock-master;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins_a>;
|
||||
i2c-scl-rising-time-ns = <185>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
/* spare dmas for other usage */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
|
||||
pmic: stpmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
status = "okay";
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmic1-regulators";
|
||||
ldo1-supply = <&v3v3>;
|
||||
ldo3-supply = <&vdd_ddr>;
|
||||
ldo6-supply = <&v3v3>;
|
||||
pwr_sw1-supply = <&bst_out>;
|
||||
pwr_sw2-supply = <&bst_out>;
|
||||
|
||||
vddcore: buck1 {
|
||||
regulator-name = "vddcore";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_ddr: buck2 {
|
||||
regulator-name = "vdd_ddr";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd: buck3 {
|
||||
regulator-name = "vdd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
st,mask-reset;
|
||||
regulator-initial-mode = <0>;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
v3v3: buck4 {
|
||||
regulator-name = "v3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
regulator-initial-mode = <0>;
|
||||
};
|
||||
|
||||
v1v8_audio: ldo1 {
|
||||
regulator-name = "v1v8_audio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO1 0>;
|
||||
};
|
||||
|
||||
v3v3_hdmi: ldo2 {
|
||||
regulator-name = "v3v3_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO2 0>;
|
||||
};
|
||||
|
||||
vtt_ddr: ldo3 {
|
||||
regulator-name = "vtt_ddr";
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
vdd_usb: ldo4 {
|
||||
regulator-name = "vdd_usb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
interrupts = <IT_CURLIM_LDO4 0>;
|
||||
};
|
||||
|
||||
vdda: ldo5 {
|
||||
regulator-name = "vdda";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
interrupts = <IT_CURLIM_LDO5 0>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
v1v2_hdmi: ldo6 {
|
||||
regulator-name = "v1v2_hdmi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
interrupts = <IT_CURLIM_LDO6 0>;
|
||||
};
|
||||
|
||||
vref_ddr: vref_ddr {
|
||||
regulator-name = "vref_ddr";
|
||||
regulator-always-on;
|
||||
regulator-over-current-protection;
|
||||
};
|
||||
|
||||
bst_out: boost {
|
||||
regulator-name = "bst_out";
|
||||
interrupts = <IT_OCP_BOOST 0>;
|
||||
};
|
||||
|
||||
vbus_otg: pwr_sw1 {
|
||||
regulator-name = "vbus_otg";
|
||||
interrupts = <IT_OCP_OTG 0>;
|
||||
};
|
||||
|
||||
vbus_sw: pwr_sw2 {
|
||||
regulator-name = "vbus_sw";
|
||||
interrupts = <IT_OCP_SWOUT 0>;
|
||||
regulator-active-discharge = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
onkey {
|
||||
compatible = "st,stpmic1-onkey";
|
||||
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
|
||||
interrupt-names = "onkey-falling", "onkey-rising";
|
||||
power-off-time-sec = <10>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog {
|
||||
compatible = "st,stpmic1-wdt";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2s2 {
|
||||
clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|
||||
clock-names = "pclk", "i2sclk", "x8k", "x11k";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2s2_pins_a>;
|
||||
pinctrl-1 = <&i2s2_pins_sleep_a>;
|
||||
status = "okay";
|
||||
|
||||
i2s2_port: port {
|
||||
i2s2_endpoint: endpoint {
|
||||
remote-endpoint = <&sii9022_tx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipcc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iwdg2 {
|
||||
timeout-sec = <32>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
<dc {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <<dc_pins_a>;
|
||||
pinctrl-1 = <<dc_pins_sleep_a>;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ltdc_ep0_out: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sii9022_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&m4_rproc {
|
||||
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
|
||||
<&vdev0vring1>, <&vdev0buffer>;
|
||||
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
|
||||
mbox-names = "vq0", "vq1", "shutdown";
|
||||
interrupt-parent = <&exti>;
|
||||
interrupts = <68 1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwr_regulators {
|
||||
vdd-supply = <&vdd>;
|
||||
vdd_3v3_usbfs-supply = <&vdd_usb>;
|
||||
};
|
||||
|
||||
&rng1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai2 {
|
||||
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|
||||
clock-names = "pclk", "x8k", "x11k";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
|
||||
pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
|
||||
status = "okay";
|
||||
|
||||
sai2a: audio-controller@4400b004 {
|
||||
#clock-cells = <0>;
|
||||
dma-names = "tx";
|
||||
clocks = <&rcc SAI2_K>;
|
||||
clock-names = "sai_ck";
|
||||
status = "okay";
|
||||
|
||||
sai2a_port: port {
|
||||
sai2a_endpoint: endpoint {
|
||||
remote-endpoint = <&cs42l51_tx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
dai-tdm-slot-num = <2>;
|
||||
dai-tdm-slot-width = <32>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sai2b: audio-controller@4400b024 {
|
||||
dma-names = "rx";
|
||||
st,sync = <&sai2a 2>;
|
||||
clocks = <&rcc SAI2_K>, <&sai2a>;
|
||||
clock-names = "sai_ck", "MCLK";
|
||||
status = "okay";
|
||||
|
||||
sai2b_port: port {
|
||||
sai2b_endpoint: endpoint {
|
||||
remote-endpoint = <&cs42l51_rx_endpoint>;
|
||||
format = "i2s";
|
||||
mclk-fs = <256>;
|
||||
dai-tdm-slot-num = <2>;
|
||||
dai-tdm-slot-width = <32>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc1_b4_pins_a>;
|
||||
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
|
||||
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc3 {
|
||||
pinctrl-names = "default", "opendrain", "sleep";
|
||||
pinctrl-0 = <&sdmmc3_b4_pins_a>;
|
||||
pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
|
||||
pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
|
||||
broken-cd;
|
||||
st,neg-edge;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&v3v3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&timers1 {
|
||||
/* spare dmas for other usage */
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm1_pins_a>;
|
||||
pinctrl-1 = <&pwm1_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers3 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm3_pins_a>;
|
||||
pinctrl-1 = <&pwm3_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@2 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers4 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
|
||||
pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@3 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers5 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm5_pins_a>;
|
||||
pinctrl-1 = <&pwm5_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@4 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers6 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
timer@5 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&timers12 {
|
||||
/delete-property/dmas;
|
||||
/delete-property/dma-names;
|
||||
status = "disabled";
|
||||
pwm {
|
||||
pinctrl-0 = <&pwm12_pins_a>;
|
||||
pinctrl-1 = <&pwm12_sleep_pins_a>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
status = "okay";
|
||||
};
|
||||
timer@11 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh_ehci {
|
||||
phys = <&usbphyc_port0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg_hs {
|
||||
dr_mode = "peripheral";
|
||||
phys = <&usbphyc_port1 0>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphyc_port0 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
vdda1v1-supply = <®11>;
|
||||
vdda1v8-supply = <®18>;
|
||||
};
|
||||
|
||||
&usbphyc_port1 {
|
||||
phy-supply = <&vdd_usb>;
|
||||
vdda1v1-supply = <®11>;
|
||||
vdda1v8-supply = <®18>;
|
||||
};
|
||||
|
||||
&vrefbuf {
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
vdda-supply = <&vdd>;
|
||||
status = "okay";
|
||||
};
|
||||
85
arch/arm/boot/dts/stm32mp15xxaa-pinctrl.dtsi
Normal file
85
arch/arm/boot/dts/stm32mp15xxaa-pinctrl.dtsi
Normal file
@ -0,0 +1,85 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
&pinctrl {
|
||||
st,package = <STM32MP_PKG_AA>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 80 16>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 96 16>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 112 16>;
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 128 16>;
|
||||
};
|
||||
|
||||
gpioj: gpio@5000b000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 144 16>;
|
||||
};
|
||||
|
||||
gpiok: gpio@5000c000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl 0 160 8>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_z {
|
||||
st,package = <STM32MP_PKG_AA>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl_z 0 400 8>;
|
||||
};
|
||||
};
|
||||
57
arch/arm/boot/dts/stm32mp15xxab-pinctrl.dtsi
Normal file
57
arch/arm/boot/dts/stm32mp15xxab-pinctrl.dtsi
Normal file
@ -0,0 +1,57 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
&pinctrl {
|
||||
st,package = <STM32MP_PKG_AB>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <6>;
|
||||
gpio-ranges = <&pinctrl 6 86 6>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <10>;
|
||||
gpio-ranges = <&pinctrl 6 102 10>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <2>;
|
||||
gpio-ranges = <&pinctrl 0 112 2>;
|
||||
};
|
||||
};
|
||||
73
arch/arm/boot/dts/stm32mp15xxac-pinctrl.dtsi
Normal file
73
arch/arm/boot/dts/stm32mp15xxac-pinctrl.dtsi
Normal file
@ -0,0 +1,73 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
&pinctrl {
|
||||
st,package = <STM32MP_PKG_AC>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 80 16>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 96 16>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 112 16>;
|
||||
};
|
||||
|
||||
gpioi: gpio@5000a000 {
|
||||
status = "okay";
|
||||
ngpios = <12>;
|
||||
gpio-ranges = <&pinctrl 0 128 12>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_z {
|
||||
st,package = <STM32MP_PKG_AC>;
|
||||
|
||||
gpioz: gpio@54004000 {
|
||||
status = "okay";
|
||||
ngpios = <8>;
|
||||
gpio-ranges = <&pinctrl_z 0 400 8>;
|
||||
};
|
||||
};
|
||||
57
arch/arm/boot/dts/stm32mp15xxad-pinctrl.dtsi
Normal file
57
arch/arm/boot/dts/stm32mp15xxad-pinctrl.dtsi
Normal file
@ -0,0 +1,57 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
|
||||
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
|
||||
*/
|
||||
|
||||
&pinctrl {
|
||||
st,package = <STM32MP_PKG_AD>;
|
||||
|
||||
gpioa: gpio@50002000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 0 16>;
|
||||
};
|
||||
|
||||
gpiob: gpio@50003000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 16 16>;
|
||||
};
|
||||
|
||||
gpioc: gpio@50004000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 32 16>;
|
||||
};
|
||||
|
||||
gpiod: gpio@50005000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 48 16>;
|
||||
};
|
||||
|
||||
gpioe: gpio@50006000 {
|
||||
status = "okay";
|
||||
ngpios = <16>;
|
||||
gpio-ranges = <&pinctrl 0 64 16>;
|
||||
};
|
||||
|
||||
gpiof: gpio@50007000 {
|
||||
status = "okay";
|
||||
ngpios = <6>;
|
||||
gpio-ranges = <&pinctrl 6 86 6>;
|
||||
};
|
||||
|
||||
gpiog: gpio@50008000 {
|
||||
status = "okay";
|
||||
ngpios = <10>;
|
||||
gpio-ranges = <&pinctrl 6 102 10>;
|
||||
};
|
||||
|
||||
gpioh: gpio@50009000 {
|
||||
status = "okay";
|
||||
ngpios = <2>;
|
||||
gpio-ranges = <&pinctrl 0 112 2>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user