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[ARM] 4576/1: CM-X270 machine support
This patch provides core support for CM-X270 platform. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Mike Rapoport
Russell King
parent
3e0cc7ee04
commit
3696a8a426
1410
arch/arm/configs/cm_x270_defconfig
Normal file
1410
arch/arm/configs/cm_x270_defconfig
Normal file
File diff suppressed because it is too large
Load Diff
@ -63,6 +63,11 @@ config MACH_ZYLONITE
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bool "PXA3xx Development Platform"
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select PXA3xx
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config MACH_ARMCORE
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bool "CompuLab CM-X270 modules"
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select PXA27x
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select IWMMXT
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endchoice
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if PXA_SHARPSL
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@ -29,6 +29,8 @@ ifeq ($(CONFIG_MACH_ZYLONITE),y)
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obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o
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endif
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obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o
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# Support for blinky lights
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led-y := leds.o
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led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
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@ -45,3 +47,7 @@ obj-$(CONFIG_PXA_SSP) += ssp.o
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ifeq ($(CONFIG_PXA27x),y)
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obj-$(CONFIG_PM) += standby.o
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endif
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ifeq ($(CONFIG_PCI),y)
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obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
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endif
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218
arch/arm/mach-pxa/cm-x270-pci.c
Normal file
218
arch/arm/mach-pxa/cm-x270-pci.c
Normal file
@ -0,0 +1,218 @@
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/*
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* linux/arch/arm/mach-pxa/cm-x270-pci.c
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*
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* PCI bios-type initialisation for PCI machines
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*
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* Bits taken from various places.
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*
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* Copyright (C) 2007 Compulab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/arch/cm-x270.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/it8152.h>
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unsigned long it8152_base_address = CMX270_IT8152_VIRT;
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/*
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* Only first 64MB of memory can be accessed via PCI.
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* We use GFP_DMA to allocate safe buffers to do map/unmap.
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* This is really ugly and we need a better way of specifying
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* DMA-capable regions of memory.
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*/
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void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
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unsigned long *zhole_size)
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{
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unsigned int sz = SZ_64M >> PAGE_SHIFT;
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printk(KERN_INFO "Adjusting zones for CM-x270\n");
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/*
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* Only adjust if > 64M on current system
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*/
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if (node || (zone_size[0] <= sz))
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return;
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zone_size[1] = zone_size[0] - sz;
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zone_size[0] = sz;
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zhole_size[1] = zhole_size[0];
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zhole_size[0] = 0;
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}
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static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
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{
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/* clear our parent irq */
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GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);
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it8152_irq_demux(irq, desc);
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}
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void __cmx270_pci_init_irq(void)
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{
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it8152_init_irq();
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pxa_gpio_mode(IRQ_TO_GPIO(GPIO_IT8152_IRQ));
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set_irq_type(IRQ_GPIO(GPIO_IT8152_IRQ), IRQT_RISING);
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set_irq_chained_handler(IRQ_GPIO(GPIO_IT8152_IRQ),
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cmx270_it8152_irq_demux);
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}
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#ifdef CONFIG_PM
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static unsigned long sleep_save_ite[10];
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void __cmx270_pci_suspend(void)
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{
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/* save ITE state */
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sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
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sleep_save_ite[1] = __raw_readl(IT8152_INTC_LPCNIMR);
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sleep_save_ite[2] = __raw_readl(IT8152_INTC_LPNIAR);
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/* Clear ITE IRQ's */
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__raw_writel((0), IT8152_INTC_PDCNIRR);
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__raw_writel((0), IT8152_INTC_LPCNIRR);
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}
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void __cmx270_pci_resume(void)
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{
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/* restore IT8152 state */
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__raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
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__raw_writel((sleep_save_ite[1]), IT8152_INTC_LPCNIMR);
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__raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
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}
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#else
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void cmx270_pci_suspend(void) {}
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void cmx270_pci_resume(void) {}
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#endif
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/* PCI IRQ mapping*/
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static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int irq;
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printk(KERN_DEBUG "===> %s: %s slot=%x, pin=%x\n", __FUNCTION__,
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pci_name(dev), slot, pin);
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irq = it8152_pci_map_irq(dev, slot, pin);
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if (irq)
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return irq;
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/*
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Here comes the ugly part. The routing is baseboard specific,
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but defining a platform for each possible base of CM-x270 is
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unrealistic. Here we keep mapping for ATXBase and SB-x270.
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*/
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/* ATXBASE PCI slot */
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if (slot == 7)
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return IT8152_PCI_INTA;
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/* ATXBase/SB-x270 CardBus */
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if (slot == 8 || slot == 0)
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return IT8152_PCI_INTB;
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/* ATXBase Ethernet */
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if (slot == 9)
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return IT8152_PCI_INTA;
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/* SB-x270 Ethernet */
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if (slot == 16)
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return IT8152_PCI_INTA;
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/* PC104+ interrupt routing */
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if ((slot == 17) || (slot == 19))
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return IT8152_PCI_INTA;
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if ((slot == 18) || (slot == 20))
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return IT8152_PCI_INTB;
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return(0);
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}
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static struct pci_bus * __init
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cmx270_pci_scan_bus(int nr, struct pci_sys_data *sys)
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{
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printk(KERN_INFO "Initializing CM-X270 PCI subsystem\n");
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__raw_writel(0x800, IT8152_PCI_CFG_ADDR);
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if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
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printk(KERN_INFO "PCI Bridge found.\n");
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/* set PCI I/O base at 0 */
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writel(0x848, IT8152_PCI_CFG_ADDR);
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writel(0, IT8152_PCI_CFG_DATA);
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/* set PCI memory base at 0 */
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writel(0x840, IT8152_PCI_CFG_ADDR);
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writel(0, IT8152_PCI_CFG_DATA);
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writel(0x20, IT8152_GPIO_GPDR);
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/* CardBus Controller on ATXbase baseboard */
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writel(0x4000, IT8152_PCI_CFG_ADDR);
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if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) {
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printk(KERN_INFO "CardBus Bridge found.\n");
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/* Configure socket 0 */
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writel(0x408C, IT8152_PCI_CFG_ADDR);
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writel(0x1022, IT8152_PCI_CFG_DATA);
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writel(0x4080, IT8152_PCI_CFG_ADDR);
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writel(0x3844d060, IT8152_PCI_CFG_DATA);
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writel(0x4090, IT8152_PCI_CFG_ADDR);
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writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
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0x60440000),
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IT8152_PCI_CFG_DATA);
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writel(0x4018, IT8152_PCI_CFG_ADDR);
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writel(0xb0000000, IT8152_PCI_CFG_DATA);
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/* Configure socket 1 */
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writel(0x418C, IT8152_PCI_CFG_ADDR);
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writel(0x1022, IT8152_PCI_CFG_DATA);
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writel(0x4180, IT8152_PCI_CFG_ADDR);
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writel(0x3844d060, IT8152_PCI_CFG_DATA);
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writel(0x4190, IT8152_PCI_CFG_ADDR);
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writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
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0x60440000),
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IT8152_PCI_CFG_DATA);
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writel(0x4118, IT8152_PCI_CFG_ADDR);
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writel(0xb0000000, IT8152_PCI_CFG_DATA);
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}
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}
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return it8152_pci_scan_bus(nr, sys);
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}
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static struct hw_pci cmx270_pci __initdata = {
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.swizzle = pci_std_swizzle,
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.map_irq = cmx270_pci_map_irq,
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.nr_controllers = 1,
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.setup = it8152_pci_setup,
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.scan = cmx270_pci_scan_bus,
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};
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static int __init cmx270_init_pci(void)
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{
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if (machine_is_armcore())
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pci_common_init(&cmx270_pci);
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return 0;
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}
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subsys_initcall(cmx270_init_pci);
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13
arch/arm/mach-pxa/cm-x270-pci.h
Normal file
13
arch/arm/mach-pxa/cm-x270-pci.h
Normal file
@ -0,0 +1,13 @@
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extern void __cmx270_pci_init_irq(void);
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extern void __cmx270_pci_suspend(void);
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extern void __cmx270_pci_resume(void);
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#ifdef CONFIG_PCI
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#define cmx270_pci_init_irq __cmx270_pci_init_irq
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#define cmx270_pci_suspend __cmx270_pci_suspend
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#define cmx270_pci_resume __cmx270_pci_resume
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#else
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#define cmx270_pci_init_irq() do {} while (0)
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#define cmx270_pci_suspend() do {} while (0)
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#define cmx270_pci_resume() do {} while (0)
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#endif
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645
arch/arm/mach-pxa/cm-x270.c
Normal file
645
arch/arm/mach-pxa/cm-x270.c
Normal file
@ -0,0 +1,645 @@
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/*
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* linux/arch/arm/mach-pxa/cm-x270.c
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*
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* Copyright (C) 2007 CompuLab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/pm.h>
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#include <linux/fb.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/sysdev.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/dm9000.h>
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#include <linux/rtc-v3020.h>
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#include <linux/serial_8250.h>
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#include <video/mbxfb.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/ohci.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/bitfield.h>
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#include <asm/arch/cm-x270.h>
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#include <asm/hardware/it8152.h>
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#include "generic.h"
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#include "cm-x270-pci.h"
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#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
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#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
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static struct resource cmx270_dm9k_resource[] = {
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[0] = {
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.start = DM9000_PHYS_BASE,
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.end = DM9000_PHYS_BASE + 4,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DM9000_PHYS_BASE + 8,
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.end = DM9000_PHYS_BASE + 8 + 500,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = CMX270_ETHIRQ,
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.end = CMX270_ETHIRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* for the moment we limit ourselves to 32bit IO until some
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* better IO routines can be written and tested
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*/
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static struct dm9000_plat_data cmx270_dm9k_platdata = {
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.flags = DM9000_PLATF_32BITONLY,
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};
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/* Ethernet device */
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static struct platform_device cmx270_device_dm9k = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(cmx270_dm9k_resource),
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.resource = cmx270_dm9k_resource,
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.dev = {
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.platform_data = &cmx270_dm9k_platdata,
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}
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};
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/* audio device */
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static struct platform_device cmx270_audio_device = {
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.name = "pxa2xx-ac97",
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.id = -1,
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};
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/* touchscreen controller */
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static struct platform_device cmx270_ts_device = {
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.name = "ucb1400_ts",
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.id = -1,
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};
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/* RTC */
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static struct resource cmx270_v3020_resource[] = {
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[0] = {
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.start = RTC_PHYS_BASE,
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.end = RTC_PHYS_BASE + 4,
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.flags = IORESOURCE_MEM,
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},
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};
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struct v3020_platform_data cmx270_v3020_pdata = {
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.leftshift = 16,
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};
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static struct platform_device cmx270_rtc_device = {
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.name = "v3020",
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.num_resources = ARRAY_SIZE(cmx270_v3020_resource),
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.resource = cmx270_v3020_resource,
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.id = -1,
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.dev = {
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.platform_data = &cmx270_v3020_pdata,
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}
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};
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/*
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* CM-X270 LEDs
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*/
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static struct platform_device cmx270_led_device = {
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.name = "cm-x270-led",
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.id = -1,
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};
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/* 2700G graphics */
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static u64 fb_dma_mask = ~(u64)0;
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static struct resource cmx270_2700G_resource[] = {
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/* frame buffer memory including ODFB and External SDRAM */
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[0] = {
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.start = MARATHON_PHYS,
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.end = MARATHON_PHYS + 0x02000000,
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.flags = IORESOURCE_MEM,
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},
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/* Marathon registers */
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[1] = {
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.start = MARATHON_PHYS + 0x03fe0000,
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.end = MARATHON_PHYS + 0x03ffffff,
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.flags = IORESOURCE_MEM,
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},
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};
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static unsigned long save_lcd_regs[10];
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static int cmx270_marathon_probe(struct fb_info *fb)
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{
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/* save PXA-270 pin settings before enabling 2700G */
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save_lcd_regs[0] = GPDR1;
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save_lcd_regs[1] = GPDR2;
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save_lcd_regs[2] = GAFR1_U;
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save_lcd_regs[3] = GAFR2_L;
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save_lcd_regs[4] = GAFR2_U;
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/* Disable PXA-270 on-chip controller driving pins */
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GPDR1 &= ~(0xfc000000);
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GPDR2 &= ~(0x00c03fff);
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GAFR1_U &= ~(0xfff00000);
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GAFR2_L &= ~(0x0fffffff);
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GAFR2_U &= ~(0x0000f000);
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return 0;
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}
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static int cmx270_marathon_remove(struct fb_info *fb)
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{
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GPDR1 = save_lcd_regs[0];
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GPDR2 = save_lcd_regs[1];
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GAFR1_U = save_lcd_regs[2];
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GAFR2_L = save_lcd_regs[3];
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GAFR2_U = save_lcd_regs[4];
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return 0;
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}
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static struct mbxfb_platform_data cmx270_2700G_data = {
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.xres = {
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.min = 240,
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.max = 1200,
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.defval = 640,
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},
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.yres = {
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.min = 240,
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.max = 1200,
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.defval = 480,
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},
|
||||
.bpp = {
|
||||
.min = 16,
|
||||
.max = 32,
|
||||
.defval = 16,
|
||||
},
|
||||
.memsize = 8*1024*1024,
|
||||
.probe = cmx270_marathon_probe,
|
||||
.remove = cmx270_marathon_remove,
|
||||
};
|
||||
|
||||
static struct platform_device cmx270_2700G = {
|
||||
.name = "mbx-fb",
|
||||
.dev = {
|
||||
.platform_data = &cmx270_2700G_data,
|
||||
.dma_mask = &fb_dma_mask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(cmx270_2700G_resource),
|
||||
.resource = cmx270_2700G_resource,
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static u64 ata_dma_mask = ~(u64)0;
|
||||
|
||||
static struct platform_device cmx270_ata = {
|
||||
.name = "pata_cm_x270",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &ata_dma_mask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
};
|
||||
|
||||
/* platform devices */
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&cmx270_device_dm9k,
|
||||
&cmx270_audio_device,
|
||||
&cmx270_rtc_device,
|
||||
&cmx270_2700G,
|
||||
&cmx270_led_device,
|
||||
&cmx270_ts_device,
|
||||
&cmx270_ata,
|
||||
};
|
||||
|
||||
/* Map PCI companion and IDE/General Purpose CS statically */
|
||||
static struct map_desc cmx270_io_desc[] __initdata = {
|
||||
[0] = { /* IDE/general purpose space */
|
||||
.virtual = CMX270_IDE104_VIRT,
|
||||
.pfn = __phys_to_pfn(CMX270_IDE104_PHYS),
|
||||
.length = SZ_64M - SZ_8M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
[1] = { /* PCI bridge */
|
||||
.virtual = CMX270_IT8152_VIRT,
|
||||
.pfn = __phys_to_pfn(CMX270_IT8152_PHYS),
|
||||
.length = SZ_64M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
Display definitions
|
||||
keep these for backwards compatibility, although symbolic names (as
|
||||
e.g. in lpd270.c) looks better
|
||||
*/
|
||||
#define MTYPE_STN320x240 0
|
||||
#define MTYPE_TFT640x480 1
|
||||
#define MTYPE_CRT640x480 2
|
||||
#define MTYPE_CRT800x600 3
|
||||
#define MTYPE_TFT320x240 6
|
||||
#define MTYPE_STN640x480 7
|
||||
|
||||
static struct pxafb_mode_info generic_stn_320x240_mode = {
|
||||
.pixclock = 76923,
|
||||
.bpp = 8,
|
||||
.xres = 320,
|
||||
.yres = 240,
|
||||
.hsync_len = 3,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 3,
|
||||
.upper_margin = 0,
|
||||
.right_margin = 3,
|
||||
.lower_margin = 0,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_stn_320x240 = {
|
||||
.modes = &generic_stn_320x240_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = 0,
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x03) |
|
||||
LCCR3_Acb(0xff) |
|
||||
LCCR3_PCP),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_tft_640x480_mode = {
|
||||
.pixclock = 38461,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 60,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 70,
|
||||
.upper_margin = 10,
|
||||
.right_margin = 70,
|
||||
.lower_margin = 5,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_tft_640x480 = {
|
||||
.modes = &generic_tft_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = (LCCR0_PAS),
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x01) |
|
||||
LCCR3_Acb(0xff) |
|
||||
LCCR3_PCP),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_crt_640x480_mode = {
|
||||
.pixclock = 38461,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 81,
|
||||
.upper_margin = 33,
|
||||
.right_margin = 16,
|
||||
.lower_margin = 10,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_crt_640x480 = {
|
||||
.modes = &generic_crt_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = (LCCR0_PAS),
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x01) |
|
||||
LCCR3_Acb(0xff)),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_crt_800x600_mode = {
|
||||
.pixclock = 28846,
|
||||
.bpp = 8,
|
||||
.xres = 800,
|
||||
.yres = 600,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 26,
|
||||
.upper_margin = 21,
|
||||
.right_margin = 26,
|
||||
.lower_margin = 11,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_crt_800x600 = {
|
||||
.modes = &generic_crt_800x600_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = (LCCR0_PAS),
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x02) |
|
||||
LCCR3_Acb(0xff)),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_tft_320x240_mode = {
|
||||
.pixclock = 134615,
|
||||
.bpp = 16,
|
||||
.xres = 320,
|
||||
.yres = 240,
|
||||
.hsync_len = 63,
|
||||
.vsync_len = 7,
|
||||
.left_margin = 75,
|
||||
.upper_margin = 0,
|
||||
.right_margin = 15,
|
||||
.lower_margin = 15,
|
||||
.sync = 0,
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_tft_320x240 = {
|
||||
.modes = &generic_tft_320x240_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = (LCCR0_PAS),
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x06) |
|
||||
LCCR3_Acb(0xff) |
|
||||
LCCR3_PCP),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mode_info generic_stn_640x480_mode = {
|
||||
.pixclock = 57692,
|
||||
.bpp = 8,
|
||||
.xres = 640,
|
||||
.yres = 480,
|
||||
.hsync_len = 4,
|
||||
.vsync_len = 2,
|
||||
.left_margin = 10,
|
||||
.upper_margin = 5,
|
||||
.right_margin = 10,
|
||||
.lower_margin = 5,
|
||||
.sync = (FB_SYNC_HOR_HIGH_ACT |
|
||||
FB_SYNC_VERT_HIGH_ACT),
|
||||
.cmap_greyscale = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info generic_stn_640x480 = {
|
||||
.modes = &generic_stn_640x480_mode,
|
||||
.num_modes = 1,
|
||||
.lccr0 = 0,
|
||||
.lccr3 = (LCCR3_PixClkDiv(0x02) |
|
||||
LCCR3_Acb(0xff)),
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
};
|
||||
|
||||
static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
|
||||
|
||||
static int __init cmx270_set_display(char *str)
|
||||
{
|
||||
int disp_type = simple_strtol(str, NULL, 0);
|
||||
switch (disp_type) {
|
||||
case MTYPE_STN320x240:
|
||||
cmx270_display = &generic_stn_320x240;
|
||||
break;
|
||||
case MTYPE_TFT640x480:
|
||||
cmx270_display = &generic_tft_640x480;
|
||||
break;
|
||||
case MTYPE_CRT640x480:
|
||||
cmx270_display = &generic_crt_640x480;
|
||||
break;
|
||||
case MTYPE_CRT800x600:
|
||||
cmx270_display = &generic_crt_800x600;
|
||||
break;
|
||||
case MTYPE_TFT320x240:
|
||||
cmx270_display = &generic_tft_320x240;
|
||||
break;
|
||||
case MTYPE_STN640x480:
|
||||
cmx270_display = &generic_stn_640x480;
|
||||
break;
|
||||
default: /* fallback to CRT 640x480 */
|
||||
cmx270_display = &generic_crt_640x480;
|
||||
break;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
This should be done really early to get proper configuration for
|
||||
frame buffer.
|
||||
Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
|
||||
has limitied line length for kernel command line, and also it will
|
||||
break compatibitlty with proprietary releases already in field.
|
||||
*/
|
||||
__setup("monitor=", cmx270_set_display);
|
||||
|
||||
/* PXA27x OHCI controller setup */
|
||||
static int cmx270_ohci_init(struct device *dev)
|
||||
{
|
||||
/* Set the Power Control Polarity Low */
|
||||
UHCHR = (UHCHR | UHCHR_PCPL) &
|
||||
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pxaohci_platform_data cmx270_ohci_platform_data = {
|
||||
.port_mode = PMM_PERPORT_MODE,
|
||||
.init = cmx270_ohci_init,
|
||||
};
|
||||
|
||||
|
||||
static int cmx270_mci_init(struct device *dev,
|
||||
irq_handler_t cmx270_detect_int,
|
||||
void *data)
|
||||
{
|
||||
int err;
|
||||
|
||||
/*
|
||||
* setup GPIO for PXA27x MMC controller
|
||||
*/
|
||||
pxa_gpio_mode(GPIO32_MMCCLK_MD);
|
||||
pxa_gpio_mode(GPIO112_MMCCMD_MD);
|
||||
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
|
||||
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
|
||||
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
|
||||
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
|
||||
|
||||
/* SB-X270 uses GPIO105 as SD power enable */
|
||||
pxa_gpio_mode(105 | GPIO_OUT);
|
||||
|
||||
/* card detect IRQ on GPIO 83 */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
|
||||
set_irq_type(CMX270_MMC_IRQ, IRQT_FALLING);
|
||||
|
||||
err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
|
||||
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
|
||||
"MMC card detect", data);
|
||||
if (err) {
|
||||
printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
|
||||
" request MMC card detect IRQ\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data *p_d = dev->platform_data;
|
||||
|
||||
if ((1 << vdd) & p_d->ocr_mask) {
|
||||
printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
|
||||
GPCR(105) = GPIO_bit(105);
|
||||
} else {
|
||||
GPSR(105) = GPIO_bit(105);
|
||||
printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
|
||||
}
|
||||
}
|
||||
|
||||
static void cmx270_mci_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(CMX270_MMC_IRQ, data);
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data cmx270_mci_platform_data = {
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.init = cmx270_mci_init,
|
||||
.setpower = cmx270_mci_setpower,
|
||||
.exit = cmx270_mci_exit,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static unsigned long sleep_save_msc[10];
|
||||
|
||||
static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
|
||||
{
|
||||
cmx270_pci_suspend();
|
||||
|
||||
/* save MSC registers */
|
||||
sleep_save_msc[0] = MSC0;
|
||||
sleep_save_msc[1] = MSC1;
|
||||
sleep_save_msc[2] = MSC2;
|
||||
|
||||
/* setup power saving mode registers */
|
||||
PCFR = 0x0;
|
||||
PSLR = 0xff400000;
|
||||
PMCR = 0x00000005;
|
||||
PWER = 0x80000000;
|
||||
PFER = 0x00000000;
|
||||
PRER = 0x00000000;
|
||||
PGSR0 = 0xC0018800;
|
||||
PGSR1 = 0x004F0002;
|
||||
PGSR2 = 0x6021C000;
|
||||
PGSR3 = 0x00020000;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmx270_resume(struct sys_device *dev)
|
||||
{
|
||||
cmx270_pci_resume();
|
||||
|
||||
/* restore MSC registers */
|
||||
MSC0 = sleep_save_msc[0];
|
||||
MSC1 = sleep_save_msc[1];
|
||||
MSC2 = sleep_save_msc[2];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct sysdev_class cmx270_pm_sysclass = {
|
||||
set_kset_name("pm"),
|
||||
.resume = cmx270_resume,
|
||||
.suspend = cmx270_suspend,
|
||||
};
|
||||
|
||||
static struct sys_device cmx270_pm_device = {
|
||||
.cls = &cmx270_pm_sysclass,
|
||||
};
|
||||
|
||||
static int __init cmx270_pm_init(void)
|
||||
{
|
||||
int error;
|
||||
error = sysdev_class_register(&cmx270_pm_sysclass);
|
||||
if (error == 0)
|
||||
error = sysdev_register(&cmx270_pm_device);
|
||||
return error;
|
||||
}
|
||||
#else
|
||||
static int __init cmx270_pm_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
static void __init cmx270_init(void)
|
||||
{
|
||||
cmx270_pm_init();
|
||||
|
||||
set_pxa_fb_info(cmx270_display);
|
||||
|
||||
/* register CM-X270 platform devices */
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
|
||||
/* set MCI and OHCI platform parameters */
|
||||
pxa_set_mci_info(&cmx270_mci_platform_data);
|
||||
pxa_set_ohci_info(&cmx270_ohci_platform_data);
|
||||
|
||||
/* This enables the STUART */
|
||||
pxa_gpio_mode(GPIO46_STRXD_MD);
|
||||
pxa_gpio_mode(GPIO47_STTXD_MD);
|
||||
|
||||
/* This enables the BTUART */
|
||||
pxa_gpio_mode(GPIO42_BTRXD_MD);
|
||||
pxa_gpio_mode(GPIO43_BTTXD_MD);
|
||||
pxa_gpio_mode(GPIO44_BTCTS_MD);
|
||||
pxa_gpio_mode(GPIO45_BTRTS_MD);
|
||||
}
|
||||
|
||||
static void __init cmx270_init_irq(void)
|
||||
{
|
||||
pxa27x_init_irq();
|
||||
|
||||
|
||||
cmx270_pci_init_irq();
|
||||
|
||||
/* Setup interrupt for dm9000 */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
|
||||
set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
|
||||
|
||||
/* Setup interrupt for 2700G */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
|
||||
set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
|
||||
}
|
||||
|
||||
static void __init cmx270_map_io(void)
|
||||
{
|
||||
pxa_map_io();
|
||||
iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
|
||||
}
|
||||
|
||||
|
||||
MACHINE_START(ARMCORE, "Compulab CM-x270")
|
||||
.boot_params = 0xa0000100,
|
||||
.phys_io = 0x40000000,
|
||||
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
||||
.map_io = cmx270_map_io,
|
||||
.init_irq = cmx270_init_irq,
|
||||
.timer = &pxa_timer,
|
||||
.init_machine = cmx270_init,
|
||||
MACHINE_END
|
||||
@ -108,6 +108,12 @@ config LEDS_GPIO
|
||||
outputs. To be useful the particular board must have LEDs
|
||||
and they must be connected to the GPIO lines.
|
||||
|
||||
config LEDS_CM_X270
|
||||
tristate "LED Support for the CM-X270 LEDs"
|
||||
depends on LEDS_CLASS && MACH_ARMCORE
|
||||
help
|
||||
This option enables support for the CM-X270 LEDs.
|
||||
|
||||
comment "LED Triggers"
|
||||
|
||||
config LEDS_TRIGGERS
|
||||
|
||||
@ -18,6 +18,7 @@ obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
|
||||
obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o
|
||||
obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
|
||||
obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
|
||||
obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
|
||||
|
||||
# LED Triggers
|
||||
obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
|
||||
|
||||
122
drivers/leds/leds-cm-x270.c
Normal file
122
drivers/leds/leds-cm-x270.c
Normal file
@ -0,0 +1,122 @@
|
||||
/*
|
||||
* drivers/leds/leds-cm-x270.c
|
||||
*
|
||||
* Copyright 2007 CompuLab Ltd.
|
||||
* Author: Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
* Based on leds-corgi.c
|
||||
* Author: Richard Purdie <rpurdie@openedhand.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/leds.h>
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
|
||||
#define GPIO_RED_LED (93)
|
||||
#define GPIO_GREEN_LED (94)
|
||||
|
||||
static void cmx270_red_set(struct led_classdev *led_cdev,
|
||||
enum led_brightness value)
|
||||
{
|
||||
if (value)
|
||||
GPCR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED);
|
||||
else
|
||||
GPSR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED);
|
||||
}
|
||||
|
||||
static void cmx270_green_set(struct led_classdev *led_cdev,
|
||||
enum led_brightness value)
|
||||
{
|
||||
if (value)
|
||||
GPCR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED);
|
||||
else
|
||||
GPSR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED);
|
||||
}
|
||||
|
||||
static struct led_classdev cmx270_red_led = {
|
||||
.name = "cm-x270:red",
|
||||
.default_trigger = "nand-disk",
|
||||
.brightness_set = cmx270_red_set,
|
||||
};
|
||||
|
||||
static struct led_classdev cmx270_green_led = {
|
||||
.name = "cm-x270:green",
|
||||
.default_trigger = "heartbeat",
|
||||
.brightness_set = cmx270_green_set,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int cmx270led_suspend(struct platform_device *dev, pm_message_t state)
|
||||
{
|
||||
led_classdev_suspend(&cmx270_red_led);
|
||||
led_classdev_suspend(&cmx270_green_led);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cmx270led_resume(struct platform_device *dev)
|
||||
{
|
||||
led_classdev_resume(&cmx270_red_led);
|
||||
led_classdev_resume(&cmx270_green_led);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int cmx270led_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = led_classdev_register(&pdev->dev, &cmx270_red_led);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = led_classdev_register(&pdev->dev, &cmx270_green_led);
|
||||
if (ret < 0)
|
||||
led_classdev_unregister(&cmx270_red_led);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int cmx270led_remove(struct platform_device *pdev)
|
||||
{
|
||||
led_classdev_unregister(&cmx270_red_led);
|
||||
led_classdev_unregister(&cmx270_green_led);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver cmx270led_driver = {
|
||||
.probe = cmx270led_probe,
|
||||
.remove = cmx270led_remove,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = cmx270led_suspend,
|
||||
.resume = cmx270led_resume,
|
||||
#endif
|
||||
.driver = {
|
||||
.name = "cm-x270-led",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init cmx270led_init(void)
|
||||
{
|
||||
return platform_driver_register(&cmx270led_driver);
|
||||
}
|
||||
|
||||
static void __exit cmx270led_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&cmx270led_driver);
|
||||
}
|
||||
|
||||
module_init(cmx270led_init);
|
||||
module_exit(cmx270led_exit);
|
||||
|
||||
MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
|
||||
MODULE_DESCRIPTION("CM-x270 LED driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
50
include/asm-arm/arch-pxa/cm-x270.h
Normal file
50
include/asm-arm/arch-pxa/cm-x270.h
Normal file
@ -0,0 +1,50 @@
|
||||
/*
|
||||
* linux/include/asm/arch-pxa/cm-x270.h
|
||||
*
|
||||
* Copyright Compulab Ltd., 2003, 2007
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
|
||||
/* CM-x270 device physical addresses */
|
||||
#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
|
||||
#define MARATHON_PHYS (PXA_CS2_PHYS)
|
||||
#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
|
||||
#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
|
||||
|
||||
/* Statically mapped regions */
|
||||
#define CMX270_VIRT_BASE (0xe8000000)
|
||||
#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
|
||||
#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
|
||||
|
||||
/* GPIO related definitions */
|
||||
#define GPIO_IT8152_IRQ (22)
|
||||
|
||||
#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
|
||||
#define PME_IRQ IRQ_GPIO(0)
|
||||
#define CMX270_IDE_IRQ IRQ_GPIO(100)
|
||||
#define CMX270_GPIRQ1 IRQ_GPIO(101)
|
||||
#define CMX270_TOUCHIRQ IRQ_GPIO(96)
|
||||
#define CMX270_ETHIRQ IRQ_GPIO(10)
|
||||
#define CMX270_GFXIRQ IRQ_GPIO(95)
|
||||
#define CMX270_NANDIRQ IRQ_GPIO(89)
|
||||
#define CMX270_MMC_IRQ IRQ_GPIO(83)
|
||||
|
||||
/* PCMCIA related definitions */
|
||||
#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
|
||||
#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
|
||||
|
||||
#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
|
||||
#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
|
||||
#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
|
||||
#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
|
||||
|
||||
#define PCMCIA_RESET_GPIO 53
|
||||
@ -30,6 +30,10 @@ typedef enum {
|
||||
DMA_PRIO_LOW = 2
|
||||
} pxa_dma_prio;
|
||||
|
||||
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
|
||||
#define HAVE_ARCH_PCI_SET_DMA_MASK 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* DMA registration
|
||||
*/
|
||||
|
||||
@ -215,4 +215,10 @@ extern unsigned int get_memclk_frequency_10khz(void);
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
|
||||
#define PCIBIOS_MIN_IO 0
|
||||
#define PCIBIOS_MIN_MEM 0
|
||||
#define pcibios_assign_all_busses() 1
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_ARCH_HARDWARE_H */
|
||||
|
||||
@ -210,3 +210,24 @@
|
||||
#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1)
|
||||
#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2)
|
||||
#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3)
|
||||
|
||||
/* ITE8152 irqs */
|
||||
/* add IT8152 IRQs beyond BOARD_END */
|
||||
#ifdef CONFIG_PCI_HOST_ITE8152
|
||||
#define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x))
|
||||
|
||||
/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
|
||||
#define IT8152_LD_IRQ_COUNT 9
|
||||
#define IT8152_LP_IRQ_COUNT 16
|
||||
#define IT8152_PD_IRQ_COUNT 15
|
||||
|
||||
/* Priorities: */
|
||||
#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
|
||||
#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
|
||||
#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
|
||||
|
||||
#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
|
||||
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS (IT8152_LAST_IRQ+1)
|
||||
#endif
|
||||
|
||||
@ -39,4 +39,14 @@
|
||||
*/
|
||||
#define NODE_MEM_SIZE_BITS 26
|
||||
|
||||
#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
|
||||
void cmx270_pci_adjust_zones(int node, unsigned long *size,
|
||||
unsigned long *holes);
|
||||
|
||||
#define arch_adjust_zones(node, size, holes) \
|
||||
cmx270_pci_adjust_zones(node, size, holes)
|
||||
|
||||
#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user