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iio: adc: add driver for the ti-adc084s021 chip
This adds support for the Texas Instruments ADC084S021 ADC chip. Signed-off-by: Mårten Lindahl <martenli@axis.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -670,6 +670,18 @@ config TI_ADC0832
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This driver can also be built as a module. If so, the module will be
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called ti-adc0832.
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config TI_ADC084S021
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tristate "Texas Instruments ADC084S021"
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depends on SPI
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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help
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If you say yes here you get support for Texas Instruments ADC084S021
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chips.
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This driver can also be built as a module. If so, the module will be
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called ti-adc084s021.
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config TI_ADC12138
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tristate "Texas Instruments ADC12130/ADC12132/ADC12138"
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depends on SPI
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@ -61,6 +61,7 @@ obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
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obj-$(CONFIG_STM32_ADC) += stm32-adc.o
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obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
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obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
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obj-$(CONFIG_TI_ADC084S021) += ti-adc084s021.o
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obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
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obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
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obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
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275
drivers/iio/adc/ti-adc084s021.c
Normal file
275
drivers/iio/adc/ti-adc084s021.c
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@ -0,0 +1,275 @@
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/**
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* Copyright (C) 2017 Axis Communications AB
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*
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* Driver for Texas Instruments' ADC084S021 ADC chip.
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* Datasheets can be found here:
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* http://www.ti.com/lit/ds/symlink/adc084s021.pdf
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/err.h>
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#include <linux/spi/spi.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/regulator/consumer.h>
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#define ADC084S021_DRIVER_NAME "adc084s021"
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struct adc084s021 {
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struct spi_device *spi;
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struct spi_message message;
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struct spi_transfer spi_trans;
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struct regulator *reg;
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struct mutex lock;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache line.
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*/
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u16 tx_buf[4] ____cacheline_aligned;
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__be16 rx_buf[5]; /* First 16-bits are trash */
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};
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#define ADC084S021_VOLTAGE_CHANNEL(num) \
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{ \
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.type = IIO_VOLTAGE, \
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.channel = (num), \
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.indexed = 1, \
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.scan_index = (num), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = 8, \
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.storagebits = 16, \
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.shift = 4, \
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.endianness = IIO_BE, \
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}, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
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}
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static const struct iio_chan_spec adc084s021_channels[] = {
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ADC084S021_VOLTAGE_CHANNEL(0),
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ADC084S021_VOLTAGE_CHANNEL(1),
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ADC084S021_VOLTAGE_CHANNEL(2),
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ADC084S021_VOLTAGE_CHANNEL(3),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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/**
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* Read an ADC channel and return its value.
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*
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* @adc: The ADC SPI data.
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* @data: Buffer for converted data.
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*/
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static int adc084s021_adc_conversion(struct adc084s021 *adc, void *data)
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{
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int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */
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int ret, i = 0;
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u16 *p = data;
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/* Do the transfer */
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ret = spi_sync(adc->spi, &adc->message);
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if (ret < 0)
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return ret;
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for (; i < n_words; i++)
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*(p + i) = adc->rx_buf[i + 1];
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return ret;
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}
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static int adc084s021_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *channel, int *val,
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int *val2, long mask)
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{
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struct adc084s021 *adc = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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ret = regulator_enable(adc->reg);
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if (ret) {
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iio_device_release_direct_mode(indio_dev);
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return ret;
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}
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adc->tx_buf[0] = channel->channel << 3;
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ret = adc084s021_adc_conversion(adc, val);
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iio_device_release_direct_mode(indio_dev);
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regulator_disable(adc->reg);
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if (ret < 0)
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return ret;
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*val = be16_to_cpu(*val);
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*val = (*val >> channel->scan_type.shift) & 0xff;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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ret = regulator_enable(adc->reg);
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if (ret)
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return ret;
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ret = regulator_get_voltage(adc->reg);
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regulator_disable(adc->reg);
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if (ret < 0)
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return ret;
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*val = ret / 1000;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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/**
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* Read enabled ADC channels and push data to the buffer.
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*
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* @irq: The interrupt number (not used).
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* @pollfunc: Pointer to the poll func.
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*/
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static irqreturn_t adc084s021_buffer_trigger_handler(int irq, void *pollfunc)
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{
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struct iio_poll_func *pf = pollfunc;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct adc084s021 *adc = iio_priv(indio_dev);
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__be16 data[8] = {0}; /* 4 * 16-bit words of data + 8 bytes timestamp */
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mutex_lock(&adc->lock);
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if (adc084s021_adc_conversion(adc, &data) < 0)
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dev_err(&adc->spi->dev, "Failed to read data\n");
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iio_push_to_buffers_with_timestamp(indio_dev, data,
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iio_get_time_ns(indio_dev));
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mutex_unlock(&adc->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int adc084s021_buffer_preenable(struct iio_dev *indio_dev)
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{
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struct adc084s021 *adc = iio_priv(indio_dev);
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int scan_index;
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int i = 0;
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for_each_set_bit(scan_index, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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const struct iio_chan_spec *channel =
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&indio_dev->channels[scan_index];
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adc->tx_buf[i++] = channel->channel << 3;
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}
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adc->spi_trans.len = 2 + (i * sizeof(__be16)); /* Trash + channels */
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return regulator_enable(adc->reg);
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}
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static int adc084s021_buffer_postdisable(struct iio_dev *indio_dev)
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{
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struct adc084s021 *adc = iio_priv(indio_dev);
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adc->spi_trans.len = 4; /* Trash + single channel */
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return regulator_disable(adc->reg);
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}
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static const struct iio_info adc084s021_info = {
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.read_raw = adc084s021_read_raw,
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.driver_module = THIS_MODULE,
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};
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static const struct iio_buffer_setup_ops adc084s021_buffer_setup_ops = {
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.preenable = adc084s021_buffer_preenable,
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.postenable = iio_triggered_buffer_postenable,
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.predisable = iio_triggered_buffer_predisable,
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.postdisable = adc084s021_buffer_postdisable,
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};
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static int adc084s021_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct adc084s021 *adc;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
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if (!indio_dev) {
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dev_err(&spi->dev, "Failed to allocate IIO device\n");
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return -ENOMEM;
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}
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adc = iio_priv(indio_dev);
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adc->spi = spi;
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/* Connect the SPI device and the iio dev */
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spi_set_drvdata(spi, indio_dev);
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/* Initiate the Industrial I/O device */
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indio_dev->dev.parent = &spi->dev;
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indio_dev->dev.of_node = spi->dev.of_node;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &adc084s021_info;
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indio_dev->channels = adc084s021_channels;
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indio_dev->num_channels = ARRAY_SIZE(adc084s021_channels);
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/* Create SPI transfer for channel reads */
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adc->spi_trans.tx_buf = adc->tx_buf;
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adc->spi_trans.rx_buf = adc->rx_buf;
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adc->spi_trans.len = 4; /* Trash + single channel */
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spi_message_init_with_transfers(&adc->message, &adc->spi_trans, 1);
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adc->reg = devm_regulator_get(&spi->dev, "vref");
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if (IS_ERR(adc->reg))
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return PTR_ERR(adc->reg);
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mutex_init(&adc->lock);
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/* Setup triggered buffer with pollfunction */
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ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
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adc084s021_buffer_trigger_handler,
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&adc084s021_buffer_setup_ops);
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if (ret) {
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dev_err(&spi->dev, "Failed to setup triggered buffer\n");
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return ret;
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}
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct of_device_id adc084s021_of_match[] = {
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{ .compatible = "ti,adc084s021", },
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{},
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};
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MODULE_DEVICE_TABLE(of, adc084s021_of_match);
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static const struct spi_device_id adc084s021_id[] = {
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{ ADC084S021_DRIVER_NAME, 0},
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{}
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};
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MODULE_DEVICE_TABLE(spi, adc084s021_id);
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static struct spi_driver adc084s021_driver = {
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.driver = {
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.name = ADC084S021_DRIVER_NAME,
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.of_match_table = of_match_ptr(adc084s021_of_match),
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},
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.probe = adc084s021_probe,
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.id_table = adc084s021_id,
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};
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module_spi_driver(adc084s021_driver);
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MODULE_AUTHOR("Mårten Lindahl <martenli@axis.com>");
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MODULE_DESCRIPTION("Texas Instruments ADC084S021");
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MODULE_LICENSE("GPL v2");
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MODULE_VERSION("1.0");
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