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powrpc/powernv: Reset PHB in kdump kernel
In the kdump scenario, the first kerenl doesn't shutdown PCI devices and the kdump kerenl clean PHB IODA table at the early probe time. That means the kdump kerenl can't support PCI transactions piled by the first kerenl. Otherwise, lots of EEH errors and frozen PEs will be detected. In order to avoid the EEH errors, the PHB is resetted to drop all PCI transaction from the first kerenl. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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d92a208d08
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361f2a2a15
@ -388,13 +388,16 @@ static s64 ioda_eeh_phb_poll(struct pnv_phb *phb)
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if (rc <= 0)
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break;
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msleep(rc);
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if (system_state < SYSTEM_RUNNING)
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udelay(1000 * rc);
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else
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msleep(rc);
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}
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return rc;
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}
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static int ioda_eeh_phb_reset(struct pci_controller *hose, int option)
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int ioda_eeh_phb_reset(struct pci_controller *hose, int option)
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{
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struct pnv_phb *phb = hose->private_data;
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s64 rc = OPAL_HARDWARE;
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@ -422,8 +425,12 @@ static int ioda_eeh_phb_reset(struct pci_controller *hose, int option)
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* need the PCI bus settlement delay.
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*/
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rc = ioda_eeh_phb_poll(phb);
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if (option == EEH_RESET_DEACTIVATE)
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msleep(EEH_PE_RST_SETTLE_TIME);
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if (option == EEH_RESET_DEACTIVATE) {
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if (system_state < SYSTEM_RUNNING)
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udelay(1000 * EEH_PE_RST_SETTLE_TIME);
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else
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msleep(EEH_PE_RST_SETTLE_TIME);
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}
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out:
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if (rc != OPAL_SUCCESS)
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return -EIO;
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@ -13,6 +13,7 @@
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/crash_dump.h>
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#include <linux/debugfs.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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@ -1393,6 +1394,17 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
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rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
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if (rc)
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pr_warning(" OPAL Error %ld performing IODA table reset !\n", rc);
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/* If we're running in kdump kerenl, the previous kerenl never
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* shutdown PCI devices correctly. We already got IODA table
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* cleaned out. So we have to issue PHB reset to stop all PCI
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* transactions from previous kerenl.
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*/
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if (is_kdump_kernel()) {
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pr_info(" Issue PHB reset ...\n");
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ioda_eeh_phb_reset(hose, EEH_RESET_FUNDAMENTAL);
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ioda_eeh_phb_reset(hose, OPAL_DEASSERT_RESET);
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}
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}
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void __init pnv_pci_init_ioda2_phb(struct device_node *np)
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@ -205,5 +205,6 @@ extern void pnv_pci_init_ioda2_phb(struct device_node *np);
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extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
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__be64 *startp, __be64 *endp, bool rm);
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extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);
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extern int ioda_eeh_phb_reset(struct pci_controller *hose, int option);
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#endif /* __POWERNV_PCI_H */
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