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dmaengine: dw-edma: Add HDMA DebugFS support
Add HDMA DebugFS support to show registers content Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230520050854.73160-5-cai.huoqing@linux.dev Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -1,7 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_DW_EDMA) += dw-edma.o
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dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o
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dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
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dw-hdma-v0-debugfs.o
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dw-edma-objs := dw-edma-core.o \
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dw-edma-v0-core.o \
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dw-hdma-v0-core.o $(dw-edma-y)
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@ -11,6 +11,7 @@
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#include "dw-edma-core.h"
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#include "dw-hdma-v0-core.h"
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#include "dw-hdma-v0-regs.h"
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#include "dw-hdma-v0-debugfs.h"
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enum dw_hdma_control {
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DW_HDMA_V0_CB = BIT(0),
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@ -276,6 +277,7 @@ static void dw_hdma_v0_core_ch_config(struct dw_edma_chan *chan)
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/* HDMA debugfs callbacks */
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static void dw_hdma_v0_core_debugfs_on(struct dw_edma *dw)
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{
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dw_hdma_v0_debugfs_on(dw);
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}
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static const struct dw_edma_core_ops dw_hdma_v0_core = {
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drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
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drivers/dma/dw-edma/dw-hdma-v0-debugfs.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2023 Cai Huoqing
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* Synopsys DesignWare HDMA v0 debugfs
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*
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* Author: Cai Huoqing <cai.huoqing@linux.dev>
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*/
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#include <linux/debugfs.h>
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#include <linux/bitfield.h>
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#include "dw-hdma-v0-debugfs.h"
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#include "dw-hdma-v0-regs.h"
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#include "dw-edma-core.h"
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#define REGS_ADDR(dw, name) \
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({ \
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struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
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\
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(void __iomem *)&__regs->name; \
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})
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#define REGS_CH_ADDR(dw, name, _dir, _ch) \
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({ \
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struct dw_hdma_v0_ch_regs __iomem *__ch_regs; \
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\
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if (_dir == EDMA_DIR_READ) \
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__ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
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else \
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__ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
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\
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(void __iomem *)&__ch_regs->name; \
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})
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#define CTX_REGISTER(dw, name, dir, ch) \
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{#name, REGS_CH_ADDR(dw, name, dir, ch)}
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#define WRITE_STR "write"
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#define READ_STR "read"
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#define CHANNEL_STR "channel"
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#define REGISTERS_STR "registers"
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struct dw_hdma_debugfs_entry {
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const char *name;
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void __iomem *reg;
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};
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static int dw_hdma_debugfs_u32_get(void *data, u64 *val)
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{
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struct dw_hdma_debugfs_entry *entry = data;
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void __iomem *reg = entry->reg;
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*val = readl(reg);
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_x32, dw_hdma_debugfs_u32_get, NULL, "0x%08llx\n");
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static void dw_hdma_debugfs_create_x32(struct dw_edma *dw,
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const struct dw_hdma_debugfs_entry ini[],
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int nr_entries, struct dentry *dent)
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{
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struct dw_hdma_debugfs_entry *entries;
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int i;
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entries = devm_kcalloc(dw->chip->dev, nr_entries, sizeof(*entries),
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GFP_KERNEL);
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if (!entries)
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return;
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for (i = 0; i < nr_entries; i++) {
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entries[i] = ini[i];
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debugfs_create_file_unsafe(entries[i].name, 0444, dent,
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&entries[i], &fops_x32);
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}
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}
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static void dw_hdma_debugfs_regs_ch(struct dw_edma *dw, enum dw_edma_dir dir,
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u16 ch, struct dentry *dent)
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{
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const struct dw_hdma_debugfs_entry debugfs_regs[] = {
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CTX_REGISTER(dw, ch_en, dir, ch),
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CTX_REGISTER(dw, doorbell, dir, ch),
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CTX_REGISTER(dw, prefetch, dir, ch),
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CTX_REGISTER(dw, handshake, dir, ch),
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CTX_REGISTER(dw, llp.lsb, dir, ch),
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CTX_REGISTER(dw, llp.msb, dir, ch),
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CTX_REGISTER(dw, cycle_sync, dir, ch),
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CTX_REGISTER(dw, transfer_size, dir, ch),
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CTX_REGISTER(dw, sar.lsb, dir, ch),
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CTX_REGISTER(dw, sar.msb, dir, ch),
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CTX_REGISTER(dw, dar.lsb, dir, ch),
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CTX_REGISTER(dw, dar.msb, dir, ch),
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CTX_REGISTER(dw, watermark_en, dir, ch),
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CTX_REGISTER(dw, control1, dir, ch),
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CTX_REGISTER(dw, func_num, dir, ch),
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CTX_REGISTER(dw, qos, dir, ch),
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CTX_REGISTER(dw, ch_stat, dir, ch),
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CTX_REGISTER(dw, int_stat, dir, ch),
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CTX_REGISTER(dw, int_setup, dir, ch),
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CTX_REGISTER(dw, int_clear, dir, ch),
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CTX_REGISTER(dw, msi_stop.lsb, dir, ch),
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CTX_REGISTER(dw, msi_stop.msb, dir, ch),
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CTX_REGISTER(dw, msi_watermark.lsb, dir, ch),
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CTX_REGISTER(dw, msi_watermark.msb, dir, ch),
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CTX_REGISTER(dw, msi_abort.lsb, dir, ch),
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CTX_REGISTER(dw, msi_abort.msb, dir, ch),
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CTX_REGISTER(dw, msi_msgdata, dir, ch),
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};
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int nr_entries = ARRAY_SIZE(debugfs_regs);
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dw_hdma_debugfs_create_x32(dw, debugfs_regs, nr_entries, dent);
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}
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static void dw_hdma_debugfs_regs_wr(struct dw_edma *dw, struct dentry *dent)
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{
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struct dentry *regs_dent, *ch_dent;
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char name[16];
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int i;
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regs_dent = debugfs_create_dir(WRITE_STR, dent);
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for (i = 0; i < dw->wr_ch_cnt; i++) {
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snprintf(name, sizeof(name), "%s:%d", CHANNEL_STR, i);
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ch_dent = debugfs_create_dir(name, regs_dent);
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dw_hdma_debugfs_regs_ch(dw, EDMA_DIR_WRITE, i, ch_dent);
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}
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}
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static void dw_hdma_debugfs_regs_rd(struct dw_edma *dw, struct dentry *dent)
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{
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struct dentry *regs_dent, *ch_dent;
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char name[16];
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int i;
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regs_dent = debugfs_create_dir(READ_STR, dent);
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for (i = 0; i < dw->rd_ch_cnt; i++) {
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snprintf(name, sizeof(name), "%s:%d", CHANNEL_STR, i);
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ch_dent = debugfs_create_dir(name, regs_dent);
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dw_hdma_debugfs_regs_ch(dw, EDMA_DIR_READ, i, ch_dent);
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}
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}
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static void dw_hdma_debugfs_regs(struct dw_edma *dw)
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{
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struct dentry *regs_dent;
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regs_dent = debugfs_create_dir(REGISTERS_STR, dw->dma.dbg_dev_root);
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dw_hdma_debugfs_regs_wr(dw, regs_dent);
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dw_hdma_debugfs_regs_rd(dw, regs_dent);
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}
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void dw_hdma_v0_debugfs_on(struct dw_edma *dw)
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{
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if (!debugfs_initialized())
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return;
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debugfs_create_u32("mf", 0444, dw->dma.dbg_dev_root, &dw->chip->mf);
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debugfs_create_u16("wr_ch_cnt", 0444, dw->dma.dbg_dev_root, &dw->wr_ch_cnt);
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debugfs_create_u16("rd_ch_cnt", 0444, dw->dma.dbg_dev_root, &dw->rd_ch_cnt);
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dw_hdma_debugfs_regs(dw);
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}
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drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
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22
drivers/dma/dw-edma/dw-hdma-v0-debugfs.h
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2023 Cai Huoqing
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* Synopsys DesignWare HDMA v0 debugfs
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*
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* Author: Cai Huoqing <cai.huoqing@linux.dev>
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*/
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#ifndef _DW_HDMA_V0_DEBUG_FS_H
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#define _DW_HDMA_V0_DEBUG_FS_H
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#include <linux/dma/edma.h>
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#ifdef CONFIG_DEBUG_FS
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void dw_hdma_v0_debugfs_on(struct dw_edma *dw);
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#else
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static inline void dw_hdma_v0_debugfs_on(struct dw_edma *dw)
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{
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}
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#endif /* CONFIG_DEBUG_FS */
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#endif /* _DW_HDMA_V0_DEBUG_FS_H */
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