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mfd: axp20x: Add address extension registers for AXP806 regmap
The AXP806 supports either master/standalone or slave mode. Slave mode allows sharing the serial bus, even with multiple AXP806 which all have the same hardware address. This is done with extra "serial interface address extension", or AXP806_BUS_ADDR_EXT, and "register address extension", or AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1 bit customizable at the factory, and 1 bit depending on the state of an external pin. The latter is writable. Only when the these device addressing bits (in the upper 4 bits of the registers) match, will the device respond to operations on its other registers. Add these 2 registers to the regmap so we can access them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -136,6 +136,7 @@ static const struct regmap_range axp806_writeable_ranges[] = {
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regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
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regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
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regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
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regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
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};
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static const struct regmap_range axp806_volatile_ranges[] = {
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@ -306,7 +307,7 @@ static const struct regmap_config axp806_regmap_config = {
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.val_bits = 8,
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.wr_table = &axp806_writeable_table,
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.volatile_table = &axp806_volatile_table,
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.max_register = AXP806_VREF_TEMP_WARN_L,
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.max_register = AXP806_REG_ADDR_EXT,
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.cache_type = REGCACHE_RBTREE,
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};
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@ -115,6 +115,8 @@ enum {
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#define AXP806_CLDO2_V_CTRL 0x25
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#define AXP806_CLDO3_V_CTRL 0x26
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#define AXP806_VREF_TEMP_WARN_L 0xf3
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#define AXP806_BUS_ADDR_EXT 0xfe
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#define AXP806_REG_ADDR_EXT 0xff
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/* Interrupt */
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#define AXP152_IRQ1_EN 0x40
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